WO2009057589A1 - キャパシタとそれを有する半導体装置およびキャパシタの製造方法 - Google Patents
キャパシタとそれを有する半導体装置およびキャパシタの製造方法 Download PDFInfo
- Publication number
- WO2009057589A1 WO2009057589A1 PCT/JP2008/069542 JP2008069542W WO2009057589A1 WO 2009057589 A1 WO2009057589 A1 WO 2009057589A1 JP 2008069542 W JP2008069542 W JP 2008069542W WO 2009057589 A1 WO2009057589 A1 WO 2009057589A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- capacitor
- film
- insulating film
- semiconductor device
- same
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
- C23C16/45531—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations specially adapted for making ternary or higher compositions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
- H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
- H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02194—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Inorganic Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
容量絶縁膜の両側にそれぞれ上部電極および下部電極が形成されてなるキャパシタであって、リーク電流の増加を抑制し、EOTの薄膜化が可能なキャパシタを提供することを目的としている。 容量絶縁膜の両側にそれぞれ上部電極および下部電極が形成されてなるキャパシタであって、前記容量絶縁膜は、ZrとAlとOとを主成分とし、ZrとAlの組成比が(1-x):x(0.01≦x≦0.15)であり、かつ結晶構造を有する誘電体からなり、前記下部電極がTiN膜と、Ru膜、Pt膜およびIr膜から選択されるいずれかの膜との積層構造からなり、かつRu膜、Pt膜およびIr膜から選択されるいずれかの膜が前記容量絶縁膜と接していることを特徴とする。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009539065A JP5373619B2 (ja) | 2007-10-30 | 2008-10-28 | キャパシタとそれを有する半導体装置およびキャパシタの製造方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-281512 | 2007-10-30 | ||
| JP2007281512 | 2007-10-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2009057589A1 true WO2009057589A1 (ja) | 2009-05-07 |
Family
ID=40590980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2008/069542 Ceased WO2009057589A1 (ja) | 2007-10-30 | 2008-10-28 | キャパシタとそれを有する半導体装置およびキャパシタの製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP5373619B2 (ja) |
| WO (1) | WO2009057589A1 (ja) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011018707A (ja) * | 2009-07-07 | 2011-01-27 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法及び基板処理装置 |
| JP2011044577A (ja) * | 2009-08-21 | 2011-03-03 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法 |
| JP2012069871A (ja) * | 2010-09-27 | 2012-04-05 | Elpida Memory Inc | 半導体装置及びその製造方法、並びに吸着サイト・ブロッキング原子層堆積法 |
| JP2013131749A (ja) * | 2011-12-20 | 2013-07-04 | Imec | 金属−絶縁体−金属スタックおよびその製造方法 |
| CN109494303A (zh) * | 2017-09-12 | 2019-03-19 | 松下知识产权经营株式会社 | 电容元件、图像传感器、电容元件的制造方法以及图像传感器的制造方法 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002033320A (ja) * | 2000-07-06 | 2002-01-31 | Sharp Corp | ドープジルコニアまたはジルコニア様の誘電体膜トランジスタ構造およびその堆積方法 |
| JP2004186516A (ja) * | 2002-12-05 | 2004-07-02 | Sony Corp | 強誘電体型不揮発性半導体メモリの製造方法 |
| JP2004214304A (ja) * | 2002-12-27 | 2004-07-29 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| JP2005259872A (ja) * | 2004-03-10 | 2005-09-22 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2007081265A (ja) * | 2005-09-16 | 2007-03-29 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2007150242A (ja) * | 2005-11-28 | 2007-06-14 | Hynix Semiconductor Inc | 半導体素子のキャパシタ製造方法 |
-
2008
- 2008-10-28 JP JP2009539065A patent/JP5373619B2/ja not_active Expired - Fee Related
- 2008-10-28 WO PCT/JP2008/069542 patent/WO2009057589A1/ja not_active Ceased
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002033320A (ja) * | 2000-07-06 | 2002-01-31 | Sharp Corp | ドープジルコニアまたはジルコニア様の誘電体膜トランジスタ構造およびその堆積方法 |
| JP2004186516A (ja) * | 2002-12-05 | 2004-07-02 | Sony Corp | 強誘電体型不揮発性半導体メモリの製造方法 |
| JP2004214304A (ja) * | 2002-12-27 | 2004-07-29 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| JP2005259872A (ja) * | 2004-03-10 | 2005-09-22 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2007081265A (ja) * | 2005-09-16 | 2007-03-29 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2007150242A (ja) * | 2005-11-28 | 2007-06-14 | Hynix Semiconductor Inc | 半導体素子のキャパシタ製造方法 |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011018707A (ja) * | 2009-07-07 | 2011-01-27 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法及び基板処理装置 |
| US8685866B2 (en) | 2009-07-07 | 2014-04-01 | Hitachi Kokusai Electric, Inc. | Method of manufacturing semiconductor device and substrate processing apparatus |
| JP2011044577A (ja) * | 2009-08-21 | 2011-03-03 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法 |
| JP2012069871A (ja) * | 2010-09-27 | 2012-04-05 | Elpida Memory Inc | 半導体装置及びその製造方法、並びに吸着サイト・ブロッキング原子層堆積法 |
| JP2013131749A (ja) * | 2011-12-20 | 2013-07-04 | Imec | 金属−絶縁体−金属スタックおよびその製造方法 |
| CN109494303A (zh) * | 2017-09-12 | 2019-03-19 | 松下知识产权经营株式会社 | 电容元件、图像传感器、电容元件的制造方法以及图像传感器的制造方法 |
| CN109494303B (zh) * | 2017-09-12 | 2024-01-19 | 松下知识产权经营株式会社 | 电容元件、图像传感器、电容元件的制造方法以及图像传感器的制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5373619B2 (ja) | 2013-12-18 |
| JPWO2009057589A1 (ja) | 2011-03-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2008099863A1 (ja) | 半導体,半導体装置及び相補型トランジスタ回路装置 | |
| WO2003052815A3 (en) | Electrode structure for use in an integrated circuit | |
| JP2019179924A5 (ja) | トランジスタ | |
| WO2008111188A1 (ja) | 半導体装置及びその製造方法 | |
| WO2008108128A1 (ja) | 誘電体、誘電体を用いたキャパシタ、誘電体を用いた半導体装置、及び誘電体の製造方法 | |
| TW200505033A (en) | Capacitor and method of fabricating the same | |
| WO2006081003A3 (en) | Metal gate transistor for cmos process and method for making | |
| WO2005034201A3 (en) | Metal-insulator-metal capacitor and method of fabrication | |
| WO2008149622A1 (ja) | キャパシタ,共振器、フィルタ装置,通信装置、並びに電気回路 | |
| WO2009057589A1 (ja) | キャパシタとそれを有する半導体装置およびキャパシタの製造方法 | |
| JP2007537595A5 (ja) | ||
| WO2008111199A1 (ja) | 半導体装置及びその製造方法 | |
| TW200701276A (en) | Multilayer ceramic capacitor and process for producing the same | |
| EP1699085A3 (en) | III-V nitride semiconductor device and production method thereof | |
| WO2011025631A3 (en) | Semiconductor crystal based radiation detector and method of producing the same | |
| EP2302663A3 (en) | Method of forming MIM capacitor | |
| JP2010177450A5 (ja) | 半導体装置 | |
| TW200632428A (en) | Active matrix substrate and its manufacturing method | |
| US9224947B1 (en) | Resistive RAM and method of manufacturing the same | |
| WO2008114418A1 (ja) | 半導体装置及びその製造方法 | |
| TWI478344B (zh) | 電晶體與其製造方法 | |
| TW200644130A (en) | A semiconductor device structure and method therefor | |
| TW200625532A (en) | Semiconductor device having mim element | |
| WO2009028235A1 (ja) | 回路基板及び表示装置 | |
| WO2006104562A3 (en) | Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 08843673 Country of ref document: EP Kind code of ref document: A1 |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 2009539065 Country of ref document: JP |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 08843673 Country of ref document: EP Kind code of ref document: A1 |