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WO2008111199A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
WO2008111199A1
WO2008111199A1 PCT/JP2007/055130 JP2007055130W WO2008111199A1 WO 2008111199 A1 WO2008111199 A1 WO 2008111199A1 JP 2007055130 W JP2007055130 W JP 2007055130W WO 2008111199 A1 WO2008111199 A1 WO 2008111199A1
Authority
WO
WIPO (PCT)
Prior art keywords
film
over
semiconductor device
electrode film
upper electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2007/055130
Other languages
English (en)
French (fr)
Inventor
Hideaki Kikuchi
Kouichi Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Priority to PCT/JP2007/055130 priority Critical patent/WO2008111199A1/ja
Priority to JP2009503839A priority patent/JP5212358B2/ja
Publication of WO2008111199A1 publication Critical patent/WO2008111199A1/ja
Priority to US12/541,639 priority patent/US20090302362A1/en
Anticipated expiration legal-status Critical
Priority to US13/769,287 priority patent/US8956881B2/en
Priority to US14/590,117 priority patent/US20150111310A1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/694—Electrodes comprising noble metals or noble metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers

Landscapes

  • Semiconductor Memories (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)

Abstract

【課題】エッチング時に発生する導電性微粒子による強誘電体キャパシタの短絡を防止でき、特性が良好であるとともに高集積化が可能な半導体装置及びその製造方法を提供する。 【解決手段】半導体基板１１０に形成されたトランジスタを覆う絶縁膜の上に、下部電極膜１３１、強誘電体膜１３２及び上部電極膜１３３を形成し、更にその上にキャップ層としてＰｔ膜１３４を形成する。そして、Ｐｔ膜１３４の上に所定のパターンのハードマスク（ＴｉＮ膜１３５及びＳｉＯ2膜１３６）を形成し、Ｐｔ膜１３４及び上部電極膜１３３をエッチングする。その後、全面に絶縁性保護膜１３８を形成し、上部電極膜１３３の側面を絶縁性保護膜１３８で覆う。次いで、強誘電体膜１３２及び下部電極膜１３１をエッチングして、強誘電体キャパシタを形成する。
PCT/JP2007/055130 2007-03-14 2007-03-14 半導体装置及びその製造方法 Ceased WO2008111199A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
PCT/JP2007/055130 WO2008111199A1 (ja) 2007-03-14 2007-03-14 半導体装置及びその製造方法
JP2009503839A JP5212358B2 (ja) 2007-03-14 2007-03-14 半導体装置の製造方法
US12/541,639 US20090302362A1 (en) 2007-03-14 2009-08-14 Semiconductor device and method of manufacturing the same
US13/769,287 US8956881B2 (en) 2007-03-14 2013-02-16 Method of manufacturing a FeRAM device
US14/590,117 US20150111310A1 (en) 2007-03-14 2015-01-06 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/055130 WO2008111199A1 (ja) 2007-03-14 2007-03-14 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/541,639 Continuation US20090302362A1 (en) 2007-03-14 2009-08-14 Semiconductor device and method of manufacturing the same

Publications (1)

Publication Number Publication Date
WO2008111199A1 true WO2008111199A1 (ja) 2008-09-18

Family

ID=39759150

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/055130 Ceased WO2008111199A1 (ja) 2007-03-14 2007-03-14 半導体装置及びその製造方法

Country Status (3)

Country Link
US (3) US20090302362A1 (ja)
JP (1) JP5212358B2 (ja)
WO (1) WO2008111199A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011148830A1 (ja) * 2010-05-28 2011-12-01 三菱重工業株式会社 半導体素子の窒化珪素膜、窒化珪素膜の製造方法及び装置
JP2020126866A (ja) * 2019-02-01 2020-08-20 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置

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KR101030765B1 (ko) * 2007-02-27 2011-04-27 후지쯔 세미컨덕터 가부시키가이샤 반도체 기억 장치, 반도체 기억 장치의 제조 방법, 및 패키지 수지 형성 방법
JP5036909B2 (ja) * 2009-12-18 2012-09-26 パナソニック株式会社 抵抗変化型素子及びその製造方法
JP2012151292A (ja) * 2011-01-19 2012-08-09 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
JP5862290B2 (ja) * 2011-12-28 2016-02-16 富士通セミコンダクター株式会社 半導体装置とその製造方法
US9111944B2 (en) * 2013-09-09 2015-08-18 Cypress Semiconductor Corporation Method of fabricating a ferroelectric capacitor
US9484196B2 (en) 2014-02-25 2016-11-01 Micron Technology, Inc. Semiconductor structures including liners comprising alucone and related methods
US9577010B2 (en) 2014-02-25 2017-02-21 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US9806129B2 (en) 2014-02-25 2017-10-31 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US11223014B2 (en) 2014-02-25 2022-01-11 Micron Technology, Inc. Semiconductor structures including liners comprising alucone and related methods
US10003022B2 (en) * 2014-03-04 2018-06-19 Taiwan Semiconductor Manufacturing Co., Ltd. RRAM cell structure with conductive etch-stop layer
US10249819B2 (en) * 2014-04-03 2019-04-02 Micron Technology, Inc. Methods of forming semiconductor structures including multi-portion liners
US9768378B2 (en) 2014-08-25 2017-09-19 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
US9748311B2 (en) 2014-11-07 2017-08-29 Micron Technology, Inc. Cross-point memory and methods for fabrication of same
TW201807832A (zh) * 2016-08-24 2018-03-01 聯華電子股份有限公司 半導體元件及其製作方法
US10276634B2 (en) * 2017-06-20 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor memory structure with magnetic tunnel junction (MTJ) cell
US10283700B2 (en) 2017-06-20 2019-05-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor memory structure with magnetic tunnel junction (MTJ) cell
JP7027916B2 (ja) 2018-01-31 2022-03-02 富士通セミコンダクターメモリソリューション株式会社 半導体装置及びその製造方法
KR20190122421A (ko) * 2018-04-20 2019-10-30 삼성전자주식회사 반도체 소자
US20240414924A1 (en) * 2023-06-06 2024-12-12 Taiwan Semiconductor Manufacturing Company, Ltd. Ferroelectric random access memory device and method
WO2025043021A1 (en) * 2023-08-21 2025-02-27 The Trustees Of The University Of Pennsylvania High-temperature ferroelectric memory devices

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997035341A1 (fr) * 1996-03-15 1997-09-25 Hitachi, Ltd. Dispositif de stockage a semi-conducteur et sa production

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002043540A (ja) * 1999-05-14 2002-02-08 Toshiba Corp 半導体装置
US6611014B1 (en) * 1999-05-14 2003-08-26 Kabushiki Kaisha Toshiba Semiconductor device having ferroelectric capacitor and hydrogen barrier film and manufacturing method thereof
JP2001036024A (ja) * 1999-07-16 2001-02-09 Nec Corp 容量及びその製造方法
US6635498B2 (en) * 2001-12-20 2003-10-21 Texas Instruments Incorporated Method of patterning a FeRAM capacitor with a sidewall during bottom electrode etch
US20030143853A1 (en) * 2002-01-31 2003-07-31 Celii Francis G. FeRAM capacitor stack etch
JP2003338608A (ja) * 2002-05-20 2003-11-28 Oki Electric Ind Co Ltd 強誘電体キャパシタ及びその製造方法
US6943039B2 (en) * 2003-02-11 2005-09-13 Applied Materials Inc. Method of etching ferroelectric layers
US7001821B2 (en) * 2003-11-10 2006-02-21 Texas Instruments Incorporated Method of forming and using a hardmask for forming ferroelectric capacitors in a semiconductor device
JP2005183842A (ja) * 2003-12-22 2005-07-07 Fujitsu Ltd 半導体装置の製造方法
JP2007266429A (ja) * 2006-03-29 2007-10-11 Fujitsu Ltd 半導体装置及びその製造方法
JP4690234B2 (ja) * 2006-03-31 2011-06-01 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP4946214B2 (ja) * 2006-06-30 2012-06-06 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4827653B2 (ja) * 2006-08-10 2011-11-30 富士通セミコンダクター株式会社 半導体装置とその製造方法
JP4983172B2 (ja) * 2006-09-12 2012-07-25 富士通セミコンダクター株式会社 半導体装置及びその製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997035341A1 (fr) * 1996-03-15 1997-09-25 Hitachi, Ltd. Dispositif de stockage a semi-conducteur et sa production

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011148830A1 (ja) * 2010-05-28 2011-12-01 三菱重工業株式会社 半導体素子の窒化珪素膜、窒化珪素膜の製造方法及び装置
JP2011249626A (ja) * 2010-05-28 2011-12-08 Mitsubishi Heavy Ind Ltd 半導体素子の窒化珪素膜、窒化珪素膜の製造方法及び装置
JP2020126866A (ja) * 2019-02-01 2020-08-20 富士通セミコンダクター株式会社 半導体装置の製造方法及び半導体装置
JP7360004B2 (ja) 2019-02-01 2023-10-12 富士通セミコンダクターメモリソリューション株式会社 半導体装置の製造方法及び半導体装置

Also Published As

Publication number Publication date
JPWO2008111199A1 (ja) 2010-06-24
US20090302362A1 (en) 2009-12-10
US20150111310A1 (en) 2015-04-23
US20130161790A1 (en) 2013-06-27
JP5212358B2 (ja) 2013-06-19
US8956881B2 (en) 2015-02-17

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