RU2849027C1 - Binary subtractor - Google Patents

Abstract

FIELD: computing technology.

SUBSTANCE: invention can be used to construct automation devices, functional control system units, etc. The binary subtractor contains seven exclusive OR elements (1₁,…,1₇), three AND elements (2₁, 2₂, 2₃), an OR element (3) and three majority elements (4_1, 4_2, 4₃). These elements and a new circuit for connecting them enable the processing of three-digit binary numbers.

EFFECT: technical result - expansion of functional capabilities by ensuring the formation of a binary code representing the difference between three three-digit binary numbers specified by binary signals, and the formation of a bit determining its sign.

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Description

The invention relates to computing technology and can be used for constructing automation equipment, functional units of control systems, etc.

A binary subtractor is known [1], which contains logical elements and forms a binary code for the difference of three two-digit binary numbers specified by binary signals, and a bit that determines its sign.

The reason that prevents the achievement of the technical result specified below when using the known binary subtractor is the limited functionality due to the fact that the processing of three three-digit binary numbers is not allowed.

The closest device for the same purpose to the claimed invention in terms of its set of features is the binary subtractor [2], adopted as a prototype, which contains four exclusive OR elements, an AND element, an OR element, two majority elements and forms a binary code for the difference of three two-digit binary numbers specified by binary signals, and a bit that determines its sign.

The reason that prevents the achievement of the technical result specified below when using the prototype includes limited functionality due to the fact that the processing of three three-digit binary numbers is not allowed.

The technical result of the invention is the expansion of functional capabilities by ensuring the formation of a binary code for the difference of three three-digit binary numbers specified by binary signals, and the formation of a bit that determines its sign.

The said technical result in the implementation of the invention is achieved by the fact that in a binary subtractor containing four elements exclusive OR, an AND element, an OR element and two majority elements, the output and the second, third inputs of the i -th ( ), the first and second inputs of the fourth exclusive OR elements are connected respectively to the first, second, third inputs of the i -th majority element, the first and second inputs of the OR element, and the output of the first and first, second, third inputs of the i -th exclusive OR elements are connected respectively to the first output and ( )-th, ( )-th, ( )-th inputs of the binary subtractor, the peculiarity is that three exclusive OR elements, two AND elements and a third majority element are additionally introduced into it, the first and second inputs of the j -th ( ) of the AND element, the first input ( )-th and third input of the fourth elements of the exclusive OR are connected respectively to the output and first input ( )-th element of the exclusive OR, the output of the i -th majority element and the combined third input of the OR element, the output of the third majority element, the second inputs of the fifth, sixth, seventh and the first, second inputs of the fourth elements of the exclusive OR are connected respectively to the outputs of the second, third, sixth elements of the exclusive OR and the outputs of the third, second AND elements, the output and the second, third inputs of the third, first input and output of the seventh elements of the exclusive OR, the output of the OR element are connected respectively to the first and second, third inputs of the third majority element, the output of the first AND element and the third, fifth outputs of the binary subtractor, the second, fourth outputs and ( )-th input of which is connected respectively to the outputs of the fifth, fourth and j -th input of the third element of the exclusive OR.

The drawing shows the circuit diagram of the proposed binary subtractor.

The binary subtractor contains the elements exclusive OR 1 ₁ ,…,1 ₇ , the elements AND 2 ₁ , 2 ₂ , 2 ₃ , the element OR 3 and the majority elements 4 ₁ , 4 ₂ , 4 ₃ , where the output and the second, third inputs of the element 1 _j ( ), the first and second inputs of element 2 _j are connected respectively to the first and second, third inputs of element 4 _j , the output and the first input of element 1 _{j +4} , the output of element 4 ₃ and the j -th input of element 1 ₄ are connected respectively to the third input of element 1 ₄ and the j -th input of element 3, the outputs of elements 4 ₁ , 4 ₂ , 2 ₁ , 2 ₃ and the second inputs of elements 1 ₅ , 1 ₆ , 1 ₇ , 1 ₄ are connected respectively to the first inputs of elements 1 ₅ , 1 ₆ , 1 ₇ , 1 ₄ and the outputs of elements 1 ₂ , 1 ₃ , 1 ₆ , 2 ₂ , and the first, second, third inputs of element 1 _j and the outputs of elements 1 ₁ , 1 ₅ , 1 ₇ , 1 ₄ , 3 are connected respectively to ( )-mu, ( )-mu, ( )-th inputs and the first, second, third, fourth, fifth outputs of the binary subtractor.

The operation of the proposed binary subtractor is carried out as follows. On its ( )-th ( ), ( )-th, ( )-th inputs are supplied with binary signals respectively , which specify the three-digit binary numbers to be processed , , , moreover And determine the values of the most significant and least significant digits, respectively. Since the sets ( , , ), ( , , ), ( , , ) signal values are equivalent for the group of elements 1 _j , 4 _j and since for this group the sets ( , , ), ( , , ), ( , , ), it is sufficient to consider the functioning of the proposed binary subtractor when the group of elements 1 _j , 4 _j is affected by the following sets: ( , , ), ( , , ), ( , , ), ( , , ). The table below shows all possible combinations of such sets for signals. , , and the output signal values corresponding to these combinations of the proposed binary subtractor, obtained taking into account the operation of its elements.

000 000 000 00000 011 000 000 11000 000 000 001 11111 011 000 001 10111 000 000 011 11110 011 000 011 10110 000 000 100 00001 011 000 100 11001 000 001 000 11110 011 001 000 10110 000 001 001 11101 011 001 001 10101 000 001 011 11100 011 001 011 10100 000 001 100 11111 011 001 100 10111 000 011 000 11100 011 011 000 10100 000 011 001 11011 011 011 001 10011 000 011 011 11010 011 011 011 10010 000 011 100 11101 011 011 100 10101 000 100 000 00010 011 100 000 11010 000 100 001 00001 011 100 001 11001 000 100 011 00000 011 100 011 11000 000 100 100 00011 011 100 100 11011 001 000 000 11100 100 000 000 00100 001 000 001 11011 100 000 001 00011 001 000 011 11010 100 000 011 00010 001 000 100 11101 100 000 100 00101 001 001 000 11010 100 001 000 00010 001 001 001 11001 100 001 001 00001 001 001 011 11000 100 001 011 00000 001 001 100 11011 100 001 100 00011 001 011 000 11000 100 011 000 00000 001 011 001 10111 100 011 001 11111 001 011 011 10110 100 011 011 11110 001 011 100 11001 100 011 100 00001 001 100 000 11110 100 100 000 00110 001 100 001 11101 100 100 001 00101 001 100 011 11100 100 100 011 00100 001 100 100 11111 100 100 100 00111

According to the table presented, we have , Where - a four-digit binary number specified by binary signals ( And determine the values of the senior and junior digits, respectively), and if the number D is positive or , That , if negative, then and it is presented in additional code.

The above information allows us to conclude that the proposed binary subtractor has broader functional capabilities compared to the prototype, since it generates a binary code for the difference of three three-digit binary numbers specified by binary signals, and a bit that determines its sign.

Sources of information:

1. Russian Federation Patent 2709653, class G06F7/50, 2019.

2. Russian Federation Patent 2789731, class G06F7/50, 2023.

Claims (1)

A binary subtractor containing four XOR elements, an AND element, an OR element, and two majority elements, with the output and the second and third inputs of the i -th ( ), the first and second inputs of the fourth exclusive OR elements are connected respectively to the first, second, third inputs of the i -th majority element, the first and second inputs of the OR element, and the output of the first and first, second, third inputs of the i -th exclusive OR elements are connected respectively to the first output and ( )-th, ( )-th, ( )-th inputs of a binary subtractor, characterized in that three exclusive OR elements, two AND elements and a third majority element are additionally introduced into it, the first and second inputs of the j -th ( ) of the AND element, the first input ( )-th and third input of the fourth elements of the exclusive OR are connected respectively to the output and first input ( )-th element of the exclusive OR, the output of the i -th majority element and the combined third input of the OR element, the output of the third majority element, the second inputs of the fifth, sixth, seventh and the first, second inputs of the fourth elements of the exclusive OR are connected respectively to the outputs of the second, third, sixth elements of the exclusive OR and the outputs of the third, second AND elements, the output and the second, third inputs of the third, first input and output of the seventh elements of the exclusive OR, the output of the OR element are connected respectively to the first and second, third inputs of the third majority element, the output of the first AND element and the third, fifth outputs of the binary subtractor, the second, fourth outputs and ( )-th input of which is connected respectively to the outputs of the fifth, fourth and j -th input of the third element of the exclusive OR.