WO2018103389A9 - 显示驱动方法、显示驱动装置及显示装置 - Google Patents
显示驱动方法、显示驱动装置及显示装置 Download PDFInfo
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- WO2018103389A9 WO2018103389A9 PCT/CN2017/100253 CN2017100253W WO2018103389A9 WO 2018103389 A9 WO2018103389 A9 WO 2018103389A9 CN 2017100253 W CN2017100253 W CN 2017100253W WO 2018103389 A9 WO2018103389 A9 WO 2018103389A9
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
- G09G2310/0205—Simultaneous scanning of several lines in flat panels
- G09G2310/021—Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
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- G09G2340/0414—Vertical resolution change
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
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- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
- G09G2340/0421—Horizontal resolution change
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
Definitions
- the present application relates to the field of liquid crystal display technology, and in particular, to a display driving method, a display driving device, and a display device.
- UD Ultra High Definition, Ultra HD
- TCON Timer Control
- logic board Design PCBA
- the main object of the present application is to provide a display driving method performed by a computer device that can reduce the overall cost of defective UD glass panels.
- the present application provides a display driving method performed by a computer device, which is applied to an ultra high definition display panel.
- the ultra high definition display panel is driven by an FHD logic board, and includes the following steps:
- Receiving an input image signal, and decoding is divided into a first image signal and a fourth image signal;
- the second image signal, the third image signal, and the fifth image signal and the sixth image signal are input to the display panel, and the image is displayed in combination with the gate driving signal.
- the gate drive signal is driven in pairs on the scan lines of the display panel.
- the second image signal and the third image signal are both differential signals.
- the step of “copying the first image signal to obtain the second image signal and the third image signal, and copying the fourth image signal to obtain the fifth image signal and the sixth image signal signal” includes:
- the second image signal, the third image signal, the fifth image signal, and the sixth image signal are grouped to obtain two pixel signals respectively.
- the display panel is driven by M source drivers and M gate drivers, where M is a positive integer.
- each source driver includes one clock line, six data lines, and one data transfer trigger line.
- the application also provides a display driving device, the device comprising:
- a decoding module configured to receive an input image signal, and after decoding, is divided into a first image signal and a fourth image signal;
- a timing processing module configured to copy the first image signal to obtain the second image signal and the third image signal, and copy the fourth image signal to obtain the fifth image signal and the sixth image signal;
- the driving module is configured to input the second image signal, the third image signal, and the fifth image signal and the sixth image signal to the display panel, and display the image in combination with the gate driving signal.
- the gate drive signal is driven in pairs on the scan lines of the display panel.
- the second image signal and the third image signal are both differential signals.
- the timing processing module is configured to receive the input first image signal after the signal line of the second image signal and the signal line of the third image signal are connected one by one; and to the fifth image The signal line of the signal is connected to the signal line of the sixth image signal one by one, and then receives the input fourth image signal.
- the display panel is driven by M source drivers and M gate drivers, where M is a positive integer.
- each source driver includes one clock line, six data lines, and one data transfer trigger line.
- the present application further provides a display device including a display panel, a driving component, and a display driving device as described above, wherein the display driving device includes:
- a decoding module configured to receive an input image signal, and decode the image signal into a first image signal and a fourth image signal;
- the timing processing module is configured to: copy the first image signal to obtain the second image signal and the third image signal, and copy the fourth image signal to obtain the fifth image signal and the sixth image signal; and the second image signal and the third image signal
- the image signal, the fifth image signal, and the sixth image signal are grouped to obtain two pixel signals respectively;
- the driving module is configured to input the second image signal, the third image signal, and the fifth image signal and the sixth image signal to the display panel, and display the image in combination with the gate driving signal.
- the technical solution of the present application passes the input FHD (Full High Definition, Full HD)
- the image signal is decoded to obtain the first image signal and the fourth image signal, and further the first image signal is copied and divided into two identical signals, and the right divided image signal is copied and divided into Two identical signals, thus obtaining the four image signals required by the UD display panel: the second image signal, the third image signal, the fifth image signal, and the sixth image signal, combined with the gate driving signal of the display panel
- the FHD image signal is displayed on the UD display panel, and the FHD image signal is used to display the FHD image signal on the UD display panel.
- the hardware cost is greatly reduced, thereby reducing the The overall cost of defective UD glass panels.
- FIG. 1 is a flow chart of an embodiment of a display driving method of the present application.
- FIG. 2 is a schematic diagram of displaying an FHD image signal based on a UD display panel architecture
- FIG. 3 is a functional block diagram of a display panel driver
- FIG. 4 is a schematic structural view of a display driving device according to the present application.
- Figure 5 is a schematic view showing the connection of the source driving the right side portion of Figure 4.
- FIG. 6 is a timing diagram of a gate driving waveform of the present application.
- FIG. 7 is a functional block diagram of an embodiment of a display driving apparatus according to the present application.
- first”, “second”, and the like in this application are used for the purpose of description only, and are not to be construed as indicating or implying their relative importance or implicitly indicating the number of technical features indicated.
- features defining “first” or “second” may include at least one of the features, either explicitly or implicitly.
- the technical solutions between the various embodiments may be combined with each other, but must be based on the realization of those skilled in the art, and when the combination of the technical solutions is contradictory or impossible to implement, it should be considered that the combination of the technical solutions does not exist. Nor is it within the scope of protection required by this application.
- the present application proposes a display driving method.
- the display driving method can be applied to an ultra high definition display panel, and the ultra high definition display panel can be, for example, FHD (Full High). Definition, Full HD) Logic board driver, including the following steps:
- S100 Receive an input image signal, and after decoding, divide into a first image signal and a fourth image signal;
- the sharpness of the FHD image signal is lower than that of the UD image signal. Since the display panel used is a defective product, for example, some pixels in the display panel may be defective. For UD image signals, these defective display panels cannot display the image completely, but for low-definition FHD image signals, the sensitivity of the human eye to defects can be reduced.
- the first image signal is a left partition image signal
- the fourth image signal is a right partition image signal
- the input FHD image signal is finally divided into four signals, which are a second image signal, a third image signal, and a fifth image signal and a sixth image signal, and each of the divided image signals is responsible for 1/4.
- the screen is displayed to match the UD's display panel.
- FIG. 2 is a schematic diagram of displaying an FHD image signal based on a UD display panel architecture according to the technical solution of the present application.
- the input image low-resolution FHD image signal resolution is 11, 12, 13, 21, 22, 23, 31, 32, 33, respectively, after FHD TCON decoding and copy processing, a single resolution is copied It has become four, and the display effect on the display panel of the UD is that the adjacent pixels of the top, bottom, left, and right display the same resolution.
- the FHD image signal is displayed on the UD display panel.
- the driving of the display panel of the type of IPS, VA, TN, OCB, etc. is generally performed by the cooperation of the source driver and the gate driver.
- the FHD image signal is input to TCON
- the converted data signal is generated, and the clock control signals of the source driver and the gate driver are generated.
- the data signal is loaded by the source driver, and the timing is controlled by the gate driver to realize the scan display of the image.
- the technical solution of the present application obtains the first image signal and the fourth image signal by decoding the input FHD, and further copies the first image signal into two identical signals, and copies the right-divided image signal. Divided into two identical signals, thus obtaining the four image signals required by the UD display panel: the second image signal, the third image signal, the fifth image signal, and the sixth image signal, and combined with the gate of the display panel.
- the driving signal is used to display the FHD image signal on the UD display panel, and the FHD image signal is displayed on the UD display panel by using the FHD driving method, and the hardware cost is greatly reduced compared with the existing UD driving method. Reduced the overall cost of defective UD glass panels.
- UD is adopted.
- 1D1G (where D represents the data line, G represents the scan line, and the number of independent inputs of the data line and scan line are both 1) drive architecture scheme.
- the drive architecture includes M source drivers and M gate drivers. Among them, the M source driver and the M gate driver are symmetrically arranged, and M is a positive integer. In the actual design, the number of M can be flexibly set, for example, M can be 12.
- the 12 source drivers are divided into two groups, each of which includes 6 source drivers. Among them, every 3 source drivers share a data interface.
- the 12 source drivers comprise a total of four data interfaces to receive FHD separately Four image signals input by TCON.
- the right group includes source drivers S1, S2, S3, S4, S5, S6 arranged in order from the left.
- Each source driver includes one clock line, six data lines, and one data transfer trigger line.
- the source drivers S1, S2, and S3 share one data interface, and S4, S5, and S6 share one data interface.
- the six data lines of S1, S2, and S3 are short-circuited one by one, the clock lines are short-circuited, and the data transmission trigger lines are short-circuited one by one, and the short-circuited one is taken out from the A interface and connected to the TCON board.
- S4, S5, and S6 are shorted and then extracted from the B interface.
- the lead line of the A interface includes one clock line R-ACLK, and the six data lines are respectively R-ALV0 ⁇ R-ALV5;
- the lead line of the B interface includes one clock line R-BCLK, and the six data lines are respectively R-B BLV0 ⁇ R-BLV5.
- the A and B interfaces also include data transmission trigger lines S3-DIO1, S4-DIO2.
- the right group also includes the mode switching line UCFT Mode, the switching lines are respectively connected to S1, S2, S3, S4, S5, S6, so as to switch between the UD mode and the FHD mode.
- the left group includes the C interface and the D interface; the C interface leads include one clock line R-CCLK, and the six data lines are R-CLV0 ⁇ R-CLV5; the D interface leads include One clock line R-DCLK, six data lines are R-DLV0 ⁇ R-DLV5.
- the C and D interfaces also include data transmission trigger lines S9-DIO3 and S10-DIO4.
- the left group also includes the mode switching line UCFT Mode, the switching line is respectively connected with S7, S8, S9, S10, S11, S12, so as to switch between the UD mode and the FHD mode.
- Each source driver drives 320 columns of pixels, and the 12 source drivers drive a total of 3840 columns of pixels.
- the 12 gate drivers are respectively GR1 ⁇ GR6 and GL1 ⁇ GL6, wherein GR1 ⁇ GR6 are located on the right side of the display panel, and GL1 ⁇ GL6 are located on the left side of the display panel.
- Each gate driver drives 360 rows of pixels.
- the gate driving signal is driven in pairs on the scan lines of the display panel. That is, drive P1/P2 first, then P3/P4, P5/P6•••••• until P2159/P2160.
- FIG. 6 is a waveform diagram of the gate driving.
- the gate driving signals G1 G G2160 are driven in pairs.
- the paired drive signals sequentially drive P1 ⁇ P2160.
- OE is the enable signal
- DATE is the data clock signal.
- the second image signal and the third image signal are both differential signals. That is, the input of interface A, B, C, D is mini LVDS.
- the step of “copying the first image signal to obtain the second image signal and the third image signal, and copying the fourth image signal to obtain the fifth image signal and the sixth image signal” includes:
- the signal is copied by shorting the input line corresponding to each source driver.
- the second image signal, the third image signal, the fifth image signal, and the sixth image signal each include two RGB pixel signals. That is, the second image signal, the third image signal, the fifth image signal, and the sixth image signal are grouped to obtain two sets of pixel signals.
- R-ALV0 ⁇ R-ALV2 input 1 RGB pixel signal
- R-ALV3 ⁇ R- ALV5 inputs 1 RGB pixel signal.
- the present application further provides a display driving device, which can be applied to a display, a flat panel display, a television display screen, a computer display screen, etc., wherein the flat panel display is, for example, a liquid crystal display or a plasma display. Electroluminescent display, etc.
- the device includes:
- the decoding module 100 is configured to receive an input image signal, and after decoding, is divided into a first image signal and a fourth image signal;
- the timing processing module 200 is configured to: copy the first image signal to obtain the second image signal and the third image signal, and copy the fourth image signal to obtain the fifth image signal and the sixth image signal;
- the driving module 300 is configured to input the second image signal, the third image signal, and the fifth image signal and the sixth image signal to the display panel, and display the image in combination with the gate driving signal.
- the gate driving signal is driven in pairs on the scan lines of the display panel.
- the second image signal and the third image signal are both differential signals.
- the timing processing module :
- the technical solution of the present application effectively reduces the driving cost of the display panel based on the UD architecture.
- the present application provides a display driving device including a processor and a nonvolatile memory, the nonvolatile memory storing executable instructions, the processor executing executable instructions for executing The methods described in the various embodiments described above are achieved.
- the modules/units 100, 200, 300 shown in Figure 7 of the present application can be software modules or software units.
- various software modules or software units may be inherently stored in a non-volatile memory and executed by a processor.
- the present application further provides a display device including a display panel, a driving component, and a display driving device as described above, wherein the display driving device includes: a decoding module for receiving an input image signal, and decoding An image signal and a fourth image signal; the timing processing module is configured to copy the first image signal to obtain the second image signal and the third image signal, and copy the fourth image signal to obtain the fifth image signal and the sixth image signal; The second image signal, the third image signal, the fifth image signal, and the sixth image signal are grouped to obtain two pixel signals respectively; and a driving module, configured to use the second image signal and the third image signal, And the fifth image signal and the sixth image signal are input to the display panel, and the image is displayed in combination with the gate driving signal.
- the display driving device includes: a decoding module for receiving an input image signal, and decoding An image signal and a fourth image signal; the timing processing module is configured to copy the first image signal to obtain the second image signal and the third image signal, and copy the fourth image signal to obtain the fifth image signal
- the display device of the present application may be a liquid crystal display device, an OLED display device, or other display device, which may include a liquid crystal television, a computer liquid crystal display, a notebook computer, or the like.
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Abstract
一种显示驱动方法、显示驱动装置及显示装置,其中显示驱动方法包括以下步骤:接收输入的图像信号,解码后分为第一图像信号及第四图像信号(S100);将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号(S200);将第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示(S300),从而可以降低UD玻璃面板的次品整体成本。
Description
技术领域
本申请涉及液晶显示技术领域,特别涉及一种显示驱动方法、显示驱动装置及显示装置。
背景技术
目前UD(Ultra High
Definition,超高清)电视的玻璃面板通常采用UD的TCON(Timer Control
Register,逻辑板)进行PCBA的设计,来显示UD的玻璃面板。
但是在电视机生产的过程中会出现一些UD玻璃面板的次品,通常是采用较低的售价处理这些次品。但是,现有的方案仍然是采用价格昂贵的UD
TCON的设计去驱动,造成UD玻璃面板的次品整体成本仍然较高。
发明内容
本申请的主要目的是提供一种由计算机设备执行的显示驱动方法,其可降低UD玻璃面板的次品整体成本。
为实现上述目的,本申请提出了一种由计算机设备执行的显示驱动方法,应用于超高清显示面板,所述超高清显示面板采用FHD逻辑板驱动,包括以下步骤:
接收输入的图像信号,解码后分为第一图像信号及第四图像信号;
将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;
将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
在一实施例中,所述栅极驱动信号对显示面板的扫描线成对驱动。
在一实施例中,所述第二图像信号及所述第三图像信号均为差分信号。
在一实施例中,所述步骤“将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号信号”包括:
将第二图像信号的信号线与第三图像信号的信号线一一连接后接收输入的所述第一图像信号;将第五图像信号的信号线与第六图像信号的信号线一一连接后接收输入的第四图像信号。
在一实施例中,对所述第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两路像素信号。
在一实施例中,所述显示面板采用M颗源极驱动器以及M颗栅极驱动器进行驱动,其中M为正整数。
在一实施例中,每一源极驱动器包括1路时钟线、6路数据线及1路数据传输触发线。
本申请还提出一种显示驱动装置,该装置包括:
解码模块:用以接收输入的图像信号,解码后分为第一图像信号及第四图像信号;
时序处理模块:用以将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;
驱动模块:用以将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
在一实施例中,所述栅极驱动信号对显示面板的扫描线成对驱动。
在一实施例中,所述第二图像信号及所述第三图像信号均为差分信号。
在一实施例中,其中,所述时序处理模块:用以对第二图像信号的信号线与第三图像信号的信号线一一连接后接收输入的所述第一图像信号;对第五图像信号的信号线与第六图像信号的信号线一一连接后接收输入的第四图像信号。
在一实施例中,所述显示面板采用M颗源极驱动器以及M颗栅极驱动器进行驱动,其中M为正整数。
在一实施例中,每一源极驱动器包括1路时钟线、6路数据线及1路数据传输触发线。
本申请还提出一种显示装置,所述显示装置包括显示面板;驱动部件;以及如上所述的显示驱动装置,其中所述显示驱动装置包括:
解码模块:用以接收输入的图像信号,解码为第一图像信号及第四图像信号;
时序处理模块:用以将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;对所述第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两路像素信号;以及
驱动模块:用以将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
本申请技术方案通过将输入的FHD(Full High
Definition,全高清)图像信号进行解码得到第一图像信号和第四图像信号,再进一步的将第一图像信号复制后分为两路完全一样的信号,将右分区的图像信号进行复制后分为两路完全一样的信号,如此得到UD显示面板所需的四路图像信号:第二图像信号、第三图像信号、第五图像信号、及第六图像信号,再结合显示面板的栅极驱动信号,将FHD的图像信号显示于UD显示面板上,采用FHD的驱动方式来将FHD图像信号显示于UD显示面板上,相较于现有的UD驱动方式,其硬件成本大大降低了,从而降低了UD玻璃面板的次品整体成本。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图示出的结构获得其他的附图。
图1为本申请显示驱动方法一实施例的流程图;
图2为基于UD显示面板架构来显示FHD图像信号的示意图;
图3为显示面板驱动的功能模块图;
图4为本申请显示驱动装置的结构示意图;
图5为源极驱动图4中右侧部分线路的连接示意图;
图6为本申请栅极驱动波形时序示意图;
图7为本申请显示驱动装置一实施例的功能模块图。
本申请目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请的一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
需要说明,本申请实施例中所有方向性指示(诸如上、下、左、右、前、后……)仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。
另外,在本申请中涉及“第一”、“第二”等的描述仅用于描述目的,而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外,各个实施例之间的技术方案可以相互结合,但是必须是以本领域普通技术人员能够实现为基础,当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在,也不在本申请要求的保护范围之内。
本申请提出一种显示驱动方法。
参照图1,在本申请实施例中,该显示驱动方法,可应用于超高清显示面板,所述超高清显示面板例如可采用FHD(Full High
Definition,全高清)逻辑板驱动,包括以下步骤:
S100、接收输入的图像信号,解码后分为第一图像信号及第四图像信号;
S200、将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;
S300、将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,并根据栅极驱动信号,对图像进行显示。
需要说明的是,FHD图像信号的清晰度要低于UD的图像信号清晰度。由于采用的显示面板是次品,例如可能显示面板中有一些像素点有缺陷。对于UD图像信号,这些有缺陷的显示面板不能完整显示图像,但是对于低清晰度的FHD图像信号则则可以降低人眼对缺陷的敏感程度。
本实施例中,第一图像信号为左分区图像信号,第四图像信号为右分区图像信号。
本实施例中,将输入的FHD图像信号最终分成四路信号,分别为第二图像信号、第三图像信号,及第五图像信号、第六图像信号,每一分区图像信号各负责1/4的画面显示,以去匹配UD的显示面板。
参照图2,图2为本申请技术方案的基于UD显示面板架构来显示FHD图像信号的示意图。
例如,输入的图像低清晰度的FHD图像信号解析度分别为11、12、13、21、22、23、31、32、33,经过FHD的TCON解码及复制处理后,单个解析度都被复制成了四个,在UD的显示面板上呈现的显示效果就是相邻的上下左右的像素点均显示相同的解析度。实现了FHD图像信号在UD显示面板上显示。
参照图3,通常IPS、VA、TN、OCB等类型的显示面板的驱动是由源极驱动器和栅极驱动器共同配合驱动完成的。FHD图像信号输入至TCON后,经变换处理后生成了显示的数据信号,及源极驱动器和栅极驱动器的时钟控制信号。具体是,通过源极驱动器装载数据信号,通过栅极驱动器控制时序,实现了图像的扫描显示。
本申请技术方案通过将输入的FHD进行解码得到第一图像信号和第四图像信号,再进一步的将第一图像信号复制后分为两路完全一样的信号,将右分区的图像信号进行复制后分为两路完全一样的信号,如此得到UD显示面板所需的四路图像信号:第二图像信号、第三图像信号、第五图像信号、及第六图像信号,再结合显示面板的栅极驱动信号,将FHD的图像信号显示与UD显示面板上,采用FHD的驱动方式来将FHD图像信号显示于UD显示面板上,相较于现有的UD驱动方式,其硬件成本大大降低了,从而降低了UD玻璃面板的次品整体成本。
参照图4及图5,本申请实施例中,采用UD
的1D1G(其中,D表示数据线,G表示扫描线,数据线和扫描线独立输入的数量均为1)驱动架构方案。该驱动架构包括M颗源极驱动器以及M颗栅极驱动器。其中,M颗源极驱动器以及M颗栅极驱动器呈对称设置,M正整数。实际设计中,可灵活设置M的颗数,例如M可为12。
实际设置中,12颗源极驱动器分成左右两组,每一组均包括6颗源极驱动器。其中,每3颗源极驱动器共用一个数据接口。因而12颗源极驱动器总共包括四个数据接口,以分别接收FHD
TCON输入的四路图像信号。
由于左右两组源极驱动结构完全相同,这里以右边的一组进行说明。
右边的一组包括由向左依次排列的源极驱动器S1、S2、S3、S4、S5、S6。每一源极驱动器包括1路时钟线、6路数据线及1路数据传输触发线。源极驱动器S1、S2、S3共用一个数据接口,S4、S5、S6则共用一个数据接口。
其中S1、S2、S3的各自6路数据线一一短接、时钟线一一短接、数据传输触发线一一短接,短接之后的从A接口引出,与TCON板连接。同理,S4、S5、S6短接之后从B接口引出。A接口的引出线包括1路时钟线R-ACLK,6路数据线分别为R-ALV0~R-ALV5;B接口的引出线包括1路时钟线R-BCLK,6路数据线分别为R-BLV0~R-BLV5。A、B接口还各包括数据传输触发线S3-DIO1、S4-DIO2。此外,右边的一组还包括有模式切换线UCFT
mode,该切换线分别与S1、S2、S3、S4、S5、S6连接,以便于切换UD模式和FHD模式两种显示驱动模式。
易于理解的是,左边的一组包括C接口及D接口;C接口的引出线包括1路时钟线R-CCLK,6路数据线分别为R-CLV0~R-CLV5;D接口的引出线包括1路时钟线R-DCLK,6路数据线分别为R-DLV0~R-DLV5。C、D接口还各包括数据传输触发线S9-DIO3、S10-DIO4。此外,左边的一组还包括有模式切换线UCFT
mode,该切换线分别与S7、S8、S9、S10、S11、S12连接,以便于切换UD模式和FHD模式两种显示驱动模式。
每一个源极驱动器驱动320列像素,12个源极驱动器总共驱动3840列像素。
本实施例中,还包括12颗栅极驱动器分别为GR1~GR6,GL1~GL6,其中GR1~GR6位于显示面板的右侧,GL1~GL6位于显示面板的左侧。每一栅极驱动器驱动360行像素。本实施例中,共有2160行像素,P1~P2160。具体地,所述栅极驱动信号对显示面板的扫描线成对驱动。即先驱动P1/P2,然后依次P3/P4、P5/P6••••••一直到P2159/P2160。
参照图6,图6为栅极驱动的波形图,由图可以看出,栅极驱动信号G1~G2160成对驱动。成对的驱动信号依次对P1~P2160进行驱动。其中OE为使能信号,DATE为数据时钟信号。
本实施例中,所述第二图像信号及所述第三图像信号均为差分信号。即接口A、B、C、D输入为mini
LVDS。
具体地,所述步骤“将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号”包括:
将第二图像信号的信号线与第三图像信号的信号线一一连接后接收输入的所述第一图像信号;将第五图像信号的信号线与第六图像信号的信号线一一连接后接收输入的第四图像信号。本实施例中是通过短接每个源极驱动器对应的输入线来复制信号。
具体地,所述第二图像信号、第三图像信号、第五图像信号、第六图像信号均包括两路RGB像素信号。即对第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两组像素信号。
需要说明的是,例如R-ALV0~R-ALV2输入1路RGB像素信号,R-ALV3~R-
ALV5输入1路RGB像素信号。
参照图7,本申请还提出一种基于显示驱动装置,该显示驱动装置可应用于显示器上,平板显示器、电视机显示屏、电脑显示屏等,其中平板显示器例如为液晶显示器、等离子体显示器、电致发光显示器等。该装置包括:
解码模块100:用以接收输入的图像信号,解码后分为第一图像信号及第四图像信号;
时序处理模块200:用以将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;以及
驱动模块300:用以将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
具体地,所述栅极驱动信号对显示面板的扫描线成对驱动。
优选地,所述第二图像信号及所述第三图像信号均为差分信号。
具体地,所述时序处理模块:
将第二图像信号的信号线与第三图像信号的信号线一一连接后接收输入的所述第一图像信号;将第五图像信号的信号线与第六图像信号的信号线一一连接后接收输入的第四图像信号。
具体地,对所述第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两路像素信号,即所述第二图像信号、第三图像信号、第五图像信号、第六图像信号均包括两路RGB像素信号。本申请技术方案有效降低了基于UD架构显示面板的驱动成本。
本领域普通技术人员应当理解,本申请提供一种显示驱动装置,显示驱动装置包括处理器和非易失性存储器,该非易失性存储器存储可执行指令,该处理器执行可执行指令用以实现以上所描述的各实施例所记载的方法。本领域普通技术人员应当进一步理解,本申请附图7中所显示的模块/单元100、200、300可为软件模块或者软件单元。此外,各种软件模块或软件单元可以固有地存储在非易失性存储器中并通过处理器进行执行。
本申请还提出一种显示装置,该显示装置包括显示面板;驱动部件;以及如上所述的显示驱动装置,其中所述显示驱动装置包括:解码模块,用以接收输入的图像信号,解码为第一图像信号及第四图像信号;时序处理模块,用以将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;对所述第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两路像素信号;以及驱动模块,用以将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
该显示驱动装置的具体结构参照上述实施例,由于本显示装置采用了上述所有实施例的全部技术方案,因此至少具有上述实施例的技术方案所带来的所有有益效果,在此不再一一赘述
在一些实施例中,本申请的显示装置可为液晶显示装置、OLED显示装置或其他显示装置,其可包括液晶电视机、电脑液晶显示器、笔记本电脑等。
以上所述仅为本申请的优选实施例,并非因此限制本申请的专利范围,凡是在本申请的发明构思下,利用本申请说明书及附图内容所作的等效结构变换,或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。
Claims (14)
- 一种显示面板的驱动方法,包括以下步骤:控制显示面板接收逻辑板输入的图像信号,解码后分为第一图像信号及第四图像信号;将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;以及将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
- 如权利要求1所述的驱动方法,其中,所述第二图像信号及所述第三图像信号均为差分信号。
- 如权利要求1所述的驱动方法,其中,所述步骤“将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号”包括:将第二图像信号的信号线与第三图像信号的信号线一一连接后接收输入的所述第一图像信号;将第五图像信号的信号线与第六图像信号的信号线一一连接后接收输入的第四图像信号。
- 如权利要求3所述的驱动方法,其中,所述栅极驱动信号对显示面板的扫描线成对驱动。
- 如权利要求1所述的驱动方法,其中,对所述第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两路像素信号。
- 如权利要求1所述的驱动方法,其中,所述显示面板采用M颗源极驱动器以及M颗栅极驱动器进行驱动,其中M为正整数。
- 如权利要求6所述的驱动方法,其中,每一源极驱动器包括1路时钟线、6路数据线及1路数据传输触发线。
- 一种显示面板的驱动装置,包括:解码模块:用以接收输入的图像信号,解码为第一图像信号及第四图像信号;时序处理模块:用以将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;以及驱动模块:用以将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
- 如权利要求8所述的驱动装置,其中,所述第二图像信号及所述第三图像信号均为差分信号。
- 如权利要求9所述的驱动装置,其中,所述时序处理模块:用以将第二图像信号的信号线与第三图像信号的信号线一一连接后接收输入的所述第一图像信号;将第五图像信号的信号线与第六图像信号的信号线一一连接后接收输入的第四图像信号。
- 如权利要求10所述的驱动装置,其中,所述栅极驱动信号对显示面板的扫描线成对驱动。
- 如权利要求8所述的驱动装置,其中,所述显示面板采用M颗源极驱动器以及M颗栅极驱动器进行驱动,其中M为正整数。
- 如权利要求12所述的驱动装置,其中,每一源极驱动器包括1路时钟线、6路数据线及1路数据传输触发线。
- 一种显示装置,其中,所述显示装置包括:显示面板;驱动部件;以及如权利要求8所述的显示驱动装置,其中所述显示驱动装置包括:解码模块:用以接收输入的图像信号,解码为第一图像信号及第四图像信号;时序处理模块:用以将第一图像信号复制得到第二图像信号及第三图像信号,将第四图像信号复制得到第五图像信号及第六图像信号;对所述第二图像信号、第三图像信号、第五图像信号、第六图像信号进行分组,分别得到两路像素信号;以及驱动模块:用以将所述第二图像信号、第三图像信号,及第五图像信号、第六图像信号输入至显示面板,结合栅极驱动信号,对图像进行显示。
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| CN106920500B (zh) * | 2017-05-02 | 2020-09-11 | 惠科股份有限公司 | 显示驱动方法及显示驱动装置 |
| CN107610658B (zh) * | 2017-08-23 | 2020-06-26 | 惠科股份有限公司 | 显示装置的驱动装置及驱动方法 |
| CN107507584B (zh) * | 2017-08-23 | 2019-05-10 | 惠科股份有限公司 | 显示面板驱动装置 |
| US10643559B2 (en) | 2017-08-23 | 2020-05-05 | HKC Corporation Limited | Display panel driving apparatus and driving method thereof |
| TWI842311B (zh) * | 2022-12-30 | 2024-05-11 | 瑞昱半導體股份有限公司 | 影像亮度調整方法及其裝置 |
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| JP2008096956A (ja) * | 2006-09-15 | 2008-04-24 | Olympus Corp | 画像表示方法および画像表示装置 |
| KR20090054836A (ko) * | 2007-11-27 | 2009-06-01 | 삼성전자주식회사 | 디스플레이 장치 및 그 제어방법 |
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| CN201868083U (zh) * | 2010-09-30 | 2011-06-15 | 深圳市创维群欣安防科技有限公司 | 液晶屏的分割显示拼接电路及显示系统 |
| US20120256957A1 (en) * | 2011-04-10 | 2012-10-11 | Sau-Kwo Chiu | Image processing method of performing scaling operations upon respective data portions for multi-channel transmission and image processing apparatus thereof |
| CN103124337B (zh) * | 2011-11-18 | 2016-09-28 | 康佳集团股份有限公司 | 一种电视装置 |
| KR101969565B1 (ko) * | 2012-04-30 | 2019-04-17 | 삼성디스플레이 주식회사 | 업-스케일링 기능을 갖는 데이터 드라이버 및 그것을 포함하는 표시 장치 |
| CN103347163B (zh) * | 2013-06-28 | 2017-02-08 | 冠捷显示科技(厦门)有限公司 | 一种超高清视频图像处理和传送的系统及其方法 |
| KR102276329B1 (ko) * | 2014-12-15 | 2021-07-13 | 삼성디스플레이 주식회사 | 액정 표시 장치 |
| CN104809977B (zh) * | 2015-05-21 | 2018-04-06 | 京东方科技集团股份有限公司 | 显示面板的驱动方法、驱动装置和显示设备 |
| CN104992686A (zh) * | 2015-07-21 | 2015-10-21 | 京东方科技集团股份有限公司 | 一种显示面板及其驱动方法、驱动装置 |
| KR20170077941A (ko) * | 2015-12-28 | 2017-07-07 | 삼성디스플레이 주식회사 | 게이트 구동회로 및 이를 포함하는 표시장치 |
| CN105812923B (zh) * | 2016-03-18 | 2019-01-25 | 青岛海信电器股份有限公司 | 基于视频点播的播放处理方法及装置 |
| CN106531098A (zh) * | 2016-12-08 | 2017-03-22 | 惠科股份有限公司 | 显示驱动方法、显示驱动装置及显示装置 |
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| WO2018103389A1 (zh) | 2018-06-14 |
| US20200082775A1 (en) | 2020-03-12 |
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