WO2016068711A4

WO2016068711A4 - Back side contacted wafer-based solar cells with in-situ doped crystallized silicon oxide regions

Info

Publication number: WO2016068711A4
Application number: PCT/NL2015/050759
Authority: WO
Inventors: Guangtao YANG; Andrea INGENITO; Olindo ISABELLA; Miroslav Zeman
Original assignee: Technische Universiteit Delft
Current assignee: Technische Universiteit Delft
Priority date: 2014-10-31
Filing date: 2015-10-30
Publication date: 2016-08-11
Anticipated expiration: 2017-04-30
Also published as: WO2016068711A2; WO2016068711A3; NL2013722B1

Abstract

The present invention is in the field of a process for making back side contacted wafer-based solar cells with in-situ doped crystallized thin-film silicon oxide regions and optionally in-situ doped silicon regions, and back side contacted solar cells. A solar cell, or photovoltaic (PV) cell, is an electrical device that converts energy of light, typically sun light (hence "solar"), directly into electricity by the so-called photovoltaic effect. The solar cell may be considered a photoelectric cell, having electrical characteristics, such as current, voltage, resistance, and fill factor, which vary when exposed to light and which vary from type of cell to type.

Claims

AMENDED CLAIMS received by the International Bureau on 23 June 2016 (23.06.2016)

1. Increased efficiency silicon based solar cell (100) with back side contacts (71), comprising

a silicon substrate (21) ,

at least one n-doped region (41) and at least one p- doped region (42), wherein materials of the doped regions are independently selected from micro-crystalline thin-film sili^¬ con and micro-crystalline thin film silicon oxide, with the proviso that at least one micro-crystalline thin film silicon oxide region is present,

an un-doped silicon-oxide tunnelling layer (31a,b) be-- tween the n-doped or p-doped regions, respectively, and the silicon substrate,

and wherein each contact (71) is in electrical contact with a doped region (41,42) .

2. Solar cell according to claim 1, wherein the solar cell is double sided polished, one side polished and one side textured, or double sided textured.

3. Solar cell according to any of the preceding claims, wherein the doped regions (41,42) are PECVD and thermal an- nealed regions.

4. Solar cell according to any of the preceding claims, wherein the contacts (71) independently consist of in-situ doped semi-insulating material, such as micro-crystalline thin-film silicon and micro-crystalline thin film silicon ox- ide.

5. Solar cell according to any of the preceding claims, wherein at least one of the contacts (71) are passivated, an area of a p-doped region is two- to eight- times an area of an n-doped region, the n-doped region and p-doped region are separated by a distance of 0-1-5% relative to a length of the epitaxial-doped region, and p-doped regions and n-doped regions have a pitch of 0.1 mm-5 mm.

6. Solar cell according to any of the preceding claims, wherein the un-doped silicon-oxide tunnelling layer (31a,b) between the n-doped or p-doped regions is present only between doped regions and the silicon substrate.

7. Solar cell according to any of the preceding claims, further comprising at least one of an un-doped silicon oxide (31c) on a front side of the silicon substrate,

a doped layer (45) on said front side silicon oxide layer, and

a passivation layer (51a) on said doped front side lay- er .

8. Solar cell according to any of the preceding claims, wherein the oppositely doped regions (41, 42) are separated by trenches (81), wherein trenches are filled with a (semi) insulating material.

9. Solar cell according to any of the preceding claims, wherein the micro-crystalline thin-film silicon and micro- crystalline thin film silicon oxide each independently comprise hydrogen in a concentration of 0.2-20 atom% .

10. Process for manufacturing a solar cell according to any of claims 1-9, comprising the steps of

providing a silicon substrate (21),

providing at least one n-doped region (41) and at least one p-doped region_. (42), wherein the doped regions are independently selected from thin-film silicon and thin film sili- con oxide,

annealing said doped regions (41,42) at a temperature of less than 900 °C during a sufficient period of time, wherein said period is typically less than 30 minutes,

providing an un-doped silicon-oxide tunnelling layer (31a,b) between the n-doped or p-doped regions, respectively, and the silicon substrate, and

providing contacts (71) each being in electrical contact with a doped region (41,42).

11. Process according to claims 10, wherein a first doped layer (41) is etched, thereby forming first doped regions, and thereafter

second doped regions (42) are formed, preferably wherein first and second doped regions are alternating.

12. Process according to any of claims 10-11, wherein after forming a second doped layer (42), both doped layers

(41,42) are covered with an insulating layer (51b), the insulating layer extending in between oppositely doped regions.

13. Process according to any of claims 10-12, wherein at least one doped region is deposited by low temperature PECVD.

14. Process according to any of the preceding claims, wherein contacts (71) are provided by metal deposⁱtⁱon and lift off (of non-contact areas) , screen printing, and electrical plating.