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WO2002059970A3 - Transistor mos - Google Patents

Transistor mos Download PDF

Info

Publication number
WO2002059970A3
WO2002059970A3 PCT/DE2002/000177 DE0200177W WO02059970A3 WO 2002059970 A3 WO2002059970 A3 WO 2002059970A3 DE 0200177 W DE0200177 W DE 0200177W WO 02059970 A3 WO02059970 A3 WO 02059970A3
Authority
WO
WIPO (PCT)
Prior art keywords
mos transistor
cmos transistor
individual transistors
high frequency
particularly suitable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/DE2002/000177
Other languages
German (de)
English (en)
Other versions
WO2002059970A2 (fr
Inventor
Andreas Dollinger
Herbert Koblmiller
Michael Mark
Martin Streibl
Volker Schultheiss
Martin Wendel
Guenter Hofer
Guenter Krasser
Josef Prainsack
Walter Schuchter
Wolfgang Stadler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of WO2002059970A2 publication Critical patent/WO2002059970A2/fr
Anticipated expiration legal-status Critical
Publication of WO2002059970A3 publication Critical patent/WO2002059970A3/fr
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/911—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un transistor CMOS (T) comportant une pluralité de transistors individuels (T1 à Tn) connectés en parallèle. Ces transistors individuels (T1 à Tn) sont chacun dotés d'une résistance série (R) supplémentaire. La connexion décrite associe une protection contre les décharges électrostatiques aux bonnes propriétés haute fréquence d'un transistor CMOS et elle est particulièrement adaptée aux connexions analogiques.
PCT/DE2002/000177 2001-01-25 2002-01-21 Transistor mos Ceased WO2002059970A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10103297.8 2001-01-25
DE10103297A DE10103297A1 (de) 2001-01-25 2001-01-25 MOS-Transistor

Publications (2)

Publication Number Publication Date
WO2002059970A2 WO2002059970A2 (fr) 2002-08-01
WO2002059970A3 true WO2002059970A3 (fr) 2003-08-07

Family

ID=7671699

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2002/000177 Ceased WO2002059970A2 (fr) 2001-01-25 2002-01-21 Transistor mos

Country Status (2)

Country Link
DE (1) DE10103297A1 (fr)
WO (1) WO2002059970A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4170210B2 (ja) * 2003-12-19 2008-10-22 Ｎｅｃエレクトロニクス株式会社 半導体装置
DE102005039365B4 (de) 2005-08-19 2022-02-10 Infineon Technologies Ag Gate-gesteuertes Fin-Widerstandselement, welches als pinch - resistor arbeitet, zur Verwendung als ESD-Schutzelement in einem elektrischen Schaltkreis und Einrichtung zum Schutz vor elektrostatischen Entladungen in einem elektrischen Schaltkreis
US11120864B2 (en) * 2019-12-09 2021-09-14 International Business Machines Corporation Capacitive processing unit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0149033A2 (fr) * 1983-12-22 1985-07-24 Texas Instruments Deutschland Gmbh Transistor à effet de champ avec électrode de porte isolée
US5157573A (en) * 1989-05-12 1992-10-20 Western Digital Corporation ESD protection circuit with segmented buffer transistor
EP0691683A2 (fr) * 1994-07-06 1996-01-10 Deutsche ITT Industries GmbH Structure de protection pour des circuits intégrés
US5854504A (en) * 1997-04-01 1998-12-29 Maxim Integrated Products, Inc. Process tolerant NMOS transistor for electrostatic discharge protection
US6043969A (en) * 1998-01-16 2000-03-28 Vantis Corporation Ballast resistors with parallel stacked NMOS transistors used to prevent secondary breakdown during ESD with 2.5 volt process transistors
US6096609A (en) * 1998-01-13 2000-08-01 Lg Semicon Co., Ltd. ESD protection circuit and method for fabricating same using a plurality of dummy gate electrodes as a salicide mask for a drain

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0149033A2 (fr) * 1983-12-22 1985-07-24 Texas Instruments Deutschland Gmbh Transistor à effet de champ avec électrode de porte isolée
US5157573A (en) * 1989-05-12 1992-10-20 Western Digital Corporation ESD protection circuit with segmented buffer transistor
EP0691683A2 (fr) * 1994-07-06 1996-01-10 Deutsche ITT Industries GmbH Structure de protection pour des circuits intégrés
US5854504A (en) * 1997-04-01 1998-12-29 Maxim Integrated Products, Inc. Process tolerant NMOS transistor for electrostatic discharge protection
US6096609A (en) * 1998-01-13 2000-08-01 Lg Semicon Co., Ltd. ESD protection circuit and method for fabricating same using a plurality of dummy gate electrodes as a salicide mask for a drain
US6043969A (en) * 1998-01-16 2000-03-28 Vantis Corporation Ballast resistors with parallel stacked NMOS transistors used to prevent secondary breakdown during ESD with 2.5 volt process transistors

Also Published As

Publication number Publication date
WO2002059970A2 (fr) 2002-08-01
DE10103297A1 (de) 2002-08-22

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