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Nazmul Arefin
Nazmul Arefin
Staff Research and Development Engineer, Intel Corporation
Verified email at intel.com
Title
Cited by
Cited by
Year
Gate length scaling beyond Si: mono-layer 2D channel FETs robust to short channel effects
CJ Dorow, A Penumatcha, A Kitamura, C Rogan, KP O’Brien, S Lee, ...
2022 International Electron Devices Meeting (IEDM), 7.5. 1-7.5. 4, 2022
502022
Exploring manufacturability of novel 2D channel materials: 300 mm wafer-scale 2D NMOS & PMOS using MoS2, WS2, & WSe2
CJ Dorow, T Schram, Q Smets, KP O’Brien, K Maxey, CC Lin, L Panarella, ...
2023 International Electron Devices Meeting (IEDM), 1-4, 2023
322023
300 mm MOCVD 2D CMOS materials for more (than) Moore scaling
K Maxey, CH Naylor, KP O'Brien, A Penumatcha, A Oni, C Mokhtarzadeh, ...
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
312022
DrGaN: An integrated CMOS driver-GaN power switch technology on 300mm GaN-on-Si with E-mode GaN MOSHEMT and 3D monolithic Si PMOS
HW Then, M Radosavljevic, S Bader, A Zubair, H Vora, N Nair, P Koirala, ...
2023 International Electron Devices Meeting (IEDM), 1-4, 2023
232023
High mobility TMD NMOS and PMOS transistors and GAA architecture for ultimate CMOS scaling
A Penumatcha, KP O’Brien, K Maxey, W Mortelmans, R Steinhardt, ...
2023 International Electron Devices Meeting (IEDM), 1-4, 2023
222023
Record Performance in GAA 2D NMOS and PMOS using Monolayer MoS2 and WSe2 with scaled contact and gate length
W Mortelmans, P Buragohain, C Rogan, A Kitamura, CJ Dorow, ...
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024
182024
2D materials in the BEOL
CH Naylor, K Maxey, C Jezewski, KP O’Brien, AV Penumatcha, MS Kavrik, ...
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023
122023
Gallium nitride (GaN) on silicon substrates for LEDs
M Kane, N Arefin
Nitride Semiconductor Light-Emitting Diodes (LEDs), 1st Edition Materials …, 2014
122014
Gate Oxide Module Development for Scaled GAA 2D FETs Enabling SS< 75mV/d and Record Idmax> 900μA/μm at Lg< 50nm
W Mortelmans, P Buragohain, A Kitamura, CJ Dorow, C Rogan, ...
2024 IEEE International Electron Devices Meeting (IEDM), 1-4, 2024
82024
Record PMOS WSe2 GAA Performance Using Contact Planarization, and Systematic Exploration of Manufacturable, High-Yield Contacts
M Jaikissoon, P Buragohain, W Mortelmans, K Oguz, C Rogan, J Lux, ...
2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits …, 2025
32025
The Critical Role of 2D TMD Interfacial Layers for pFET Performance
TD Ngo, X Wu, CJ Dorow, RK Grubbs, L Pinotti, D Cott, K Banerjee, ...
2024 IEEE International Electron Devices Meeting (IEDM), 1-4, 2024
22024
Int. Electron Devices Meeting (IEDM)
CJ Dorow, T Schram, Q Smets, KP O’Brien, K Maxey, CC Lin, L Panarella, ...
San Francisco, CA, USA, 2023
22023
GaN growth on silicon based substrates using pulsed electron beam deposition (PED) process
N Arefin, MH Kane, PR Larson, VR Whiteside, K Hossain, BN Pritchett, ...
MRS Online Proceedings Library 1736 (1), 95-100, 2014
12014
Characterization Methods of TMD Transistor Gate Dielectrics Targeting 1 nm EOT for 2-D CMOS Scaling
C Dorow, A Konar, A Kitamura, A Penumatcha, S Lee, A Oni, CY Cheng, ...
IEEE Transactions on Electron Devices, 2025
2025
Growth of wide bandgap semiconductors using pulsed electron beam deposition (ped) process
N Arefin
2015
Revised Physical Alpha-Power Law Model for Ultrathin Oxide MOSFETs
N Arefin, F Ahmed, MR Rahman, QDM Khosru
2006 International Conference on Electrical and Computer Engineering, 514-517, 2006
2006
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Articles 1–16