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WO2025013484A1 - Élément conducteur - Google Patents

Élément conducteur Download PDF

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Publication number
WO2025013484A1
WO2025013484A1 PCT/JP2024/020775 JP2024020775W WO2025013484A1 WO 2025013484 A1 WO2025013484 A1 WO 2025013484A1 JP 2024020775 W JP2024020775 W JP 2024020775W WO 2025013484 A1 WO2025013484 A1 WO 2025013484A1
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WO
WIPO (PCT)
Prior art keywords
conductive
layer
recess
thickness
angle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2024/020775
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English (en)
Japanese (ja)
Inventor
佳子郎 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Intellectual Property Management Co Ltd
Original Assignee
Panasonic Intellectual Property Management Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Intellectual Property Management Co Ltd filed Critical Panasonic Intellectual Property Management Co Ltd
Publication of WO2025013484A1 publication Critical patent/WO2025013484A1/fr
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Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
    • H01B5/14—Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details

Definitions

  • This disclosure relates to a conductive member having a multilayer wiring structure.
  • Conductive materials used in touch panels and the like have been known for some time. Some conductive materials have a multilayer wiring structure in which multiple wiring layers are stacked.
  • the conductive substrate of Patent Document 1 includes a first conductive substrate and a second conductive substrate.
  • a plurality of electrode portions (wiring) are formed on each of the first conductive substrate and the second conductive substrate.
  • the first conductive substrate and the second conductive substrate are bonded together by an adhesive layer with the electrode portions formed on the first conductive substrate and the second conductive substrate facing each other.
  • peeling of the electrode portions is prevented by interposing an adhesion improving layer made of a metal oxide between each conductive substrate and the electrode portions.
  • Patent Document 1 an adhesion improvement layer made of a metal oxide is formed between the conductive substrate and the electrode part. That is, an adhesion improvement layer is formed on the side surface of the electrode part.
  • Patent Document 1 in order to further prevent the electrode part from peeling off, it is conceivable to further form an adhesion improvement layer on the side surface of the electrode part. In this way, by forming an adhesion improvement layer on the bottom surface and side surface of the electrode part, it is possible to prevent the electrode part from peeling off and to make the electrode part less visible.
  • the cross-sectional shape of the electrode part is approximately rectangular, so the thickness of the adhesion improvement layer formed on the side of the electrode part is thin.
  • the adhesion improvement layer is formed by a method such as sputtering, if the thickness of the adhesion improvement layer formed on the side of the electrode part is thin, the thickness of the adhesion improvement layer formed on the bottom surface of the electrode part is also thin. As a result, the overall thickness of the adhesion improvement layer is thin, making the electrode part easier to see.
  • the wiring width of the electrode part is widened to reduce the wiring resistance of the electrode part, the wider wiring width of the electrode part makes the electrode part easier to see.
  • a conductive member includes a substrate having transparency and light transmissivity, a first conductive wire disposed in a recess provided in the substrate, and a second conductive wire located on the first conductive wire and disposed in the recess of the substrate, the first conductive wire includes a first metal compound layer made of a metal compound, and a first conductive layer formed on the first metal compound layer and made of a conductive metal, the first metal compound layer contacting a first side surface which is a side surface of the recess in the first layer, the second conductive wire includes a second metal compound layer made of a metal compound, and a second conductive layer formed on the second metal compound layer.
  • the second metal compound layer being in contact with a second side surface that is a side surface of the recess in the second layer, the second groove width that is the groove width of the recess in the second layer being wider than the first groove width that is the groove width of the recess in the first layer, the second angle that is the angle between the second side surface and the bottom surface of the first layer being larger than the first angle that is the angle between the first side surface and the bottom surface of the first layer, and the second thickness that is the thickness of the second metal compound layer at the portion in contact with the lower end of the second conductive layer being thicker than the first thickness that is the thickness of the first metal compound layer at the portion in contact with the lower end of the first conductive layer.
  • the conductive member having the multilayer wiring structure disclosed herein can reduce wiring resistance while making the wiring less visible.
  • FIG. 1 is a perspective view showing an entire multilayer wiring board according to an embodiment of the present disclosure.
  • FIG. 2 is a plan view showing the entire multilayer wiring board according to the embodiment of the present disclosure.
  • FIG. 3 is a partially enlarged plan view showing a portion III in FIG.
  • FIG. 4 is a partially enlarged plan view showing a portion IV in FIG.
  • FIG. 5 is a partially enlarged plan view showing the connection region and its periphery shown in FIG.
  • FIG. 6 is a cross-sectional view taken along line VI-VI in FIG.
  • FIG. 7 is a schematic cross-sectional view of a first conductive wire and a second conductive wire arranged to overlap each other.
  • FIG. 8 is a cross-sectional view that illustrates a schematic cross-sectional state of the first recess and the second recess in FIG.
  • FIG. 9 is a schematic cross-sectional view of a modification of the embodiment in which a first conductive wire and a second conductive wire are arranged to overlap each other.
  • FIG. 10 is a cross-sectional view that illustrates a schematic cross-sectional state of the first recess and the second recess in FIG.
  • FIGS. 1 and 2 show the overall configuration of a multilayer wiring board 1 (conductive member) according to an embodiment of the present disclosure.
  • a multilayer wiring board 1 formed by an imprinting method is illustrated.
  • the multilayer wiring board 1 is provided with a plurality of mounting elements 2. Examples of the mounting elements 2 include LED elements or diodes.
  • the plurality of mounting elements 2 are disposed on the upper side of a substrate 3 (the upper surface side of a first layer 5 (described later)).
  • the direction from the left side to the right side of the paper in FIG. 2 is defined as the "X direction,” while the direction from the bottom to the top of the paper in FIG. 2 is defined as the "Y direction.”
  • the multilayer wiring board 1 includes a substrate 3.
  • the substrate 3 is transparent and light-transmitting.
  • the side on which a film base 4 (described later) is located is defined as the "lower side” of the substrate 3
  • the side on which a second layer 6 (described later) is located is defined as the "upper side” of the substrate 3.
  • the substrate 3 includes a film substrate 4.
  • the film substrate 4 is made of a resin material that is at least flexible and light-transmitting. Preferably, the film substrate 4 has a light transmittance of 80% or more.
  • the film substrate 4 is, for example, 25 ⁇ m to 200 ⁇ m.
  • the film substrate 4 may also be transparent.
  • the resin material examples include PET (polyethylene terephthalate), polycarbonate, COP (cycloolefin polymer), and COC (cycloolefin copolymer).
  • the substrate 3 includes a first layer 5 and a second layer 6.
  • Each of the first layer 5 and the second layer 6 is made of a resin material that is insulating and optically transparent.
  • This resin material is, for example, a thermosetting resin or an ultraviolet-curing resin material.
  • the thickness of each of the first layer 5 and the second layer 6 is, for example, 1 ⁇ m to 6 ⁇ m.
  • the first layer 5 is a layer for arranging the first conductor pattern 10 described below.
  • the first layer 5 is laminated on the upper side of the film substrate 4.
  • the upper surface of the first layer 5 is formed so as to be flat or have a slightly recessed central portion, with the conductive metal constituting each of the first conductive lines 13 described below embedded in the first recesses 7 described below.
  • the first layer 5 has a plurality of bottomed first recesses 7 that are recessed downward from the top surface of the first layer 5.
  • the first recesses 7 extend linearly on the top surface of the first layer 5 to form a predetermined pattern, which will be described later.
  • the groove depth of the first recess 7 is set to, for example, 0.5 ⁇ m or more and 5 ⁇ m or less.
  • the second layer 6 has a plurality of second recesses 8 that are recessed downward from the upper surface of the second layer 6.
  • the second recesses 8 extend linearly to form a predetermined pattern, which will be described later, on the upper surface of the second layer 6.
  • the second recesses 8 are configured so that only the portions where the via portions 22, which will be described later, are formed penetrate the substrate 3 in the thickness direction.
  • the groove depth of the second recess 8 is set to, for example, 0.5 ⁇ m or more and 5 ⁇ m or less.
  • the first conductor pattern 10 is composed of a plurality of first conductive wires 13.
  • Each of the first conductive wires 13 is thinned.
  • the line width of each of the first conductive wires 13 is configured to be 15 ⁇ m or less.
  • the mesh pattern (first conductor pattern 10) consisting of a plurality of first conductive wires 13 is configured so that the plurality of first conductive wires 13 cross each other and are arranged at a predetermined interval (equally spaced intervals in the illustrated example).
  • Each of the first conductive wires 13 constituting the mesh pattern extends diagonally with respect to both the X direction and the Y direction.
  • the multilayer wiring board 1 includes a plurality of second conductor patterns 14.
  • the plurality of second conductor patterns 14 are arranged at intervals (equally spaced in the illustrated example) from one another in the Y direction in a plan view. Note that, for convenience of illustration, the second conductor patterns 14 are simply illustrated by dot hatching in FIGS. 1 to 3.
  • Each second conductive line 17 (described later) constituting the second conductor pattern 14 is disposed on the second layer 6 (see FIG. 6).
  • the second conductor pattern 14 is disposed at a different position from the first conductor pattern 10 in the thickness direction of the substrate 3.
  • Each second conductor pattern 14 has a second main body 15 and multiple (four in the illustrated example) second branch portions 16.
  • the second main body 15 and each second branch portion 16 are formed in a generally strip-like shape in a plan view.
  • the second main body 15 extends in a generally strip-like shape along the X direction in a plan view.
  • Each second branch portion 16 branches off from a midway point of the second main body 15. Specifically, each second branch portion 16 extends from a midway point of the second main body 15 in a direction opposite to the Y direction (toward the bottom of the paper in FIG. 2).
  • the second conductive wires 17 are arranged in a predetermined pattern on the surface of the second layer 6.
  • Figure 4 shows a mesh pattern in which the second conductive wires 17 are arranged in a mesh shape as an example of the predetermined pattern.
  • the mesh pattern (second conductor pattern 14) consisting of a plurality of second conductive wires 17 is configured so that the plurality of second conductive wires 17 cross each other and are arranged at a predetermined interval (equally spaced in the illustrated example).
  • Each of the second conductive wires 17 constituting the mesh pattern extends diagonally with respect to both the X direction and the Y direction.
  • the mesh pattern consisting of a plurality of second conductive wires 17 has the same aperture ratio as the mesh pattern (first conductor pattern 10) consisting of a plurality of first conductive wires 13.
  • the first conductor pattern 10 and the second conductor pattern 14 are provided with an overlapping pattern 20.
  • the overlapping pattern 20 is configured so that a part of the first conductor pattern 10 and a part of the second conductor pattern 14 overlap in the thickness direction of the substrate 3.
  • the overlapping pattern 20 in this embodiment is configured so that a part of the first branch portion 12 and a part of the second branch portion 16 overlap in the thickness direction of the substrate 3.
  • the spacing between the first conductive wires 13, 13 is greater than the spacing between the first conductive wires 13, 13 in the first conductor pattern 10 other than the overlapping pattern 20.
  • the spacing between the first conductive wires 13, 13 constituting the overlapping pattern 20 is approximately twice the spacing between the first conductive wires 13, 13 in the first conductor pattern 10 other than the overlapping pattern 20.
  • the spacing between the second conductive wires 17, 17 constituting the overlapping pattern 20 is approximately twice the spacing between the second conductive wires 17, 17 in the second conductor pattern 14 other than the overlapping pattern 20.
  • a plurality of first conductive wires 13 and a plurality of second conductive wires 17 cross each other in a planar view.
  • the overlapping pattern 20 is configured such that, in a planar view, each of the first conductive wires 13 and each of the second conductive wires 17 are arranged at a predetermined interval (equally spaced in the illustrated example).
  • the aperture ratio of the overlapping pattern 20 is preferably configured so that the difference with the aperture ratio of the first conductor pattern 10 (or the aperture ratio of the second conductor pattern 14) located in an area other than the connection area 21 described below is 30% or less. More preferably, the difference between the aperture ratios is 10% or less.
  • the overlapping pattern 20 in this embodiment has the same aperture ratio as the first conductor pattern 10 (or the aperture ratio of the second conductor pattern 14) other than the overlapping pattern 20.
  • the overlapping pattern 20 includes a connection region 21.
  • the first conductive line 13 and the second conductive line 17 are electrically connected.
  • the overlapping pattern 20 of this embodiment includes one connection region 21.
  • connection region 21 has an area smaller than the area of the overlapping pattern 20.
  • connection region 21 multiple (four in the illustrated example) first conductive lines 13 and multiple (two in the illustrated example) second conductive lines 17 are located.
  • first conductive lines 13 intersect with one second conductive line 17 (see intersection point P shown in Figure 5).
  • intersection points P are located in the connection region 21 shown in Figure 5.
  • each second conductive line 17 located in the connection region 21 is provided with one via portion 22.
  • the via portion 22 is disposed in the connection region 21.
  • the via portion 22 is made of the same material as the conductive metal of the conductive layer 172 that constitutes each second conductive line 17.
  • the via portion 22 is integrally formed with the second conductive line 17 (conductive layer 172) located in the connection region 21.
  • the via portion 22 protrudes from the lower portion of the second conductive line 17 (conductive layer 172) toward a position corresponding to the upper surface of the first layer 5.
  • the via portion 22 is configured so that its line width is equal to or less than the line width of the second conductive line 17.
  • the via portion 22 has the same line width as the second conductive line 17 (see FIG. 8).
  • the via portion 22 is configured so that the angle between the side surface of the via portion 22 and the bottom surface of the second conductive wire 17 in a cross-sectional view is approximately a right angle (see FIG. 6). Furthermore, the angle between the side surface of the via portion 22 and the bottom surface of the second conductive wire 17 is not limited to a right angle, but may be an obtuse angle that is slightly larger than a right angle (specifically, an angle equivalent to the draft angle that occurs when the second recess 8 is formed by the imprinting method).
  • the via portion 22 is configured to be electrically connected to the first conductive wire 13.
  • the lower surface of the via portion 22 contacts the upper surface of the first conductive wire 13 located in the connection region 21.
  • the via portion 22 is electrically connected to the two first conductive wires 13, 13 at two intersections P, P where the two first conductive wires 13, 13 and one second conductive wire 17 intersect.
  • the via portion 22 is configured so that the length along the extension direction of the second conductive wire 17 (dimension L shown in FIG. 6) is equal to or greater than the sum of the pitch interval (dimension A shown in FIG. 6) between the first conductive wires 13, 13 adjacent to each other in the extension direction and the line width (dimension W shown in FIG. 6) of one first conductive wire 13.
  • one via portion 22 overlaps two first conductive wires 13, 13 adjacent to each other in the extension direction of the second conductive wire 17 in the thickness direction of the substrate 3 (see FIG. 6).
  • a second layer 6 is interposed between the first conductive wires 13 that do not overlap with the via portion 22 and each second conductive wire 17 (see FIG. 6).
  • the multilayer wiring board 1 includes a plurality of dummy patterns 30.
  • each dummy pattern 30 is simply shown by dot hatching. Note that in Figures 1 and 2, the illustration of each dummy pattern 30 is omitted.
  • the dummy pattern 30 is composed of multiple dummy conductive lines 31.
  • Each dummy conductive line 31 is thinned.
  • the line width of each dummy conductive line 31 is configured to be 15 ⁇ m or less.
  • Each dummy conductive line 31 includes a conductive metal embedded in a recess (not shown) in the first layer 5.
  • Suitable conductive metals include, for example, copper, silver, gold, or an alloy containing at least one of these metals.
  • the recess is formed on the upper surface side of the first layer 5 in an area where the first conductor pattern 10 is not located.
  • the recess has a configuration similar to that of the first recess 7.
  • the upper surface of each dummy conductive line 31 may be formed to be flush with the upper surface of the first layer 5.
  • the multiple dummy conductive lines 31 are formed in a mesh pattern in which the multiple dummy conductive lines 31 are arranged in a mesh shape.
  • the mesh pattern formed of the multiple dummy conductive lines 31 has the same configuration as the mesh pattern formed of the multiple first conductive lines 13.
  • Each dummy pattern 30 has the same aperture ratio as the first conductor pattern 10.
  • the multiple dummy conductive lines 31 are arranged at intervals from the multiple first conductive lines 13 constituting the first conductor pattern 10 adjacent to each dummy pattern 30 in a plan view. In other words, each dummy pattern 30 is not electrically conductive with the first conductor pattern 10. Although not shown, each dummy pattern 30 is insulated from each second conductor pattern 14 via the second layer 6.
  • the first conductive line 13 includes a conductive material embedded in a first recess 7 formed in the first layer 5.
  • the first recess 7 is composed of a bottom surface 7a (first bottom surface) extending in the width direction (left-right direction in the drawing), a side surface 7b (first side surface) connecting the bottom surface 7a and the opening of the first recess 7, and a corner portion 7c connecting the bottom surface 7a and the side surface 7b.
  • the first conductive wire 13 includes an adhesion layer 131 (first metal compound layer) and a conductive layer 132 (first conductive layer).
  • the adhesion layer 131 is an element for ensuring the adhesion of the conductive layer 132 to the first recess 7.
  • the adhesion layer 131 also has low reflectivity. In other words, the adhesion layer 131 has the function of making the conductive layer 132 less visible when the multilayer wiring board 1 is viewed from the side where the first layer 5 is located (the lower side of the paper in FIG. 7).
  • the adhesion layer 131 is a metal layer composed of, for example, a metal nitride containing at least one metal selected from the group consisting of Ti, Al, V, W, Ta, Si, Cr, Ag, Mo, Cu, Zn, and Ni, a metal oxide, or a metal oxynitride containing both a metal nitride and a metal oxide.
  • the adhesion layer 131 may be a single layer or a laminate of multiple layers having different compositions.
  • the adhesion layer 131 is laminated in the form of a thin film on the first recess 7 by, for example, vapor deposition or sputtering. In this embodiment, the adhesion layer 131 is formed so that the thickness L1 is approximately constant.
  • the adhesion layer 131 includes a bottom portion 131a formed on the bottom surface 7a of the first recess 7 and a side portion 131b formed on the side surface 7b of the first recess 7.
  • the bottom portion 131a and the side portion 131b are connected via a connection portion 131c formed along the corner portion 7c of the first recess 7.
  • the first recess 7 has a curved fillet formed at the corner portion 7c.
  • the corner portion 7c is formed so that the curvature gradually changes from the bottom surface 7a to the side surface 7b. That is, the bottom surface 7a and the side surface 7b are connected at the corner portion 7c so that the angle changes continuously.
  • connection portion 131c is formed along the corner portion 7c of the first recess 7, the bottom surface 131a and the side surface portion 131b are smoothly connected by the connection portion 131c.
  • the corner portion 7c may be formed so that its curvature is constant.
  • the conductive layer 132 is an element for ensuring the conductivity of the first conductive wire 13.
  • the conductive layer 132 is embedded in the first recess 7 while being layered on the adhesive layer 131.
  • the conductive layer 132 is made of a conductive metal. Suitable conductive metals include, for example, copper, silver, gold, and alloys containing at least one of these metals.
  • the conductive layer 132 is formed by, for example, deposition, sputtering, electroless plating, or electroplating.
  • the upper surface of the conductive layer 132 is formed to be flush with the upper surface of the first layer 5.
  • a blackening layer may be formed on the upper surface of the conductive layer 132.
  • the blackening layer has low reflectivity. In other words, the blackening layer has the function of making the conductive layer 132 less visible when the multilayer wiring board 1 is viewed from the side where the second layer 6 is located.
  • the second conductive wire 17 includes a conductive material embedded in a second recess 8 formed in the second layer 6.
  • the second recess 8 is composed of a bottom surface 8a (second bottom surface) extending in the width direction (left-right direction in the drawing), a side surface 8b (second side surface) connecting the bottom surface 8a and the opening of the second recess 8, and a corner portion 8c connecting the bottom surface 8a and the side surface 8b.
  • Fig. 8 illustrates the bottom surface 8a, side surface 8b, and corner portion 8c of the second recess 8.
  • the second conductive wire 17 includes an adhesion layer 171 (second metal compound layer) and a conductive layer 172 (second conductive layer).
  • the adhesion layer 171 is an element for ensuring the adhesion of the conductive layer 172 to the second recess 8.
  • the adhesion layer 171 also has low reflectivity. In other words, the adhesion layer 171 has the function of making the conductive layer 172 less visible when the multilayer wiring board 1 is viewed from the side where the first layer 5 is located (the lower side of the paper in FIG. 7).
  • the adhesion layer 171 is a metal layer composed of, for example, a metal nitride containing at least one metal selected from the group consisting of Ti, Al, V, W, Ta, Si, Cr, Ag, Mo, Cu, Zn, and Ni, a metal oxide, or a metal oxynitride containing both a metal nitride and a metal oxide.
  • the adhesion layer 171 may be a single layer or a laminate of multiple layers having different compositions.
  • the adhesion layer 171 is laminated in the form of a thin film on the second recess 8 by, for example, vapor deposition or sputtering. In this embodiment, the adhesion layer 171 is formed so that the thickness L2 is approximately constant.
  • the adhesive layer 171 includes a bottom portion 171a formed on the bottom surface 8a of the second recess 8 and a side portion 171b formed on the side surface 8b of the second recess 8.
  • the bottom portion 171a and the side portion 171b are connected via a connection portion 171c formed along the corner portion 8c of the second recess 8.
  • the second recess 8 has a curved fillet formed at the corner portion 8c.
  • the corner portion 8c is formed so that the curvature gradually changes from the bottom surface 8a to the side surface 8b. That is, the bottom surface 8a and the side surface 8b are connected so that the angle changes continuously at the corner portion 8c. Therefore, the bottom surface 8a and the side surface 8b are smoothly connected by the corner portion 8c.
  • the connection portion 171c is formed along the corner portion 8c of the second recess 8, the bottom surface portion 171a and the side surface portion 171b are smoothly connected by the connection portion 171c.
  • the conductive layer 172 is an element for ensuring the conductivity of the second conductive wire 17.
  • the conductive layer 172 is embedded in the second recess 8 while being layered on the adhesive layer 171.
  • the conductive layer 172 is made of a conductive metal. Suitable conductive metals include, for example, copper, silver, gold, and alloys containing at least one of these metals.
  • the conductive layer 172 is formed, for example, by vapor deposition, sputtering, electroless plating, or electroplating.
  • the upper surface of the conductive layer 172 is formed to be flush with the upper surface of the second layer 6.
  • a blackening layer may be formed on the upper surface of the conductive layer 172.
  • the blackening layer has low reflectivity. In other words, the blackening layer has the function of making the conductive layer 172 less visible when the multilayer wiring board 1 is viewed from the side where the second layer 6 is located.
  • groove width W1 first groove width
  • groove width W2 second groove width
  • groove width W2 is wider than groove width W1.
  • angle D1 first angle
  • angle D2 second angle
  • angle D1 first angle
  • angle D2 second angle
  • angle D2 (second angle) is the same as the angle between the bottom surface and the side surface 8b of the first layer 5. Therefore, angle D1 (first angle) may be expressed as the angle between the bottom surface and the side surface 7b of the first layer 5. Additionally, angle D2 (second angle) may be expressed as the angle between the bottom surface of the first layer 5 and the side surface 8b.
  • side 8b and side 7b may be gently curved, but as shown in FIG. 8, angles D1 and D2 may be measured using the tangents of side 8b and side 7b, respectively. Products in which angle D2 measured using this method is greater than angle D1 are also included in the present disclosure.
  • thickness L1 first thickness
  • thickness L2 second thickness
  • the recess 100 will be described with reference to Fig. 10.
  • the first recess 7 and the second recess 8 are used for the description.
  • the first recess 7 and the second recess 8 may be collectively referred to as the recess 100.
  • the area of the recess 100 located in the first layer 5 may be referred to as the "recess in the first layer.”
  • the area below the boundary line 100A shown by the dotted line in Figure 10 corresponds to the "recess in the first layer.”
  • the area of the recess 100 located in the second layer 6 may be referred to as the "recess in the second layer.”
  • the area above the boundary line 100A shown by the dotted line in FIG. 10 corresponds to the "recess in the second layer.”
  • the multilayer wiring board 1 includes the first conductive wire 13 and the second conductive wire 17. If the groove width of the first recess 7 in which the first conductive wire 13 is embedded is defined as groove width W1, and the groove width of the second recess 8 in which the second conductive wire 17 is embedded is defined as groove width W2, the groove width W2 is wider than the groove width W1. If the angle between the bottom surface 7a and the side surface 7b of the first recess 7 is defined as angle D1, and the angle between the bottom surface 8a and the side surface 8b of the second recess 8 is defined as angle D2, the angle D2 is larger than the angle D1.
  • angle D1 The angle between the bottom surface of the first layer 5 and the side surface 7b may be described as angle D1
  • the angle between the bottom surface of the first layer 5 and the side surface 8b may be described as angle D2.
  • the angle D2 is larger than the angle D1.
  • the cross-sectional area of the second conductive wire 13 is larger than that of the first conductive wire 17. Therefore, due to the general relationship between electrical resistance and cross-sectional area (i.e., a relationship based on the general formula that the electrical resistance of a conductor is inversely proportional to the cross-sectional area of the conductor), the wiring resistance of the second conductive wire 17 can be suppressed. Furthermore, by making the angle D2 larger than the angle D1, the thickness L2 of the adhesion layer 171 in the second conductive wire 17 can be made thicker than the thickness L1 of the adhesion layer 131 in the first conductive wire 13. By making the thickness L2 thicker, the second conductive wire 17 can be made less visible. Therefore, in a conductive member having a multilayer wiring structure, the wiring can be made less visible while reducing the wiring resistance.
  • the thickness L1 of the adhesive layer 131 of the first conductive wire 13 is formed to be substantially constant, but this is not limited to the embodiment.
  • the thickness L2 of the adhesive layer 171 of the second conductive wire 17 is also not limited to the embodiment.
  • the thickness L11 of the bottom surface portion 131a of the adhesive layer 131 and the thickness L12 of the bottom surface portion 131b of the adhesive layer 131 may be different.
  • the thickness L11 is thicker than the thickness L12.
  • the corner portion 8c is formed so that the thickness gradually changes from the bottom surface 8a to the side surface 8b.
  • the bottom surface 7a and the side surface 7b of the first recess 7 are connected at the corner portion 7c so that the angle changes continuously.
  • the adhesive layer 131 of the first conductive wire 13 is formed to be curved so as to protrude downward. With this configuration, it is possible to suppress a sudden change in light reflection at the connection portion 131c that connects the bottom surface portion 131a and the side surface portion 131b of the adhesive layer 131, making it possible to make the first conductive wire 13 less visible.
  • the thickness L21 of the bottom surface 171a of the adhesion layer 171 is different from the thickness L22 of the bottom surface 171b of the adhesion layer 171.
  • the thickness L21 is thicker than the thickness L22.
  • the corner portion 8c is formed so that the thickness gradually changes from the bottom surface 8a to the side surface 8b.
  • the bottom surface 8a and the side surface 8b of the second recess 8 are connected at the corner portion 8c so that the angle changes continuously.
  • the adhesion layer 171 of the second conductive wire 17 is formed to be curved so as to protrude downward. With this configuration, it is possible to suppress a sudden change in light reflection at the connection portion 171c that connects the bottom surface portion 171a and the side surface portion 171b of the adhesion layer 171, making it possible to make the second conductive wire 17 less visible.
  • the first conductor patterns 10 are formed in a mesh pattern in which a plurality of first conductive wires 13 are arranged in a mesh shape, but the present invention is not limited to this configuration.
  • the second conductor patterns 14 are not limited to a mesh pattern in which a plurality of second conductive wires 17 are arranged in a mesh shape.
  • the multiple first recesses 7 may be configured so that the groove widths W1 of each recess are different from each other.
  • the multiple first recesses 7 include a first recess 71 belonging to a first group and a first recess 72 belonging to a second group.
  • the groove width W1a of the first recess 71 and the groove width W1b of the first recess 72 are 0.3 ⁇ m or more and 50 ⁇ m or less.
  • the groove width W1b is wider than the groove width W1a.
  • the multiple second recesses 8 may be configured so that the groove widths W2 of each recess are different from each other.
  • the multiple second recesses 8 include a second recess 81 belonging to a third group and a second recess 82 belonging to a fourth group.
  • the groove width W2a of the second recess 81 and the groove width W2b of the second recess 82 are 0.8 ⁇ m or more and 52.0 ⁇ m or less.
  • the groove width W2b is wider than the groove width W2a.
  • the groove width W2b is wider than the groove width W1b.
  • the groove width W2 is wider than the groove width W1, so the second conductive wire 17 can have a wider wiring width than the first conductive wire 13. This allows the cross-sectional area of the second conductive wire 17 to be increased, thereby reducing the wiring resistance of the second conductive wire 17.
  • the multiple first recesses 7 may be configured so that each angle D1 (the angle between the bottom surface 7a and the side surface 7b of the first recess 7) is different from the others.
  • the multiple first recesses 7 include a first recess 73 belonging to the fifth group and a first recess 74 belonging to the sixth group.
  • the angle D1a of the first recess 73 and the angle D1b of the first recess 74 are greater than 90° and less than 135°.
  • the angle D1b is greater than the angle D1a.
  • the multiple second recesses 8 may be configured so that each angle D2 (the angle between the bottom surface 8a and the side surface 8b of the second recess 8) is different from the others.
  • the multiple second recesses 8 include a second recess 83 belonging to the seventh group and a second recess 84 belonging to the eighth group.
  • the angle D2a of the second recess 83 and the angle D2b of the second recess 84 are greater than 90° and less than 135°.
  • the angle D2b is greater than the angle D2a.
  • the angles D2a and D2b are greater than the angles D1a and D1b.
  • the angle D1 is smaller than the angle D2
  • the cross-sectional area of the first conductive wire 13 can be increased, and the wiring resistance of the first conductive wire 13 can be reduced.
  • the wiring width of the first conductive wire 13 is narrower than that of the second conductive wire 17, it is difficult to see. Therefore, even if the thickness of the adhesion layer 131 is reduced by reducing the angle D2, the first conductive wire 13 is difficult to see.
  • the angle D2 of the second conductive wire 17 is greater than the angle D1 of the first conductive wire 13, the thickness of the adhesion layer 171 of the second conductive wire 17 can be increased, and the visibility of the second conductive wire 17, which has a wide wiring width, can be reduced.
  • the multiple first conductive wires 13 may be configured so that the thickness L1 of each adhesion layer 131 is different from each other.
  • the multiple first conductive wires 13 include a first conductive wire 13e belonging to a ninth group and a first conductive wire 13f belonging to a tenth group.
  • the thickness L1a of the adhesion layer 171 of the first conductive wire 13e and the thickness L1b of the adhesion layer 171 of the first conductive wire 13f are greater than 3 nm and less than 150 nm.
  • the thickness L1b is greater than the thickness L1a.
  • the second conductive wires 17 may be configured so that the thickness L2 of each adhesive layer 171 is different from each other.
  • the second conductive wires 17 include a second conductive wire 17e belonging to the 11th group and a second conductive wire 17f belonging to the 12th group.
  • the thickness L2a of the adhesive layer 171 of the second conductive wire 17e and the thickness L2b of the adhesive layer 171 of the second conductive wire 17f are greater than 3 nm and smaller than 150 nm.
  • the thickness L2b is thicker than the thickness L2a.
  • the thicknesses L2a and L2b are thicker than the thicknesses L1a and L1b.
  • the thickness L1 is smaller than the thickness L2
  • the cross-sectional area of the first conductive wire 13 can be increased, and the wiring resistance of the first conductive wire 13 can be reduced.
  • the wiring width of the first conductive wire 13 is narrower than that of the second conductive wire 17, the visibility is low. Therefore, even if the thickness of the adhesion layer 131 is reduced, the first conductive line 13 is less visible.
  • the thickness of the adhesion layer 171 of the second conductive line 17 can be increased, so the visibility of the second conductive line 17, which has a wide wiring width, can be reduced.
  • the dummy patterns 30 are arranged on the first layer 5, but this is not limited to the above. In other words, the dummy patterns 30 may be arranged on the second layer 6.
  • the multilayer wiring substrate 1 according to the embodiment of the present disclosure can be widely applied to various technical fields such as touch sensors, liquid crystal display devices, organic electroluminescence display devices (OLEDs), micro LED display devices, solar cell devices, heater devices, antenna devices, and electromagnetic wave shielding sheets.
  • OLEDs organic electroluminescence display devices
  • micro LED display devices solar cell devices
  • heater devices heater devices
  • antenna devices electromagnetic wave shielding sheets.
  • the conductive member (multilayer wiring board 1) of the first aspect of the present disclosure comprises a substrate (3) having transparency and light transmissivity, which includes a first layer (5) and a second layer (6) provided above the first layer (5), a first conductive wire (13) arranged in a recess (100) provided in the substrate (3), and a second conductive wire (17) located above the first conductive wire (13) and arranged in the recess (100) of the substrate (3).
  • the first conductive wire (13) includes a first metal compound layer (adhesion layer 131) made of a metal compound, and a first conductive layer (132) made of a conductive metal formed on the first metal compound layer (adhesion layer 131), and the first metal compound layer (adhesion layer 131) contacts a first side surface (7b) which is the side surface of the recess (100) in the first layer (5).
  • the second conductive wire (17) includes a second metal compound layer (adhesion layer 171) made of a metal compound, and a second conductive layer (172) made of a conductive metal formed on the second metal compound layer (adhesion layer 171), and the second metal compound layer (adhesion layer 171) contacts the second side surface (8b), which is the side surface of the recess (100) in the second layer (6).
  • the second groove width (W2) which is the groove width of the recess (100) in the second layer (6), is wider than the first groove width (W1), which is the groove width of the recess (100) in the first layer (5).
  • the second angle (D2) between the second side (8b) and the bottom surface of the first layer (5) is greater than the first angle (D1) between the first side (7b) and the bottom surface of the first layer (5), and the second thickness (L2) of the second metal compound layer (adhesion layer 171) at the portion in contact with the lower end of the second conductive layer (172) is greater than the first thickness (L1) of the first metal compound layer (adhesion layer 131) at the portion in contact with the lower end of the first conductive layer (132).
  • the thickness of a portion of the second metal compound layer (adhesion layer 171) changes continuously as it moves upward.
  • the first groove width (W1) is 0.3 ⁇ m or more and 50 ⁇ m or less.
  • a plurality of recesses (100) are provided in the board (3), and the first groove width (W1) of one of the plurality of recesses (100) and the first groove width (W1) of another of the plurality of recesses (100) may be different in width.
  • the second groove width (W2) is preferably 0.8 ⁇ m or more and 52.0 ⁇ m or less.
  • the first angle (D1) is greater than 90° and less than 135°.
  • a substrate (3) is provided with a plurality of recesses (100), and the first angle (D1) of one of the plurality of recesses (100) and the first angle (D1) of another of the plurality of recesses (100) are different in size.
  • the second angle (D2) is greater than 90° and less than 135°.
  • the first thickness (L1) is greater than 3 nm and less than 150 nm.
  • the conductive member (multilayer wiring board 1) of the tenth aspect of the present disclosure includes a plurality of first conductive wires (13), and the thickness (L1) of one of the plurality of first conductive wires (13) is different from the thickness (L1) of another of the plurality of first conductive wires (13).
  • the second thickness (L2) is preferably greater than 3 nm and less than 150 nm.
  • the conductive member (multilayer wiring board 1) of the twelfth aspect of the present disclosure includes a plurality of second conductive wires (17), and the thickness (L2) of one of the plurality of second conductive wires (17) is different from the thickness (L2) of another of the plurality of second conductive wires (17).
  • the substrate (3) further includes a film substrate (4) disposed under the first layer (5).
  • the film base material (4) of the board (3) is formed from a resin material that is flexible and optically transparent.
  • the first layer (5) of the substrate (3) and the second layer (6) of the substrate (3) are formed of a resin material that is insulating and optically transparent.
  • the first metal compound layer (adhesion layer 131) of the first conductive line (13) is curved and formed so as to protrude downward.
  • the second metal compound layer (adhesion layer 171) of the second conductive line (17) is curved and formed so as to protrude downward.
  • This disclosure can be used industrially as a conductive material.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

Dans la présente invention, un substrat (3) est pourvu d'un premier fil conducteur (13) et d'un second fil conducteur (17). Le premier fil conducteur (13) est pourvu d'une couche de contact étroit (131) et d'une couche conductrice (132) incorporée dans un évidement (100). Le second fil conducteur (17) est pourvu d'une couche de contact étroit (171) et d'une couche conductrice (172) incorporée dans un second évidement (8). La largeur de rainure (W2) du second évidement (8) est plus large que la largeur de rainure (W1) d'un premier évidement (7). L'angle (D2) formé par la surface inférieure de la première couche (5) et une surface latérale (8b) de celle-ci est supérieur à l'angle (D1) formé par la surface inférieure de la première couche (5) et une surface latérale (7b) de celle-ci. L'épaisseur (L2) de la couche de contact étroit (171) est supérieure à l'épaisseur (L1) de la couche de contact étroit (131).
PCT/JP2024/020775 2023-07-10 2024-06-06 Élément conducteur Pending WO2025013484A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023112969 2023-07-10
JP2023-112969 2023-07-10

Publications (1)

Publication Number Publication Date
WO2025013484A1 true WO2025013484A1 (fr) 2025-01-16

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ID=94215467

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PCT/JP2024/020775 Pending WO2025013484A1 (fr) 2023-07-10 2024-06-06 Élément conducteur

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WO (1) WO2025013484A1 (fr)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011141652A (ja) * 2010-01-06 2011-07-21 Hitachi Chem Co Ltd タッチパネルディスプレイ装置
US20110180309A1 (en) * 2010-01-26 2011-07-28 International Business Machines Corporation INTERCONNECT STRUCTURE EMPLOYING A Mn-GROUP VIIIB ALLOY LINER
JP2014519663A (ja) * 2011-06-10 2014-08-14 ミレナノテク シーオー．，エルティーディー． タッチスクリーンセンサー基板とタッチスクリーンセンサーおよびそれを含むパネル
US20140239504A1 (en) * 2013-02-28 2014-08-28 Hwei-Ling Yau Multi-layer micro-wire structure
WO2020149113A1 (fr) * 2019-01-17 2020-07-23 Ｊｘｔｇエネルギー株式会社 Film électroconducteur transparent
WO2021131319A1 (fr) * 2019-12-25 2021-07-01 パナソニックＩｐマネジメント株式会社 Capteur tactile
JP2023092093A (ja) * 2021-12-21 2023-07-03 パナソニックＩｐマネジメント株式会社 細線構造およびそれを用いたタッチセンサ

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011141652A (ja) * 2010-01-06 2011-07-21 Hitachi Chem Co Ltd タッチパネルディスプレイ装置
US20110180309A1 (en) * 2010-01-26 2011-07-28 International Business Machines Corporation INTERCONNECT STRUCTURE EMPLOYING A Mn-GROUP VIIIB ALLOY LINER
JP2014519663A (ja) * 2011-06-10 2014-08-14 ミレナノテク シーオー．，エルティーディー． タッチスクリーンセンサー基板とタッチスクリーンセンサーおよびそれを含むパネル
US20140239504A1 (en) * 2013-02-28 2014-08-28 Hwei-Ling Yau Multi-layer micro-wire structure
WO2020149113A1 (fr) * 2019-01-17 2020-07-23 Ｊｘｔｇエネルギー株式会社 Film électroconducteur transparent
WO2021131319A1 (fr) * 2019-12-25 2021-07-01 パナソニックＩｐマネジメント株式会社 Capteur tactile
JP2023092093A (ja) * 2021-12-21 2023-07-03 パナソニックＩｐマネジメント株式会社 細線構造およびそれを用いたタッチセンサ

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