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WO2019161710A1 - Circuit de démarrage - Google Patents

Circuit de démarrage Download PDF

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Publication number
WO2019161710A1
WO2019161710A1 PCT/CN2018/125386 CN2018125386W WO2019161710A1 WO 2019161710 A1 WO2019161710 A1 WO 2019161710A1 CN 2018125386 W CN2018125386 W CN 2018125386W WO 2019161710 A1 WO2019161710 A1 WO 2019161710A1
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WO
WIPO (PCT)
Prior art keywords
voltage
circuit
resistor
input voltage
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/125386
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English (en)
Chinese (zh)
Inventor
李树佳
冯刚
郑典清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mornsun Guangzhou Science and Technology Ltd
Original Assignee
Mornsun Guangzhou Science and Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mornsun Guangzhou Science and Technology Ltd filed Critical Mornsun Guangzhou Science and Technology Ltd
Publication of WO2019161710A1 publication Critical patent/WO2019161710A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/36—Means for starting or stopping converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0006—Arrangements for supplying an adequate voltage to the control circuit of converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33561—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having more than one ouput with independent control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to a switching power supply starting circuit, in particular to a starting circuit for supplying power to a control circuit or a control IC of a power stage circuit or for supplying a power supply circuit of a startup stage.
  • the startup circuit is widely used in the field of switching power supplies.
  • switching power supply products whether it is a primary power supply (AC-DC converter) or a secondary power supply (DC-DC converter)
  • AC-DC converter primary power supply
  • DC-DC converter secondary power supply
  • Power is supplied to drive the switch on and off by controlling the operation of the circuit to control the inductive device to periodically transfer energy.
  • the control circuit or the control IC In the general switching power supply, in order to solve the problem that the input voltage is lower than the minimum starting voltage of the control circuit or the control IC, the control circuit or the control IC enters an undervoltage state due to the inability to obtain a sufficiently high supply voltage, causing the corresponding switching power supply to fail to be turned on.
  • a two-stage power supply circuit (such as the branch circuit structure of Figure 11) can be used. The first stage circuit clamps the wide input voltage limit to a lower voltage value, and the second stage circuit passes the boost circuit (generally the BOOST circuit). The voltage of the stage is raised to the normal working voltage of the control circuit or the control IC, so that the switching power supply system starts working; or the single-stage power supply circuit (such as the branch circuit structure of FIG.
  • the voltage value reduces the voltage difference between the output voltages Vo and Vin at a low voltage, and expands the normal operating voltage range in which the Vo meets the control circuit or the control IC at a low voltage, so that the switching power supply system starts working.
  • the voltage difference between the voltage clamping circuit Vin and Vo is too large, the starting voltage of the second stage boosting circuit is limited.
  • the traditional voltage clamp circuit scheme is shown in Figure 2 (the load is the post-stage boost circuit). The circuit works as follows: when the product is energized, the transistor Q1 is turned on, and the emitter current of the transistor Q1 is quickly charged to the capacitor C2.
  • the voltage (that is, the voltage at the positive terminal of the startup circuit supplied to the power supply terminal Vcc of the control IC) climbs to the regulated value of the Zener diode D1 minus the base and emitter conduction voltage drop of the transistor Q1, and the Vcc voltage will The stability no longer increases.
  • the Vcc voltage reaches the operating voltage of the booster circuit, the booster circuit starts to work, and the power supply voltage of the latter control circuit or the control IC is established.
  • the current limited voltage switching power supply startup circuit in the industry is limited to: using a two-stage power supply circuit scheme or a single-stage power supply circuit scheme, the first-stage voltage clamp circuit will have a low-voltage input and output voltage difference.
  • the problem that the boost circuit or the latter control circuit cannot be started cannot meet the starting voltage range from extremely low voltage to high voltage.
  • the present invention provides a startup circuit capable of real-time detection of an input voltage.
  • the P-MOS transistor When the input voltage is low, the P-MOS transistor is turned on, so that the voltage difference between the output voltage of the startup circuit and the input voltage is extremely low.
  • the starting voltage of the booster circuit of the latter stage is basically followed by the input voltage, or the operating voltage of the latter stage control circuit or the control IC basically follows the input voltage; when the input voltage is detected to be high, the voltage formed by the voltage stabilizing circuit or the voltage clamping circuit Limit the circuit operation, limit the startup circuit output voltage to the working input voltage range of the post-stage boost circuit, or limit it within the operating voltage range of the latter stage control circuit or control IC.
  • the invention itself has extremely low loss.
  • the adjustable driving circuit itself has low loss, and at the same time, because of the P-MOS tube, the P-MOS tube is saturated and turned on during low voltage operation, and the on-resistance of the starting circuit is started.
  • the on-resistance is extremely low; when operating at high voltage, the voltage limiting circuit can adopt a voltage clamping circuit that satisfies the low loss, which not only ensures the normal operation of the starting circuit under high input voltage, but also reduces the loss of the starting circuit operation.
  • a starting circuit comprises a P-MOS tube, an adjustable driving circuit and a voltage limiting circuit; the input end of the adjustable driving circuit is connected to the input voltage Vin, and the input voltage Vin is subjected to voltage sampling to generate a driving.
  • a voltage Vg the driving voltage Vg is output to a gate of the P-MOS transistor, a source of the P-MOS transistor is connected to an input voltage Vin, and a drain of the P-MOS transistor is connected as an output end of a startup circuit Go to the latter stage circuit to supply power to the subsequent stage circuit; the input end and the output end of the voltage limiting circuit are respectively connected to the source and the drain of the P-MOS tube;
  • the voltage limiting circuit is a voltage stabilizing circuit that outputs a fixed voltage value, or a voltage limiting circuit that outputs a fixed voltage range; when the clock is stable, the output voltage of the voltage limiting circuit is a fixed voltage or a fixed voltage that meets the normal operation of the latter circuit. range;
  • the adjustable driving circuit is provided with a determining voltage interval.
  • Vin When the input voltage Vin is smaller than the minimum value of the adjustable driving circuit, the driving voltage Vg outputted by the adjustable driving circuit and the input voltage
  • the Vin voltage difference is greater than the saturation turn-on voltage of the P-MOS transistor, the P-MOS transistor enters the saturation region to conduct, shorts the voltage limiting circuit, and the drain of the P-MOS transistor supplies power to the subsequent circuit;
  • the voltage difference between the driving voltage Vg outputted by the adjustable driving circuit and the input voltage Vin is gradually decreased, and the P-MOS transistor enters Amplifying the region, and at the same time, the voltage limiting circuit is gradually turned on, and the drain of the P-MOS and the output of the voltage limiting circuit jointly supply power to the subsequent circuit;
  • the driving voltage Vg outputted by the adjustable driving circuit has no voltage difference with the input voltage Vin, and the P-MOS transistor enters As the area is turned off, the output of the voltage limiting circuit supplies power to the subsequent stage circuit.
  • the input voltage of the P-MOS transistor that is, the driving voltage Vg, and the input voltage Vin of the starting circuit are gradually reduced; and P-MOS is also allowed.
  • the voltage difference between the input voltage of the tube and the input voltage Vin of the starting circuit is changed from a saturation conduction voltage greater than the P-MOS tube to no pressure difference;
  • the P-MOS transistor When the output voltage Vg of the control circuit is excessive from a low potential to a high potential, the P-MOS transistor is allowed to enter the amplification region from the saturation conduction region and then gradually enter the cut-off region; the P-MOS transistor is also allowed to be turned on from saturation. The state jumps directly to the off state;
  • the interval in which the voltage limiting circuit and the P-MOS transistor are simultaneously turned on is allowed, and only the P-MOS transistor or the voltage limiting circuit is independently turned on.
  • the voltage limiting circuit includes a first chip, the first chip has a function of converting an input voltage Vin into a stable voltage range output; an input end of the first chip is connected to an input voltage Vin, The ground of the first chip is grounded, and the output of the first chip is connected to the drain of the P-MOS transistor.
  • the voltage limiting circuit includes a second chip, the second chip has a function of converting an input voltage Vin into a fixed output voltage; an input end of the second chip is connected to an input voltage Vin, the second The ground of the chip is grounded, and the output of the second chip is connected to the drain of the P-MOS transistor.
  • the voltage limiting circuit includes a seventh resistor, an eighth resistor, a second NPN transistor, a first capacitor and a first diode; and one end of the seventh resistor is connected to a collector of the second NPN transistor, The other end of the seventh resistor is connected to the input voltage Vin; one end of the eighth resistor is connected to the input voltage Vin, and the other end of the eighth resistor is connected to the base of the second NPN transistor; one end of the first capacitor is connected to the base of the second NPN transistor, The other end of the first capacitor is connected to the ground; the cathode of the first diode is connected to the base of the second NPN transistor, the anode of the first diode is connected to the input ground; and the emitter of the second NPN transistor is connected to the drain of the P-MOS transistor pole.
  • the first diode is a Zener diode.
  • the ground of the starting circuit is shared with an external power supply device and a subsequent circuit.
  • the adjustable driving circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first NPN transistor and a first PNP transistor;
  • the resistor is connected between the input voltage Vin and the collector of the first NPN transistor;
  • the fifth resistor is connected between the input voltage Vin and the sixth resistor;
  • the other end of the sixth resistor is grounded;
  • the emitter of the first NPN transistor is connected to the fourth resistor
  • One end of the first NPN transistor is connected to the connection point of the fifth resistor and the sixth resistor; the other end of the fourth resistor is grounded;
  • one end of the second resistor is connected to the collector of the first NPN transistor, and the other end of the second resistor is a base of the first PNP transistor is connected;
  • an emitter of the first PNP transistor is connected to the input voltage Vin, and a collector of the first PNP transistor is connected to one end of the first resistor and outputs a driving voltage
  • the present invention has the following remarkable effects:
  • the invention adopts a P-MOS tube circuit to control the output voltage of the starting circuit at low voltage, thereby ensuring that the output voltage of the starting circuit is substantially consistent with the input voltage at low voltage, and satisfies the power supply requirement of the low voltage stepping circuit of the latter stage.
  • the circuit structure of the invention adopts a voltage limiting circuit composed of a voltage regulator circuit or a clamp circuit with a wide input voltage range, thereby ensuring that the output voltage of the starting circuit is not too high when the high voltage input is high, and satisfies the high voltage of the boosting circuit of the latter stage.
  • the input voltage range is not too high when the high voltage input is high, and satisfies the high voltage of the boosting circuit of the latter stage.
  • the invention itself has extremely low loss, and adopts a voltage limiting circuit composed of a low-loss constant current limiting chip.
  • the voltage sampling loss of the adjustable driving circuit is also small, and the circuit loss is not increased due to the circuit characteristics of the overcurrent device itself.
  • Figure 1 is a block diagram of the application of a conventional wide input range startup circuit that satisfies the low voltage input;
  • Figure 2 is a schematic diagram of a conventional voltage clamping circuit
  • FIG. 3 is a schematic block diagram of the present invention.
  • FIG. 4 is a schematic diagram of an application of a first embodiment of the present invention.
  • Figure 5 is a schematic circuit diagram of a first embodiment of the present invention.
  • Figure 6 is a circuit diagram of a third embodiment of the present invention.
  • FIG. 3 shows a block diagram of the connection following the initial technical solution described above.
  • Figure 3 shows a block diagram of the connection following the initial technical solution described above.
  • the external power supply device works normally. When the input voltage is within the adjustable voltage range of the adjustable drive circuit, the voltage difference between the output voltage of the startup circuit and the input voltage increases slowly with the increase of the input voltage.
  • the external power supply device works normally.
  • the output voltage of the startup circuit is stabilized at a voltage value or stabilized in an output voltage range, regardless of the change of the input voltage.
  • a starting circuit of the present invention comprises a P-MOS transistor TR1, an adjustable driving circuit and a voltage limiting circuit.
  • a P-MOS transistor TR1 for each circuit module, the following specific circuits are specifically described with reference to FIG. 5 as follows:
  • the adjustable driving circuit of the present invention comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first NPN transistor Q3, and a first PNP transistor Q2.
  • the third resistor R3 is connected between the input voltage Vin and the collector of the first NPN transistor Q3; the fifth resistor R5 is connected between the input voltage Vin and the sixth resistor R6; the other end of the sixth resistor R6 is grounded;
  • the emitter of an NPN transistor Q3 is connected to one end of the fourth resistor R4, the base is connected to the connection point of the fifth resistor R5 and the sixth resistor R6; the other end of the fourth resistor R4 is grounded; one end of the second resistor R2 is connected to the first NPN transistor
  • the collector of Q3 is connected to the base of the first PNP transistor Q2; the emitter of the first PNP transistor Q2 is connected to the input voltage Vin, and the collector of the first PNP transistor Q2 is connected to one end of the first resistor R1 and is adjustable
  • the output terminal of the driving circuit outputs a driving voltage Vg; the other end of the first resistor R1 is grounded.
  • the gate of the P-MOS transistor TR1 of the present invention is connected to the output end of the adjustable driving circuit, the source of the P-MOS transistor TR1 is connected to the input voltage Vin, and the drain of the P-MOS transistor TR1 is used as the output of the starting circuit. Voltage Vo.
  • the voltage limiting circuit of the present invention is a voltage clamping circuit that converts the input voltage Vin into a stable voltage range output, including the first chip IC1.
  • the first chip IC1 can be selected with a three-terminal regulator IC 7805.
  • the input end of the first chip IC1 is connected to the input voltage Vin, the ground end of the first chip IC1 is grounded, and the output end of the first chip IC1 is connected to the drain of the P-MOS transistor TR1 as the output voltage Vo of the starting circuit.
  • the NPN transistor Q3 When the input voltage is less than the minimum value of the adjustable voltage range of the adjustable driving circuit, the NPN transistor Q3 is in the off state, the current flowing through the resistor R3 is small, the collector voltage of the NPN transistor Q3 basically follows the input voltage, and the base of the PNP transistor Q2 The voltage difference from the emitter is very small, the PNP transistor Q2 is turned off, the collector of Q2 is pulled down by the resistor R1; the output signal Vg of the adjustable driving circuit is low, so that the gate and the source of the P-MOS transistor are between The reverse voltage is large, the P-MOS transistor is saturated and turned on, and the voltage limiting circuit is short-circuited.
  • the starting circuit output voltage Vo follows the input Vin, and the voltage difference is the saturation conduction voltage difference of the P-MOS tube, and there is almost no pressure difference.
  • the NPN transistor Q3 When the input voltage is gradually increased, the NPN transistor Q3 enters the amplification region; the current flowing through the resistor R3 gradually increases, the voltage difference across the resistor R3 gradually increases, and the voltage difference between the base and the emitter of the PNP transistor Q2 gradually increases.
  • the transistor Q2 enters the amplification region, and the current flowing through the collector of Q2 follows the input voltage to increase gradually, and the voltage of the collector collector of Q2 gradually increases with the voltage of the resistor R1; the output signal Vg of the adjustable driving circuit gradually increases, so that the P-MOS tube
  • the reverse voltage between the gate and the source is gradually reduced, the P-MOS transistor enters the amplification region, and the current between Vin and Vo is provided by the P-MOS transistor circuit and IC1 7805; during the slow rise of Vin, the startup is started.
  • the voltage difference between the circuit output voltage Vo and the input voltage Vin gradually increases as the P-MOS transistor enters the amplification region.
  • the power supply device works normally, and when the input voltage exceeds the maximum value of the adjustable voltage range of the adjustable driving circuit, the output voltage Vo of the starting circuit is stabilized at a voltage value, which is independent of the change of the input voltage Vin:
  • the collector circuit of the NPN transistor Q3 continues to increase, the current flowing through the resistor R3 continues to increase, and the voltage difference between the base and the emitter of the PNP transistor Q2 enters.
  • the saturation conduction interval (PN junction voltage difference), the transistor Q2 is saturated and turned on, the collector follows the input voltage Vin and the voltage difference is small; the output signal Vg of the adjustable driving circuit is approximately equal to the input voltage Vin, so that the gate of the P-MOS tube The voltage difference between the pole and the source is approximately 0, and the P-MOS transistor is turned off; the current between Vin and Vo is directly provided by IC1 7805, and the output voltage of the startup circuit Vo is directly determined by the regulation characteristics of IC1 7805, and The output voltage is stable at 5V.
  • the second embodiment of the present invention can be obtained by modifying the voltage limiting circuit.
  • the adjustable driving circuit and the PNP transistor circuit described in this embodiment are consistent with the first embodiment.
  • the voltage limiting circuit of the present invention is a voltage stabilizing circuit including a second chip.
  • the second chip can be any chip that has the function of stabilizing the input voltage to a fixed voltage value output.
  • the second embodiment does not provide a separate figure.
  • the connection relationship of the second chip can be referred to the replacement voltage limiting circuit in FIG. 5.
  • the input end of the second chip is connected to the input voltage Vin, and the second chip is grounded.
  • the terminal is grounded, and the output terminal of the second chip is connected to the drain of the P-MOS transistor TR1 as the output voltage Vo of the startup circuit.
  • This embodiment is substantially the same as the working process of the first embodiment, and the same portions will not be described again.
  • the difference is that the voltage limiting circuit is replaced with the second chip having the voltage stabilizing function.
  • the voltage limiting circuit operates, the input voltage Vin After the voltage limiting circuit, the output voltage Vo is not stabilized at a value but stabilized in an output voltage range; mainly affects the working state 3, as follows:
  • the collector circuit of the NPN transistor Q3 continues to increase, the current flowing through the resistor R3 continues to increase, and the voltage difference between the base and the emitter of the PNP transistor Q2 enters the saturation conduction.
  • Interval PN junction voltage difference
  • transistor Q2 is saturated, the collector follows the input voltage Vin and the voltage difference is small; the output signal Vg of the adjustable driving circuit is approximately equal to the input voltage Vin, so that the gate and source of the P-MOS tube
  • the voltage difference between the poles is approximately 0, and the P-MOS transistor is turned off; the current between Vin and Vo is directly provided by the second chip, and the output voltage Vo of the startup circuit is directly determined by the voltage regulation characteristic of the second chip, and the output is output.
  • the voltage is stable over an output voltage range.
  • the third embodiment of the present invention can be obtained by modifying the voltage limiting circuit.
  • the voltage limiting circuit of the third embodiment will be described below with reference to FIG. 6 below:
  • the voltage limiting circuit in this embodiment is also a voltage stabilizing circuit, including a seventh resistor R7, an eighth resistor R8, a second NPN transistor Q4, a first capacitor C1 and a first diode Z1, and the first diode Z1 is available. 10V regulator tube.
  • One end of the seventh resistor R7 is connected to the collector of the second NPN transistor Q4, and the other end is connected to Vin; the other end of the eighth resistor R8 is connected to Vin, and the other end is connected to the base of the second NPN transistor Q4; the first capacitor C1 One end is connected to the base of the second NPN transistor Q4, and the other end is connected to the input ground; the cathode of the first diode Z1 is connected to the base of the second NPN transistor Q4, the anode is connected to the input ground; and the emitter of the second NPN transistor Q4 is connected to the P The drain of the MOS transistor TR1 serves as the output voltage Vo of the startup circuit.
  • the working principle is the same as that of the first embodiment and the second embodiment.
  • the output voltage Vin is stabilized at a value after the input voltage Vin passes through the voltage limiting circuit, and details are not described herein.
  • the first chip IC1 is composed of a seventh resistor, an eighth resistor, a second NPN transistor Q4, a first capacitor C1 and a first two
  • a voltage limiting circuit composed of a voltage regulator circuit composed of a pole tube Z1 or a second chip having a voltage stabilizing function, as long as it can clamp a voltage limit of a wide input range to a voltage value, or a circuit that satisfies a

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  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

La présente invention concerne un circuit de démarrage; un circuit limiteur de tension constitué d'un circuit de transistor métal-oxyde-semi-conducteur à canal p (P-MOS), d'un circuit de stabilisation de tension ou d'un circuit de fixation de niveau de tension régule la plage de tension de sortie de façon à garantir que la tension de sortie atteint la plage de tension d'entrée ultra-large d'étage ultérieur et la plage de tension de fonctionnement d'un circuit survolteur d'étage ultérieur d'un circuit de démarrage de module source d'alimentation. La tension d'entrée est échantillonnée au moyen d'un circuit d'attaque réglable pour garantir que le circuit de démarrage n'affecte pas l'alimentation électrique d'étage ultérieur en raison d'une différence de pression de celui-ci pendant un fonctionnement à basse tension. Pendant un fonctionnement à haute tension, la tension de sortie peut être régulée à l'intérieur d'une plage de tension pour garantir que la tension de sortie du circuit de démarrage à l'intérieur de la plage de tension de fonctionnement atteint la plage de tension de fonctionnement du circuit survolteur d'étage ultérieur. Par ailleurs, la perte d'état de fonctionnement du circuit est extrêmement faible.
PCT/CN2018/125386 2018-02-26 2018-12-29 Circuit de démarrage Ceased WO2019161710A1 (fr)

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CN108173426A (zh) * 2018-02-26 2018-06-15 广州金升阳科技有限公司 一种低导通压降的启动电路
CN108173425A (zh) * 2018-02-26 2018-06-15 广州金升阳科技有限公司 一种启动电路
WO2020203974A1 (fr) * 2019-03-29 2020-10-08 ラピスセミコンダクタ株式会社 Dispositif de pilotage d'affichage
CN112803411A (zh) * 2021-04-02 2021-05-14 国网浙江省电力有限公司营销服务中心 一种用于台区拓扑识别的信号发送电路及识别方法
CN113438561A (zh) * 2021-04-26 2021-09-24 青岛鼎信通讯股份有限公司 一种具有户变识别功能的ⅱ型集中器
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CN114326913B (zh) * 2021-12-31 2024-03-15 中国电子科技集团公司第五十八研究所 一种输入电压范围可选择性输出的电路
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CN116032105B (zh) * 2023-03-24 2023-06-16 深圳市南方硅谷半导体股份有限公司 一种电源过压保护ic

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