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WO2013168774A1 - Transistor à couches minces, dispositif d'affichage, capteur d'image et capteur radiographique - Google Patents

Transistor à couches minces, dispositif d'affichage, capteur d'image et capteur radiographique Download PDF

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Publication number
WO2013168774A1
WO2013168774A1 PCT/JP2013/063067 JP2013063067W WO2013168774A1 WO 2013168774 A1 WO2013168774 A1 WO 2013168774A1 JP 2013063067 W JP2013063067 W JP 2013063067W WO 2013168774 A1 WO2013168774 A1 WO 2013168774A1
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Prior art keywords
thin film
film transistor
layer
active layer
electrode
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English (en)
Japanese (ja)
Inventor
真宏 高田
雅司 小野
文彦 望月
田中　淳
鈴木　真之
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Fujifilm Corp
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Fujifilm Corp
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Priority to KR1020147031366A priority Critical patent/KR101851428B1/ko
Priority to JP2014514749A priority patent/JP5869110B2/ja
Publication of WO2013168774A1 publication Critical patent/WO2013168774A1/fr
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H10F39/189—X-ray, gamma-ray or corpuscular radiation imagers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays

Definitions

  • the present invention relates to a thin film transistor, a display device, an image sensor, and an X-ray sensor.
  • Field effect transistors are used in unit elements of semiconductor memory integrated circuits, high frequency signal amplifying elements, liquid crystal driving elements, and the like, and particularly thin-film transistors are used in a wide range of fields as thin film transistors (TFTs).
  • TFTs thin film transistors
  • IGZO amorphous oxide semiconductor thin film
  • the transistor characteristics do not change as much as possible at the above wavelength.
  • the TFT characteristics are changed by the light having the above wavelength, it is necessary to form a light shielding layer in order to prevent the light from the blue light emitting layer or the backlight from being directly irradiated to the TFT, leading to an increase in manufacturing cost.
  • it becomes difficult to produce a transparent display that completely transmits visible light. From the above situation, it is insensitive to visible light, for example, when a monochromatic light of ⁇ 420 nm or more is irradiated at 10 ⁇ W / cm 2 for 10 minutes, the threshold shift amount is 1 V or less, more preferably 0.2 V or less. It is required to be.
  • V g 0
  • V th a small threshold voltage
  • high mobility and a small threshold voltage can be realized by reducing the film thickness of the IGZO layer in a TFT using a high In composition ratio, that is, an In-rich IGZO layer. Proposed.
  • the present invention uses an In-rich oxide semiconductor layer with extremely high electron mobility as an active layer, has both high mobility and light stability, is highly practical, and has excellent display characteristics or sensitivity characteristics. It is an object to provide a display device, an image sensor, and an X-ray sensor.
  • an active layer, a source electrode, a drain electrode, a gate insulating film, and a gate electrode wherein the active layer is an amorphous oxide semiconductor layer containing at least In as a metal element.
  • the composition ratio of In to all metal elements contained in the active layer is 50% or more
  • the thickness of the active layer is 25 nm or less
  • each of the source electrode and the drain electrode includes two or more layers.
  • the layer closest to the active layer in the thickness direction is an oxide layer containing at least Ga as a metal element
  • the oxide layer includes the oxide layer.
  • a thin film transistor in which a composition ratio of Ga to all metal elements is 30% or more.
  • ⁇ 2> The thin film transistor according to ⁇ 1>, wherein the active layer includes In and at least one element selected from Zn, Ga, and Sn as a metal element.
  • ⁇ 3> The thin film transistor according to ⁇ 1> or ⁇ 2>, wherein in the oxide layer, a composition ratio of Ga to all metal elements contained in the oxide layer is 50% or more.
  • ⁇ 4> The thin film transistor according to any one of ⁇ 1> to ⁇ 3>, wherein the oxide layer includes In, Ga, Zn, and O.
  • ⁇ 5> The thin film transistor according to any one of ⁇ 1> to ⁇ 4>, wherein the oxide layer is amorphous.
  • ⁇ 6> The thin film transistor according to any one of ⁇ 1> to ⁇ 5>, wherein the oxide layer has a thickness of 10 nm to 100 nm.
  • ⁇ 7> The thin film transistor according to any one of ⁇ 1> to ⁇ 6>, wherein a protective layer is formed on a surface of the active layer exposed between the source electrode and the drain electrode.
  • ⁇ 8> The thin film transistor according to any one of ⁇ 1> to ⁇ 7>, wherein the active layer is formed by sputtering.
  • a display device comprising the thin film transistor according to any one of ⁇ 1> to ⁇ 8>.
  • An image sensor comprising the thin film transistor according to any one of ⁇ 1> to ⁇ 8>.
  • An X-ray sensor comprising the thin film transistor according to any one of ⁇ 1> to ⁇ 8>.
  • an In-rich oxide semiconductor layer having an extremely high electron mobility is used as an active layer, a thin film transistor having both high mobility and light stability and high practicality, and display characteristics or sensitivity characteristics. It is possible to provide a display device, an image sensor, and an X-ray sensor excellent in the above.
  • FIG. 6 is a schematic diagram illustrating an example of a bottom gate structure-top contact type TFT. It is a schematic diagram showing an example of a bottom gate structure-bottom contact type TFT. It is a schematic block diagram of the electrical wiring of the liquid crystal display device provided with TFT of this invention. It is a schematic sectional drawing which shows the cross section of a part of liquid crystal display device shown in FIG. It is a schematic block diagram of the electrical wiring of the organic electroluminescence display provided with TFT of this invention.
  • FIG. 8B is a cross-sectional view taken along line AA of the TFT shown in FIG. 8A.
  • FIG. 6 is a graph showing Vg-Id characteristics under monochrome light irradiation for the TFT according to Example 1;
  • the inventors of the present invention can obtain high mobility by using an IGZO film having a higher In composition ratio than IGZO that is generally used, and reduce the film thickness, thereby stabilizing the light stability with respect to visible light.
  • the source and drain electrodes each have a laminated structure of two or more layers, and each layer on the active layer side is an oxide layer containing Ga, so that the threshold can be controlled without impairing mobility, and normally-off drive Was found to be feasible.
  • the thin film transistor of the present invention is an amorphous oxide semiconductor layer having an active layer, a source electrode, a drain electrode, a gate insulating film, and a gate electrode, and the active layer includes at least In as a metal element.
  • the composition ratio of In to all metal elements contained in the active layer is 50% or more
  • the thickness of the active layer is 25 nm or less
  • each of the source electrode and the drain electrode is 2 or more.
  • the layer closest to the active layer in the thickness direction is an oxide layer containing at least Ga as a metal element.
  • the oxide The composition ratio of Ga to all metal elements contained in the layer is 30% or more.
  • the TFT of the present invention is used as an organic EL or LCD driving TFT, it is not necessary to provide a light blocking layer for the TFT, and the manufacturing cost can be greatly reduced. Further, since the threshold voltage is small in normally-off driving, a TFT element suitable for power saving can be obtained.
  • the element structure of the TFT according to the present invention may be either a so-called inverted stagger structure (also referred to as a bottom gate type) or a stagger structure (also referred to as a top gate type) based on the position of the gate electrode. Further, based on the contact portion between the active layer and the source and drain electrodes (referred to as “source / drain electrodes” as appropriate), either a so-called top contact type or bottom contact type may be used.
  • the top gate type is a form in which a gate electrode is disposed on the upper side of the gate insulating film and an active layer is formed on the lower side of the gate insulating film.
  • the bottom gate type is a gate electrode on the lower side of the gate insulating film.
  • the bottom contact type is a mode in which the source / drain electrodes are formed before the active layer and the lower surface of the active layer is in contact with the source / drain electrodes.
  • the top contact type is the type in which the active layer is the source / drain. In this embodiment, the upper surface of the active layer is in contact with the source / drain electrodes.
  • FIG. 1A is a schematic diagram showing an example of a top contact type TFT according to the present invention having a top gate structure.
  • the above-described oxide semiconductor thin film is stacked as an active layer 14 on one main surface of the substrate 12.
  • a source electrode 16 and a drain electrode 18 each having a two-layer laminated structure are disposed on the active layer 14 so as to be separated from each other, and a gate insulating film 20 and a gate electrode 22 are sequentially laminated thereon. ing.
  • FIG. 1B is a schematic view showing an example of a bottom contact type TFT according to the present invention having a top gate structure.
  • a source electrode 16 and a drain electrode 18 each having a two-layer structure are disposed on one main surface of the substrate 12 so as to be separated from each other. Then, the above-described oxide semiconductor thin film, the gate insulating film 20, and the gate electrode 22 are sequentially stacked as the active layer.
  • FIG. 1C is a schematic view showing an example of a top contact type TFT according to the present invention having a bottom gate structure.
  • the gate electrode 22, the gate insulating film 20, and the above-described oxide semiconductor thin film as the active layer 14 are sequentially stacked on one main surface of the substrate 12.
  • a source electrode 16 and a drain electrode 18 each having a two-layer laminated structure are disposed apart from each other.
  • FIG. 1D is a schematic view showing an example of a bottom contact type TFT according to the present invention having a bottom gate structure.
  • the gate electrode 22 and the gate insulating film 20 are sequentially stacked on one main surface of the substrate 12.
  • a source electrode 16 and a drain electrode 18 each having a two-layered structure are provided on the surface of the gate insulating film 20 so as to be separated from each other, and further, the above-described oxide semiconductor thin film is formed thereon as the active layer 14.
  • the layers 16A and 18A are closer to the active layer 14 than the layers 16B and 18B, and correspond to the “layer closest to the active layer”.
  • the TFT according to this embodiment can have various configurations, and may appropriately have a configuration including a protective layer on the active layer 14 and an insulating layer on the substrate. .
  • each component including the substrate on which the TFT of the present invention is formed will be described in detail.
  • the case of manufacturing a top contact type TFT 10 with the top gate structure shown in FIG. 1A will be specifically described.
  • the present invention can be similarly applied to the case of manufacturing other types of TFTs. it can.
  • the shape, structure, size and the like of the substrate 12 on which the thin film transistor 10 of the present invention is formed are not particularly limited and can be appropriately selected according to the purpose.
  • the structure of the substrate 12 may be a single layer structure or a laminated structure.
  • an inorganic substrate such as glass or YSZ (yttrium stabilized zirconium), a resin substrate, a composite material thereof, or the like can be used.
  • a resin substrate and a composite material thereof are preferable in terms of light weight and flexibility.
  • the resin substrate is preferably excellent in heat resistance, dimensional stability, solvent resistance, electrical insulation, workability, low air permeability, low moisture absorption, and the like.
  • the resin substrate may include a gas barrier layer for preventing permeation of moisture and oxygen, an undercoat layer for improving the flatness of the resin substrate and adhesion with the lower electrode, and the like.
  • the thickness of the substrate 12 is not particularly limited, but is preferably 50 ⁇ m or more and 500 ⁇ m or less. When the thickness of the substrate is 50 ⁇ m or more, high flatness of the substrate itself can be secured. Moreover, when the thickness of the substrate is 500 ⁇ m or less, the flexibility of the substrate itself is high, which is advantageous for use as a substrate for a flexible device.
  • the active layer 14 is an amorphous oxide semiconductor layer containing at least In as a metal element, the In composition ratio (atomic ratio) to all metal elements contained in the active layer 14 is 50% or more, and the thickness is 25 nm or less.
  • the active layer 14 is in contact with the source / drain electrodes 16 and 18 to enable conduction between the source / drain electrodes 16 and 18 (between SD).
  • the active layer 14 includes, for example, In—Ga—Zn—O, In—Zn—O, In—Ga—O, In—Sn—O, In—Sn—Zn—O, and In—Ga—Sn. It is composed of an amorphous oxide semiconductor film such as —O or In—O.
  • the active layer 14 preferably contains In and at least one element selected from Zn, Ga, and Sn from the viewpoint of obtaining high transmission characteristics.
  • the composition ratio of In to all metal elements in the active layer 14 is preferably 90% or less from the viewpoint of easily obtaining an amorphous film. If it is 90% or more, the film tends to be crystallized, and the device characteristic variation due to the grain boundary density tends to increase.
  • a wet method such as a printing method or a coating method
  • a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as CVD or plasma CVD method
  • a chemical method such as CVD or plasma CVD method
  • the active layer 14 can be formed according to a method appropriately selected in consideration of suitability with the material to be used, but the sputtering method is preferable from the viewpoint of the film formation rate, the film density, and the like.
  • the film thickness of the oxide semiconductor layer 14 formed using a film formation method such as sputtering is 25 nm or less, but is preferably 5 nm or more from the viewpoint of the flatness of the thin film.
  • the In composition ratio (atomic ratio) to all metal elements in the formed oxide semiconductor layer 14 can be 50% or more.
  • single sputtering of a composite oxide target containing two or more kinds of metal elements constituting the oxide semiconductor layer 14 may be used, and an oxide of each constituent element or a combination of these composite oxide targets The co-sputtering used may be used.
  • the conductivity of the obtained oxide semiconductor film can be controlled.
  • a method for controlling the oxygen partial pressure in the film formation chamber a method of changing the amount of O 2 gas introduced into the film formation chamber may be used, or a method of changing the introduction amount of oxygen radicals or ozone gas may be used.
  • a reducing gas such as H 2 or N 2 may be introduced.
  • the oxide semiconductor film is formed, it is patterned into the shape of the active layer 14.
  • the patterning can be performed by, for example, photolithography and etching. Specifically, a resist pattern is formed by photolithography on the portion where the oxide semiconductor film remains as the active layer 14, and etching is performed with an acid solution such as hydrochloric acid, nitric acid, dilute sulfuric acid, or a mixed solution of phosphoric acid, nitric acid and acetic acid. Thus, a pattern of the active layer 14 is formed.
  • a protective layer for protecting the exposed surface between the source / drain electrodes 16, 18 of the oxide semiconductor layer 14 when the source / drain electrodes 16, 18 are formed and etched (Not shown) is preferably formed.
  • the method for forming the protective layer is not particularly limited, and the protective layer may be formed continuously with the formation of the oxide semiconductor layer 14, or the protective layer may be formed after the patterning of the oxide semiconductor layer 14. Alternatively, vapor phase film formation or liquid phase film formation may be used.
  • the protective layer When forming the protective layer in a vapor phase, it is preferable to perform the deposition under conditions that do not damage the surface exposed between the source / drain electrodes 16 and 18 of the oxide semiconductor layer 14.
  • the vapor deposition method which is not can be used suitably.
  • the protective layer may be a metal oxide layer or may be formed of an organic material such as a resin.
  • the protective layer may be removed after forming the source / drain electrodes.
  • the thickness of the protective layer is not particularly limited, and is, for example, 5 nm or more and 200 nm or less.
  • the source electrode 16 and the drain electrode 18 are arranged to be conductive through the oxide semiconductor layer 14.
  • Each of the source / drain electrodes 16 and 18 has a laminated structure of two or more layers, and is a layer closest to the oxide semiconductor layer 14 in the thickness direction, that is, a layer in contact with the oxide semiconductor layer 14 in the TFT 10 shown in FIG. 16A and 18A are oxide layers containing at least Ga as a metal element, and the composition ratio (atomic ratio) of Ga to all metal elements including Ga is 30% or more.
  • Each of the oxide layers 16A and 18A of the source / drain electrodes 16 and 18 closest to the oxide semiconductor layer 14 is formed of Ga with respect to all metal elements from the viewpoint that normally-off driving is easily obtained when the TFT is formed.
  • the composition ratio is preferably 50% or more, and more preferably 90% or less.
  • each of the oxide layers 16A and 18A of the source / drain electrodes 16 and 18 closest to the oxide semiconductor layer 14 contains In, Ga, Zn, and O, respectively, from the viewpoint that a heterogeneous phase is hardly formed at the interface.
  • the thickness of each oxide layer 16A, 18A is preferably 10 nm or more and 100 nm or less, and more preferably 30 nm or more and 70 nm or less, from the viewpoint of easily obtaining normally-off drive when TFTs are formed.
  • the oxide layers 16A and 18A of the source / drain electrodes 16 and 18 closest to the oxide semiconductor layer 14 are preferably amorphous from the viewpoint of suppressing the scattering of electrons by the crystal grain boundaries. Whether the active layer 14 and the oxide layers 16A and 18A are amorphous can be confirmed by X-ray diffraction measurement. That is, when a clear peak indicating a crystal structure is not detected by X-ray diffraction measurement, it can be determined that the oxide layers 16A and 18A are amorphous.
  • the other layers 16B and 18B constituting the source / drain electrodes 16 and 18 are not particularly limited as long as they function as a part of the electrodes 16 and 18, but are preferably made of a material having high conductivity.
  • metals such as Al, Mo, Cr, Ta, Ti, Au, Ag, Al—Nd, Ag alloys, tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), In It can be formed using a conductive film of a metal oxide such as -Ga-Zn-O.
  • the source / drain electrodes 16 and 18 each have a laminated structure of two or more layers and can be three or more layers, but a two-layer structure is preferable from the viewpoint of manufacturing cost and the like.
  • the total film thickness of the source / drain electrodes 16 and 18 is preferably 10 nm or more and 1000 nm or less, preferably 50 nm or more and 100 nm or less in consideration of film forming property, patterning property by etching or lift-off method, conductivity, and the like. More preferred.
  • the source / drain electrodes 16 and 18 are formed by, for example, a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as CVD or plasma CVD method.
  • the film may be formed by a method appropriately selected in consideration of suitability with the material to be used, and different film forming methods may be used depending on each material constituting the laminated structure.
  • the source / drain electrodes 16 and 18 are formed by patterning a conductive layer having a laminated structure into a predetermined shape by etching or a lift-off method. At this time, it is preferable that all the layers constituting the source / drain electrodes 16 and 18 and the wiring connected to each electrode are simultaneously patterned. Note that each layer may be etched separately depending on the material used.
  • the gate insulating film 20 is disposed so as to separate the active layer 14 and the source / drain electrodes 16 and 18 from the gate electrode 22.
  • the gate insulating film 20 preferably has a high insulating property.
  • an insulating film such as SiO 2 , SiN x , SiON, Al 2 O 3 , Y 2 O 3 , Ta 2 O 5 , HfO 2 , or a compound thereof is used.
  • An insulating film including two or more kinds may be used.
  • the gate insulating film 20 is formed by a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method or an ion plating method, CVD, plasma.
  • the film is formed according to a method appropriately selected in consideration of suitability with a material to be used among chemical methods such as a CVD method.
  • the gate insulating film 20 is patterned into a predetermined shape by photolithography and etching.
  • the gate insulating film 20 needs to have a thickness for reducing the leakage current and improving the voltage resistance. On the other hand, if the thickness of the gate insulating film 20 is too large, the driving voltage is increased.
  • the thickness of the gate insulating film 20 is preferably 10 nm to 10 ⁇ m, more preferably 50 nm to 1000 nm, and particularly preferably 100 nm to 400 nm.
  • the gate electrode 22 is disposed so as to face the active layer 14 with the gate insulating film 20 interposed therebetween.
  • the gate electrode 22 is made of a material having high conductivity.
  • metals such as Al, Mo, Cr, Ta, Ti, Au, Ag, Al—Nd, Ag alloy, tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), IGZO It can be formed using a conductive film of a metal oxide or the like.
  • these conductive films can be used in a single layer structure or a stacked structure of two or more layers.
  • the gate electrode 22 is formed by a wet method such as a printing method or a coating method, a physical method such as a vacuum deposition method, a sputtering method, or an ion plating method, or a chemical method such as CVD or plasma CVD method.
  • the film is formed according to a method appropriately selected in consideration of suitability with the material to be used from among other methods.
  • the gate electrode 22 is formed by patterning into a predetermined shape by etching or a lift-off method. At this time, it is preferable to pattern the gate electrode 22 and the gate wiring simultaneously.
  • the film thickness of the conductive film constituting the gate electrode 22 is preferably 10 nm or more and 1000 nm or less, and preferably 50 nm or more and 200 nm or less in consideration of film forming properties, patterning properties by etching or lift-off methods, conductivity, and the like. More preferred.
  • the order of the post-annealing treatment is not particularly limited as long as it is after the formation of the oxide semiconductor layer.
  • the post-annealing treatment may be performed immediately after the formation of the oxide semiconductor layer, or the formation and patterning of electrodes and insulating films. You may go after all is finished.
  • the post-annealing temperature is preferably 100 ° C. or higher and 500 ° C. or lower in order to suppress variations in electrical characteristics, and more preferably 100 ° C. or higher and 300 ° C. or lower when a resin substrate is used as the flexible substrate.
  • the atmosphere during post-annealing is preferably an inert atmosphere or an oxidizing atmosphere. When post-annealing is performed in a reducing atmosphere, oxygen in the oxide semiconductor layer 14 is released, excess carriers are generated, and variations in electrical characteristics are likely to occur.
  • the thin film transistor of the present invention is not limited to the top gate type as shown in FIG. As long as the relationship between the source / drain electrodes 16 and 18 is satisfied, a top gate type thin film transistor in which the active layer 14 is formed after the source / drain electrodes 16 and 18 as shown in FIG. It may be a bottom gate type thin film transistor as shown in FIG. 1C or FIG. 1D. It is to be noted that the source / drain electrodes 16 and 18 can be formed more easily in the top contact type shown in FIGS. 1A and 1C than in the bottom contact type shown in FIGS. 1B and 1D, and the manufacturing cost can be reduced.
  • the application of the thin film transistor of the present invention is not particularly limited, but has high mobility and has normally-off TFT characteristics. Therefore, for example, an electro-optical device (for example, a liquid crystal display device, an organic EL display device, an inorganic device) It is preferably used in a driving element in a display device such as an EL display device), particularly in a large area device. Further, since it has high light stability, it can be suitably used for a transparent display device or the like. Furthermore, the thin film transistor of the present invention is particularly suitable for devices that can be produced by a low-temperature process using a resin substrate (for example, a flexible display), and various sensors such as an X-ray sensor, MEMS (Micro Electro Mechanical System), and the like. It is preferably used as a drive element (drive circuit) in an electronic device.
  • an electro-optical device for example, a liquid crystal display device, an organic EL display device, an inorganic device
  • a driving element in a display device such as an EL display device
  • the electro-optical device of the present invention includes the above-described thin film transistor of the present invention.
  • the electro-optical device include a display device (for example, a liquid crystal display device, an organic EL (Electro Luminescence) display device, an inorganic EL display device, etc.).
  • a display device for example, a liquid crystal display device, an organic EL (Electro Luminescence) display device, an inorganic EL display device, etc.
  • an image sensor such as a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor), an X-ray sensor, or the like is suitable.
  • FIG. 2 shows a schematic configuration diagram of electrical wiring of a liquid crystal display device which is an example of the electro-optical device of the present invention
  • FIG. 3 shows a schematic sectional view of a part thereof.
  • the liquid crystal display device 100 includes a plurality of gate lines 112 that are parallel to each other and data lines 114 that are parallel to each other and intersect the gate lines 112.
  • the gate wiring 112 and the data wiring 114 are electrically insulated.
  • the thin film transistor 10 of the present invention is provided in the vicinity of the intersection between the gate wiring 112 and the data wiring 114.
  • the gate electrode 22 of the thin film transistor 10 is connected to the gate wiring 112, and the source electrode 16 of the thin film transistor 10 is connected to the data wiring 114.
  • the drain electrode 18 of the thin film transistor 10 is connected to the pixel electrode 104 through a contact hole 116, and a liquid crystal 108 is held between the pixel electrode 104 and the counter electrode 106.
  • the pixel electrode 104 constitutes a capacitor together with the grounded counter electrode 106.
  • polarizing plates 112a and 112b are provided on the substrate 12 side of the TFT 10 and the RGB color filter 110, respectively.
  • the thin film transistor 10 in FIG. 3 is a top gate type thin film transistor
  • the thin film transistor used in the liquid crystal display device of the present invention is not limited to the top gate type and may be a bottom gate type thin film transistor. Since the thin film transistor of the present invention has very high electron mobility, it is suitable for large screen, high definition and 3D applications in liquid crystal display devices. Further, since it is insensitive to visible light, it is also suitable for a transparent display driving element. In addition, since the TFT of the present invention has high mobility and light stability by annealing treatment at a low temperature, a resin substrate (plastic substrate) can be used as the substrate 12, and it has high definition, large area, and transparency. A flexible liquid crystal display device can be provided.
  • a resin substrate plastic substrate
  • FIG. 4 shows a schematic configuration diagram of electrical wiring of an active matrix organic EL display device which is an example of the electro-optical device of the present invention
  • FIG. 5 shows a schematic sectional view of a part thereof.
  • the simple matrix method has an advantage that it can be manufactured at low cost.
  • the number of scanning lines and the light emission time per scanning line are inversely proportional. Therefore, it is difficult to increase the definition and increase the screen size.
  • the active matrix method has a high manufacturing cost because a transistor and a capacitor are formed for each pixel.
  • it is suitable for high definition and large screen.
  • the TFT 10 having the top gate structure shown in FIG. 1A is provided on the substrate 12 having the passivation layer 202 as the driving TFT 10a and the switching TFT 10b.
  • An organic EL light emitting element 214 composed of an organic light emitting layer 212 sandwiched between the lower electrode 208 and the upper electrode 210 is provided on the TFTs 10 a and 10 b, and the upper surface is also protected by the passivation layer 216.
  • the organic EL display device 200 of the present embodiment includes a plurality of gate wirings 220 that are parallel to each other, and a data wiring 222 and a driving wiring 224 that are parallel to each other and intersect the gate wiring 220.
  • the gate wiring 220, the data wiring 222, and the drive wiring 224 are electrically insulated.
  • the gate electrode 22 of the switching TFT 10 b is connected to the gate wiring 220, and the source electrode 16 of the switching TFT 10 b is connected to the data wiring 222.
  • the drain electrode 18 of the switching TFT 10b is connected to the gate electrode 22 of the driving TFT 10, and the driving TFT 10a is kept on by using the capacitor 226.
  • the source electrode 16 of the driving TFT 10 a is connected to the driving wiring 224, and the drain electrode 18 is connected to the organic EL light emitting element 214.
  • the organic EL device of this embodiment shown in FIGS. 4 and 5 includes the top gate TFTs 10a and 10b.
  • the TFT used in the organic EL device which is the display device of the present invention has a top gate structure.
  • a TFT having a bottom gate structure may be used.
  • the TFT manufactured according to the present invention has high stability during light irradiation (threshold fluctuation is small), high mobility, and is suitable for manufacturing a large-screen organic EL display device.
  • a resin substrate plastic substrate
  • a flexible organic EL display device having a large area, uniform and stable can be provided.
  • the organic EL display device shown in FIG. 5 may be a top emission type using the upper electrode 210 as a transparent electrode, or a bottom emission type by using the lower electrode 208 and the TFTs 10a and 10b as transparent electrodes. Good.
  • FIG. 6 shows a schematic configuration diagram of an X-ray sensor which is an example of a sensor provided with the thin film transistor of the present invention, and FIG. Indicates.
  • the X-ray sensor 300 includes a plurality of gate lines 320 that are parallel to each other and data lines 322 that are parallel to each other and intersect the gate lines 320.
  • the gate wiring 320 and the data wiring 322 are electrically insulated.
  • the thin film transistor 10 of the present invention is provided in the vicinity of the intersection between the gate wiring 320 and the data wiring 322.
  • the gate electrode of the thin film transistor 10 is connected to the gate wiring 320, and the source electrode 16 of the thin film transistor 10 is connected to the data wiring 322.
  • the drain electrode 18 of the thin film transistor 10 is connected to the charge collecting electrode 302, and the charge collecting electrode 302 constitutes a capacitor 310 together with the grounded capacitor lower electrode 312.
  • the X-ray sensor 300 includes a thin film transistor 10 and a capacitor 310 formed on the substrate 12, a charge collection electrode 302 formed on the capacitor 310, an X-ray conversion layer 304, and an upper layer electrode 306. .
  • a passivation film 308 is provided on the thin film transistor 10.
  • the capacitor 310 has a structure in which an insulating film 316 is sandwiched between a capacitor lower electrode 312 and a capacitor upper electrode 314.
  • the capacitor upper electrode 314 is connected to one of the source electrode and the drain electrode of the thin film transistor 10 through a contact hole 318 provided in the insulating film 316.
  • the charge collection electrode 302 is provided on the capacitor upper electrode 314 in the capacitor 310 and is in contact with the capacitor upper electrode 314.
  • the X-ray conversion layer 304 is a layer made of amorphous selenium, and is provided so as to cover the thin film transistor 10 and the capacitor 310.
  • the upper electrode 306 is provided on the X-ray conversion layer 304 and is in contact with the X-ray conversion layer 304.
  • X-rays are irradiated from the upper part (upper electrode 306 side) in FIG.
  • the generated charges are accumulated in the capacitor 310 and read out by sequentially scanning the thin film transistor 10.
  • the X-ray sensor 300 of this embodiment includes the TFT 10 having high stability during light irradiation, an image with excellent uniformity can be obtained.
  • the thin film transistor 10 in FIG. 7 is a top gate type thin film transistor, but the thin film transistor used in the sensor of the present invention is not limited to the top gate type and may be a bottom gate type thin film transistor.
  • FIG. 8A is a plan view of a simplified TFT manufactured in Examples and Comparative Examples
  • FIG. 8B is a cross-sectional view taken along the line AA of the TFT shown in FIG. 8A.
  • a simple TFT 600 using the thermal oxide film 604 having a thickness of 100 nm as a gate insulating film and the p-type Si substrate 602 as a gate electrode was manufactured.
  • An In-rich IGZO film 606 was sputtered as an active layer on a p-type Si substrate 602 (1 inch square) with a thermal oxide film 604 under the following conditions.
  • a metal mask was used to form a 3 mm ⁇ 4 mm pattern film.
  • the film formation was performed by co-sputtering using an In 2 O 3 target, a Ga 2 O 3 target, and a ZnO target, and the composition ratio was adjusted by changing the power ratio applied to each target. .
  • Source / drain electrodes 608 and 610 each having a two-layer structure were formed on the In-rich IGZO film 606 by sputtering.
  • the source / drain electrodes 608 and 610 were formed by pattern film formation using a metal mask.
  • the size of the source / drain electrodes 608 and 610 in plan view was 1 mm square, and the distance between the electrodes was 0.2 mm.
  • post-annealing treatment was performed in an electric furnace.
  • the post-annealing atmosphere was set to Ar 160 sccm and O 2 40 sccm.
  • the temperature was raised to 300 ° C. at 10 ° C./min, held at 300 ° C. for 60 minutes, and then cooled to room temperature by furnace cooling.
  • Example 2 to 4 Comparative Examples 1 to 6> In the same manner as in Example 1, simple TFTs with different metal composition ratios and film thicknesses of In-rich active layers, presence / absence of electrode layers (Ga-rich IGZO layers), and metal composition ratios as shown in Table 1 below are produced. did.
  • V g -I d characteristics For simplified TFT obtained above, using a semiconductor parameter analyzer 4156C (manufactured by Agilent Technologies) was measured for transistor characteristics at the time and non-irradiated monochromatic light irradiation (V g -I d characteristics). Measurement of V g -I d characteristics, the drain voltage (V d) + 10V to be fixed and the gate voltage (V g) is changed within the range of -30 V ⁇ + 30 V, the drain current at gate voltages (V g) The measurement was performed by measuring (I d ).
  • Figure 9 shows a, V g -I d characteristics of the monochrome light irradiation in Example 1.
  • V th in an environment where no light irradiation was performed was 3.9V.
  • Comparative Example 4 In which an IGZO electrode layer composition having an In-rich composition was used, normally-off driving was not realized.
  • Comparative Examples 5 and 6 using an active layer of In: Ga: Zn 1: 1: 1, which is a general composition, showed normally-off and high photostability, but the mobility was low.
  • Examples 5 to 10 Comparative Examples 7 and 8> A TFT was fabricated in the same manner as in Example 1 by changing the composition ratio of the active layer and the composition ratio of the IGZO electrode layer in contact with the active layer as shown in Table 3. Regarding the fabricated TFT, the TFT characteristics were measured in the same manner as in Example 1, and the results are shown in Table 4.
  • the composition of the active layer is such that either IGZO Ga or Zn such as IGO or IZO is 0, or Sn-containing ITO, ITZO (In-Sn— Even with a composition such as Zn—O), the composition ratio of In is 50% or more and the film thickness is 25 nm or less, so that the mobility is 20 cm 2 / Vs or more and high light stability. Furthermore, it can be seen that normally-off driving can be realized by providing a Ga-rich IGZO electrode layer in contact with the active layer in each stacked structure of the source / drain electrodes.

Landscapes

  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
PCT/JP2013/063067 2012-05-10 2013-05-09 Transistor à couches minces, dispositif d'affichage, capteur d'image et capteur radiographique Ceased WO2013168774A1 (fr)

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JP2016027626A (ja) * 2014-06-23 2016-02-18 株式会社半導体エネルギー研究所 半導体装置及び表示装置
WO2017150275A1 (fr) * 2016-02-29 2017-09-08 シャープ株式会社 Transistor à couches minces
CN111370445A (zh) * 2018-12-26 2020-07-03 陕西坤同半导体科技有限公司 柔性显示屏及其制作方法和应用

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KR101829970B1 (ko) * 2016-02-01 2018-02-19 연세대학교 산학협력단 산화물 박막 트랜지스터 및 그 제조 방법
KR102805156B1 (ko) * 2019-06-19 2025-05-09 삼성디스플레이 주식회사 표시 장치

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JP2010093240A (ja) * 2008-09-12 2010-04-22 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2011103402A (ja) * 2009-11-11 2011-05-26 Idemitsu Kosan Co Ltd 酸化物半導体を用いた、高移動度の電界効果型トランジスタ

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JP2016027626A (ja) * 2014-06-23 2016-02-18 株式会社半導体エネルギー研究所 半導体装置及び表示装置
WO2017150275A1 (fr) * 2016-02-29 2017-09-08 シャープ株式会社 Transistor à couches minces
CN111370445A (zh) * 2018-12-26 2020-07-03 陕西坤同半导体科技有限公司 柔性显示屏及其制作方法和应用

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