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WO2009110715A3 - Boucle à verrouillage de phase pourvue d'un élément de réajustement permettant d'éliminer la gigue dans un diviseur de fréquence variable - Google Patents

Boucle à verrouillage de phase pourvue d'un élément de réajustement permettant d'éliminer la gigue dans un diviseur de fréquence variable Download PDF

Info

Publication number
WO2009110715A3
WO2009110715A3 PCT/KR2009/001015 KR2009001015W WO2009110715A3 WO 2009110715 A3 WO2009110715 A3 WO 2009110715A3 KR 2009001015 W KR2009001015 W KR 2009001015W WO 2009110715 A3 WO2009110715 A3 WO 2009110715A3
Authority
WO
WIPO (PCT)
Prior art keywords
jitter
frequency divider
programmable frequency
removal
locked loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2009/001015
Other languages
English (en)
Korean (ko)
Other versions
WO2009110715A2 (fr
Inventor
이정철
황명운
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FCI Inc Korea
Original Assignee
FCI Inc Korea
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FCI Inc Korea filed Critical FCI Inc Korea
Publication of WO2009110715A2 publication Critical patent/WO2009110715A2/fr
Publication of WO2009110715A3 publication Critical patent/WO2009110715A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

L'invention concerne une boucle à verrouillage de phase (PLL), plus particulièrement une PLL pourvue d'un élément de réajustement permettant d'éliminer la gigue dans un diviseur de fréquence programmable. L'invention permet d'éliminer les bruits dans la bande causés par la gigue de sortie d'un diviseur de fréquence programmable qui divise la phase d'un signal de sortie d'un oscillateur commandé en tension, par réajustement d'une sortie du diviseur et transmission à un détecteur de phase pour comparaison.
PCT/KR2009/001015 2008-03-03 2009-03-03 Boucle à verrouillage de phase pourvue d'un élément de réajustement permettant d'éliminer la gigue dans un diviseur de fréquence variable Ceased WO2009110715A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020080019538A KR100980499B1 (ko) 2008-03-03 2008-03-03 프로그램 분주기의 지터 제거용 리타이밍부가 구비된위상고정루프
KR10-2008-0019538 2008-03-03

Publications (2)

Publication Number Publication Date
WO2009110715A2 WO2009110715A2 (fr) 2009-09-11
WO2009110715A3 true WO2009110715A3 (fr) 2009-12-30

Family

ID=41056458

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/001015 Ceased WO2009110715A2 (fr) 2008-03-03 2009-03-03 Boucle à verrouillage de phase pourvue d'un élément de réajustement permettant d'éliminer la gigue dans un diviseur de fréquence variable

Country Status (2)

Country Link
KR (1) KR100980499B1 (fr)
WO (1) WO2009110715A2 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101488177B1 (ko) * 2013-05-20 2015-02-04 부산대학교 산학협력단 분수 분주형 위상 고정 루프, 이를 포함하는 시스템 온 칩 및 전자 장치
KR101601023B1 (ko) * 2014-05-13 2016-03-09 고려대학교 산학협력단 디지털 보상기를 갖는 스프레드 스펙트럼 클록 생성기 및 이를 이용한 클록생성 방법
KR102788469B1 (ko) * 2022-11-16 2025-03-31 주식회사 로젠시스 위상 고정 루프를 이용한 초고속 데이터 송수신용 트랜스미터
US12224757B2 (en) * 2023-03-06 2025-02-11 Ess Technology, Inc. Method and apparatus for reducing jitter in a phase-locked loop

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100194624B1 (ko) * 1996-12-02 1999-06-15 이계철 데이타 리타이밍 회로
KR100261294B1 (ko) * 1997-10-14 2000-07-01 이계철 고속 비복귀 기록 데이터 복구장치
JP2003318872A (ja) * 2002-04-19 2003-11-07 Nef:Kk リタイミング回路
KR100682279B1 (ko) * 2005-07-14 2007-02-15 (주)에프씨아이 주파수 합성기의 적응 주파수 조정장치

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100194624B1 (ko) * 1996-12-02 1999-06-15 이계철 데이타 리타이밍 회로
KR100261294B1 (ko) * 1997-10-14 2000-07-01 이계철 고속 비복귀 기록 데이터 복구장치
JP2003318872A (ja) * 2002-04-19 2003-11-07 Nef:Kk リタイミング回路
KR100682279B1 (ko) * 2005-07-14 2007-02-15 (주)에프씨아이 주파수 합성기의 적응 주파수 조정장치

Also Published As

Publication number Publication date
KR20090094540A (ko) 2009-09-08
WO2009110715A2 (fr) 2009-09-11
KR100980499B1 (ko) 2010-09-07

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