WO1990001860A1 - Printed circuit board - Google Patents
Printed circuit board Download PDFInfo
- Publication number
- WO1990001860A1 WO1990001860A1 PCT/EP1989/000725 EP8900725W WO9001860A1 WO 1990001860 A1 WO1990001860 A1 WO 1990001860A1 EP 8900725 W EP8900725 W EP 8900725W WO 9001860 A1 WO9001860 A1 WO 9001860A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit board
- printed circuit
- epoxy resin
- particles
- glass fiber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0373—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0242—Shape of an individual particle
- H05K2201/0251—Non-conductive microfibers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
- H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
Definitions
- the invention relates to a printed circuit board with the features of the preamble of claim 1.
- the circuit boards are drilled and contacted.
- the printed circuit boards so produced, as z. .. B_. . _ used for military purposes or for space purposes are subjected to a qualification process, among other things, a temperature change test that has to be carried out many times and reaches temperatures from -65 ° C to +125 ° C.
- the plated-through holes in a chemical process detach from the epoxy resin compound in the area of the cut-out holes and interruptions are formed which render the circuit board unusable.
- the object of the invention is to create a printed circuit board with little additional effort, in which this disadvantage is avoided.
- the surfaces of the prepregs impregnated with epoxy resin are additionally coated with non-conductive, dimensionally stable particles, for example in the circuit board according to the invention, before or during the layering.
- the glass fiber particles adhering to the prepreg are deposited together with the epoxy resin emerging from the prepregs into the spaces between the prepregs and the metal inner layers and in the cut-out holes in the metal inner layers.
- a rough hole surface is created by the glass fiber particles embedded in the epoxy resin compound, which now protrude into the hole as small glass fiber brushes. This rough bore surface ensures a better connection of the copper through-hole to be made after drilling to the epoxy resin compound and thus prevents the through-hole from tearing.
- the prepregs 1 impregnated with epoxy resin are coated with non-conductive, dimensionally stable particles, e.g. with glass fiber particles, sprinkled on one or both sides or briefly with one or both surfaces in one with non-conductive dimensionally stable particles, e.g. B. filled with fiberglass filled containers.
- the printed circuit board is heated under high pressure and the epoxy resin with the glass fiber particles 3 adhering to the surface of the prepregs 1 is pressed between prepregs 1 and inner metal layer 2 and into the cut-out holes 6 of the inner metal layers 2. After the polymerization process, the printed circuit board is provided with the bores required for the through contacts 5 and cleaned.
- the glass fiber particles 3 embedded in the epoxy resin compound now protrude from the epoxy resin compound of the bore.
- the bores are provided with Cu vias 5, which are firmly connected to the ends of the glass fiber particles 3, as a further enlargement of part of a wall of the via 5 shown in FIG. 1, bottom left, clearly shows .
- the voltages that occur in a subsequent temperature change test between the through-hole 5 and the epoxy resin compound that surrounds it are absorbed by the ends of the glass fiber particles 3 firmly anchored in the through-holes 5, and thus the loosening of the through-hole from the epoxy resin compound and the cracking of the through-hole 5 itself are avoided .
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Leiterplatte Circuit board
Die Erfindung betrifft eine Leiterplatte mit den Merkmalen des Oberbegriffs des Anspruchs 1.The invention relates to a printed circuit board with the features of the preamble of claim 1.
Es ist allgemein bekannt, daß bei der Fertigung von hochwertigen Leiterplatte insbesondere Multilayer-Leiterplatten, mit Epoxidharz getränkte Glasfasergewe einlagen, sogenannte Prepregs, metallene mit Freistellbohrungen versehene Metallinnenlagen und Kupferzwischenlagen in mehreren Schichten, je nach Anzah der für die entsprechende elektronische Schaltung die die Leiterplatte später aufnehmen soll, benötigten Verbindungen, übereinander gestapelt und in einem Polymerisationsvorgang miteinander verbunden werden.It is generally known that in the manufacture of high-quality printed circuit boards, in particular multilayer printed circuit boards, glass fiber fabrics soaked with epoxy resin, so-called prepregs, metal inner layers provided with cut-out holes and copper intermediate layers in several layers, depending on the number of times for the corresponding electronic circuit, the circuit board later required connections, stacked one above the other and connected in a polymerization process.
Weiter ist bekannt, daß bei dem Polymerisationsvorgang das Epoxidharz aus den Prepregs austritt und sich zwischen den Prepregs und den Metallinnenlagen sowie in den Freistellbohrungen der Metallinnenlagen ablagert.It is also known that during the polymerization process the epoxy resin emerges from the prepregs and is deposited between the prepregs and the metal inner layers and in the cut-out holes in the metal inner layers.
Nach dem Polymerisationsvorgang werden die Leiterplatten gebohrt und durch- kontaktiert. Die so hergestellten Leiterplatten, wie sie z...B_.._für militäris_che_Zwecke oder für Raumfahrtzwecke verwendet werden, werden in einem Qualifikations- verfahren unter anderem einem vielmals zu durchfahrenden Temperaturwechseltest unterzogen, bei dem Temperaturen von -65 °C bis +125 °C erreicht werden.After the polymerization process, the circuit boards are drilled and contacted. The printed circuit boards so produced, as z. .. B_. . _ used for military purposes or for space purposes are subjected to a qualification process, among other things, a temperature change test that has to be carried out many times and reaches temperatures from -65 ° C to +125 ° C.
Nach diesem Temperaturwechseltest zeigen sich oftmals Schwachstellen an den Durchkontaktierungen. Die- in einem chemischen Verfahren angebrachten Durch- kontaktierungen lösen sich im Bereich der Freistellbohrungen von der Epoxidharz verbindungsmasse und es bilden sich Unterbrechungen, die die Leiterplatte un¬ brauchbar machen.After this temperature change test, weak points often appear on the plated-through holes. The plated-through holes in a chemical process detach from the epoxy resin compound in the area of the cut-out holes and interruptions are formed which render the circuit board unusable.
Aufgabe der Erfindung ist es, mit wenigem zusätzlichen Aufwand eine Leiterplatt zu schaffen, bei der dieser Nachteil vermieden wird.The object of the invention is to create a printed circuit board with little additional effort, in which this disadvantage is avoided.
Die Lösung dieser Aufgabe wird durch das im ersten Patentanspruch angegebene Merkmal gelöst.This object is achieved by the feature specified in the first claim.
Weitere Verbesserungen werden durch die Unteransprüche erreicht.Further improvements are achieved through the subclaims.
Die Oberflächen der mit Epoxidharz getränkten Prepregs werden bei der erfin¬ dungsgemäßen Leiterplatte, vor oder während der Schichtung, zusätzlich mit nichtleitenden formfesten Partikeln, z. B. Glasfaserpartikeln, ein oder beidsei tig bestreut oder kurzzeitig mit einer oder beiden Oberflächen in einen mit Glasfaserpartikeln gefüllten Behälter gelegt.The surfaces of the prepregs impregnated with epoxy resin are additionally coated with non-conductive, dimensionally stable particles, for example in the circuit board according to the invention, before or during the layering. B. glass fiber particles, sprinkled on one or both sides or placed briefly with one or both surfaces in a container filled with glass fiber particles.
Die weitere Verarbeitung der so behandelten Prepregs mit den anderen zu einer Leiterplatte oder Multilayer-Leiterplatte gehörenden Teilen erfolgt in der bekannten Weise.The further processing of the prepregs treated in this way with the other parts belonging to a circuit board or multilayer circuit board is carried out in the known manner.
Die am Prepreg haftenden Glasfaserpartikel werden beim Polymerisationsvorgang zusammen mit dem aus den Prepregs austretenden Epoxidharz in die Freiräume zwischen den Prepregs und den Metallinnenlagen und in den Freistellbohrungen der Metallinnenlagen abgelagert. Bei dem nachfolgenden Bohren der Leiterplatte entsteht eine rauhe Bohrungsoberfläche durch die in die Epoxidharzverbindungs¬ masse eingelagerten Glasfaserpartikel, die nun als kleine Glasfaserpinsel in die Bohrung hineinragen. Diese rauhe Bohrungsoberfläche gewährleistet eine bessere Anbindung der nach dem Bohren vorzunehmenden Cu-Durchkontaktierung an die Epoxidharzverbindungs- masse und vermeidet damit das Reißen der Durchkontaktierung.During the polymerization process, the glass fiber particles adhering to the prepreg are deposited together with the epoxy resin emerging from the prepregs into the spaces between the prepregs and the metal inner layers and in the cut-out holes in the metal inner layers. During the subsequent drilling of the circuit board, a rough hole surface is created by the glass fiber particles embedded in the epoxy resin compound, which now protrude into the hole as small glass fiber brushes. This rough bore surface ensures a better connection of the copper through-hole to be made after drilling to the epoxy resin compound and thus prevents the through-hole from tearing.
Die Erfindung wird nachfolgend anhand des in der Zeichnung dargestellten Ausführungsbeispiels näher erläutert.The invention is explained in more detail below with reference to the embodiment shown in the drawing.
Die Fig. 1 zeigt in einem Ausführungsbeispiel eine Vergrößerung eines Aus¬ schnitts der Lagen einer Multilayer-Leiterplatte. Bei der Schichtung der Multilayer-Leiterplatte werden die einzelnen Lagen, z.B. in der in Fig. 1 gezeigten Weise, übereinander gestapelt. Vor dem Stapeln werden die Metallinne lagen 2 mit Freistellbohrungen 6 versehen. Die mit Epoxidharz getränkten Prepregs 1 werden vor oder während der Schichtung mit nichtleitenden formfeste Partikeln, z.B. mit Glasfaserpartikeln, ein- oder beidseitig bestreut oder kurzzeitig mit einer oder beiden Oberflächen in einen mit nichtleitenden formfesten Partikeln, z. B. mit Glasfaserpartikeln, gefüllten Behälter gelegt.1 shows in an exemplary embodiment an enlargement of a section of the layers of a multilayer printed circuit board. When layering the multilayer circuit board, the individual layers, e.g. stacked one above the other in the manner shown in FIG. Before stacking, the metal inner layers 2 were provided with cut-out holes 6. The prepregs 1 impregnated with epoxy resin are coated with non-conductive, dimensionally stable particles, e.g. with glass fiber particles, sprinkled on one or both sides or briefly with one or both surfaces in one with non-conductive dimensionally stable particles, e.g. B. filled with fiberglass filled containers.
Bei dem nach der Schichtung folgenden Polymerisationsvorgang wird die Leiter¬ platte bei starkem Druck erhitzt und das Epoxidharz mit den an der Oberfläche der Prepregs 1 haftenden Glasfaserpartikeln 3 zwischen Prepregs 1 und Metallin¬ nenlage 2 und in die Freistellbohrungen 6 der Metallinnenlagen 2 gepreßt. Nach dem Polymerisationsvorgang wird die Leiterplatte mit den für die Durchkontak- tierungen 5 benötigten Bohrungen versehen und gereinigt.In the polymerization process following the stratification, the printed circuit board is heated under high pressure and the epoxy resin with the glass fiber particles 3 adhering to the surface of the prepregs 1 is pressed between prepregs 1 and inner metal layer 2 and into the cut-out holes 6 of the inner metal layers 2. After the polymerization process, the printed circuit board is provided with the bores required for the through contacts 5 and cleaned.
Die in die Epoxidharzverbindungsmasse eingelagerten Glasfaserpartikel 3 stehen nun aus der Epoxidharzverbindungsmasse der Bohrung hervor. In einem nachfolgenden chemischen Vorgang werden die Bohrungen mit Cu-Durch- kontaktierungen 5 versehen, die mit den Enden der Glasfaserpartikel 3 fest verbunden sind, wie eine in Fig. 1, links unten, gezeigte weitere Vergrößerung eines Teils einer Wand der Durchkontaktierung 5 deutlich zeigt. Die bei einem jetzt folgenden Temperaturwechseltest auftretenden Spannungen zwischen der Durchkontaktierung 5 und der sie umgebenden Epoxidharzverbindungs- masse werden durch die fest in den Durchkontaktierungen 5 verankerten Enden der Glasfaserpartikel 3 aufgenommen und damit ein Lösen der Durchkontaktierung von der Epoxidharzverbindungsmasse und ein Reißen der Durchkontaktierung 5 selbst vermieden. The glass fiber particles 3 embedded in the epoxy resin compound now protrude from the epoxy resin compound of the bore. In a subsequent chemical process, the bores are provided with Cu vias 5, which are firmly connected to the ends of the glass fiber particles 3, as a further enlargement of part of a wall of the via 5 shown in FIG. 1, bottom left, clearly shows . The voltages that occur in a subsequent temperature change test between the through-hole 5 and the epoxy resin compound that surrounds it are absorbed by the ends of the glass fiber particles 3 firmly anchored in the through-holes 5, and thus the loosening of the through-hole from the epoxy resin compound and the cracking of the through-hole 5 itself are avoided .
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19883826522 DE3826522A1 (en) | 1988-08-04 | 1988-08-04 | PCB |
| DEP3826522.2 | 1988-08-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO1990001860A1 true WO1990001860A1 (en) | 1990-02-22 |
Family
ID=6360241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP1989/000725 Ceased WO1990001860A1 (en) | 1988-08-04 | 1989-06-27 | Printed circuit board |
Country Status (2)
| Country | Link |
|---|---|
| DE (1) | DE3826522A1 (en) |
| WO (1) | WO1990001860A1 (en) |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2694139A1 (en) * | 1992-07-21 | 1994-01-28 | Aerospatiale | Interconnection substrate for electronic components e.g. leadless chip carrier mounted integrated circuits - has double layer composite material core with printed circuit formed on each substrate exterior surface, with cores connected by electrically isolating fibres and has metallised through holes insulated from cores |
| WO1999031944A1 (en) * | 1997-12-17 | 1999-06-24 | Laude Lucien Diego | Electric circuit supports |
| WO1999044957A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Glass fiber strands coated with thermally conductive inorganic particles and products including the same |
| WO1999044955A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| WO1999044959A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Glass fiber-reinforced laminates, electronic circuit boards and methods for assembling a fabric |
| WO1999044958A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Methods for inhibiting abrasive wear of glass fiber strands |
| WO1999044956A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Inorganic particle-coated glass fiber strands and products including the same |
| WO2000021900A1 (en) * | 1998-10-13 | 2000-04-20 | Ppg Industries Ohio, Inc. | Glass fiber-reinforced prepregs, laminates, electronic circuit boards and methods for assembling a fabric |
| WO2001012701A1 (en) * | 1999-07-30 | 2001-02-22 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| US6949289B1 (en) | 1998-03-03 | 2005-09-27 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| US7354641B2 (en) | 2004-10-12 | 2008-04-08 | Ppg Industries Ohio, Inc. | Resin compatible yarn binder and uses thereof |
| JP2014220310A (en) * | 2013-05-06 | 2014-11-20 | 株式会社デンソー | Multilayer substrate and electronic apparatus using the same, and process of manufacturing multilayer substrate |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1993023979A1 (en) * | 1992-05-15 | 1993-11-25 | Marina Adolfovna Sokolinskaya | Substrate for printed circuit boards and method of making it |
| CN114316519B (en) * | 2022-01-05 | 2024-03-22 | 泰山玻璃纤维有限公司 | Carbon-glass mixed pulling plate and preparation method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1048864A (en) * | 1962-11-19 | 1966-11-23 | Curran Ind Inc | Method of forming printed circuit structures |
| DE2739494A1 (en) * | 1977-08-30 | 1979-03-08 | Kolbe & Co Hans | METHOD OF MANUFACTURING ELECTRIC CIRCUIT BOARDS AND BASE MATERIAL FOR SUCH |
| EP0186831A2 (en) * | 1985-01-02 | 1986-07-09 | International Business Machines Corporation | Method of improving the adhesion between a photosensitive adhesive and a dielectric substrate |
| EP0244699A2 (en) * | 1986-04-25 | 1987-11-11 | Mitsubishi Plastics Industries Limited | Substrate for a printed circuit board |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3393117A (en) * | 1964-02-13 | 1968-07-16 | Cincinnati Milling Machine Co | Copper-clad glass reinforced thermoset resin panel |
| US3617613A (en) * | 1968-10-17 | 1971-11-02 | Spaulding Fibre Co | Punchable printed circuit board base |
| JPS49348B1 (en) * | 1970-12-25 | 1974-01-07 | ||
| DE3567140D1 (en) * | 1985-08-14 | 1989-02-02 | Toray Industries | Laminate board containing uniformly distributed filler particles and method for producing the same |
-
1988
- 1988-08-04 DE DE19883826522 patent/DE3826522A1/en not_active Withdrawn
-
1989
- 1989-06-27 WO PCT/EP1989/000725 patent/WO1990001860A1/en not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1048864A (en) * | 1962-11-19 | 1966-11-23 | Curran Ind Inc | Method of forming printed circuit structures |
| DE2739494A1 (en) * | 1977-08-30 | 1979-03-08 | Kolbe & Co Hans | METHOD OF MANUFACTURING ELECTRIC CIRCUIT BOARDS AND BASE MATERIAL FOR SUCH |
| EP0186831A2 (en) * | 1985-01-02 | 1986-07-09 | International Business Machines Corporation | Method of improving the adhesion between a photosensitive adhesive and a dielectric substrate |
| EP0244699A2 (en) * | 1986-04-25 | 1987-11-11 | Mitsubishi Plastics Industries Limited | Substrate for a printed circuit board |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2694139A1 (en) * | 1992-07-21 | 1994-01-28 | Aerospatiale | Interconnection substrate for electronic components e.g. leadless chip carrier mounted integrated circuits - has double layer composite material core with printed circuit formed on each substrate exterior surface, with cores connected by electrically isolating fibres and has metallised through holes insulated from cores |
| WO1999031944A1 (en) * | 1997-12-17 | 1999-06-24 | Laude Lucien Diego | Electric circuit supports |
| BE1011624A4 (en) * | 1997-12-17 | 1999-11-09 | Laude Lucien Diego | Media electrical circuit. |
| WO1999044956A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Inorganic particle-coated glass fiber strands and products including the same |
| WO1999044959A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Glass fiber-reinforced laminates, electronic circuit boards and methods for assembling a fabric |
| WO1999044958A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Methods for inhibiting abrasive wear of glass fiber strands |
| WO1999044955A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| WO1999044957A1 (en) * | 1998-03-03 | 1999-09-10 | Ppg Industries Ohio, Inc. | Glass fiber strands coated with thermally conductive inorganic particles and products including the same |
| US6949289B1 (en) | 1998-03-03 | 2005-09-27 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| WO2000021900A1 (en) * | 1998-10-13 | 2000-04-20 | Ppg Industries Ohio, Inc. | Glass fiber-reinforced prepregs, laminates, electronic circuit boards and methods for assembling a fabric |
| WO2001012701A1 (en) * | 1999-07-30 | 2001-02-22 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| WO2001012702A1 (en) * | 1999-07-30 | 2001-02-22 | Ppg Industries Ohio, Inc. | Impregnated glass fiber strands and products including the same |
| US7354641B2 (en) | 2004-10-12 | 2008-04-08 | Ppg Industries Ohio, Inc. | Resin compatible yarn binder and uses thereof |
| JP2014220310A (en) * | 2013-05-06 | 2014-11-20 | 株式会社デンソー | Multilayer substrate and electronic apparatus using the same, and process of manufacturing multilayer substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| DE3826522A1 (en) | 1990-02-08 |
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