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JP4359847B2 - 低k誘電体フィルムのための乾燥処理 - Google Patents

低k誘電体フィルムのための乾燥処理 Download PDF

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Publication number
JP4359847B2
JP4359847B2 JP2004555813A JP2004555813A JP4359847B2 JP 4359847 B2 JP4359847 B2 JP 4359847B2 JP 2004555813 A JP2004555813 A JP 2004555813A JP 2004555813 A JP2004555813 A JP 2004555813A JP 4359847 B2 JP4359847 B2 JP 4359847B2
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JP
Japan
Prior art keywords
low
substrate
dielectric layer
processing chamber
exposing
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2004555813A
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English (en)
Japanese (ja)
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JP2006508535A (ja
Inventor
ワルドフライド カルロ
ハン クインギュアン
ハロック ジョン
ベリー イヴァン
マルゴリス アリ
エスコルシア オーランド
Original Assignee
アクセリス テクノロジーズ インコーポレーテッド
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31058After-treatment of organic layers
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/42Stripping or agents therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Solid Materials (AREA)
JP2004555813A 2002-11-26 2003-11-26 低k誘電体フィルムのための乾燥処理 Expired - Fee Related JP4359847B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/065,861 US20040099283A1 (en) 2002-11-26 2002-11-26 Drying process for low-k dielectric films
PCT/US2003/038019 WO2004049073A2 (fr) 2002-11-26 2003-11-26 Procede de sechage pour pellicules dielectriques a faible constante k

Publications (2)

Publication Number Publication Date
JP2006508535A JP2006508535A (ja) 2006-03-09
JP4359847B2 true JP4359847B2 (ja) 2009-11-11

Family

ID=32323603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004555813A Expired - Fee Related JP4359847B2 (ja) 2002-11-26 2003-11-26 低k誘電体フィルムのための乾燥処理

Country Status (3)

Country Link
US (1) US20040099283A1 (fr)
JP (1) JP4359847B2 (fr)
WO (1) WO2004049073A2 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6936551B2 (en) * 2002-05-08 2005-08-30 Applied Materials Inc. Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
US7060330B2 (en) * 2002-05-08 2006-06-13 Applied Materials, Inc. Method for forming ultra low k films using electron beam
US6913992B2 (en) 2003-03-07 2005-07-05 Applied Materials, Inc. Method of modifying interlayer adhesion
US20050250346A1 (en) 2004-05-06 2005-11-10 Applied Materials, Inc. Process and apparatus for post deposition treatment of low k dielectric materials
US20060249175A1 (en) * 2005-05-09 2006-11-09 Applied Materials, Inc. High efficiency UV curing system
US20060251827A1 (en) * 2005-05-09 2006-11-09 Applied Materials, Inc. Tandem uv chamber for curing dielectric materials
US8039049B2 (en) * 2005-09-30 2011-10-18 Tokyo Electron Limited Treatment of low dielectric constant films using a batch processing system
US7501355B2 (en) * 2006-06-29 2009-03-10 Applied Materials, Inc. Decreasing the etch rate of silicon nitride by carbon addition
US7598183B2 (en) * 2006-09-20 2009-10-06 Applied Materials, Inc. Bi-layer capping of low-K dielectric films
US7964039B2 (en) * 2007-09-07 2011-06-21 Imec Cleaning of plasma chamber walls using noble gas cleaning step
US10811370B2 (en) 2018-04-24 2020-10-20 Cree, Inc. Packaged electronic circuits having moisture protection encapsulation and methods of forming same

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US4341592A (en) * 1975-08-04 1982-07-27 Texas Instruments Incorporated Method for removing photoresist layer from substrate by ozone treatment
US4885047A (en) * 1986-08-11 1989-12-05 Fusion Systems Corporation Apparatus for photoresist stripping
DE69012727T2 (de) * 1989-03-31 1995-02-09 Canon Kk Verfahren zur herstellung eines polykristallinen filmes mittels chemischen dampfniederschlags.
CA2032763C (fr) * 1990-12-20 2001-08-21 Mitel Corporation Prevention de la contamination du circuit de transit par desorption induite obtenue par decharge luminescente
US5290383A (en) * 1991-03-24 1994-03-01 Tokyo Electron Limited Plasma-process system with improved end-point detecting scheme
US5498308A (en) * 1994-02-25 1996-03-12 Fusion Systems Corp. Plasma asher with microwave trap
US5705232A (en) * 1994-09-20 1998-01-06 Texas Instruments Incorporated In-situ coat, bake and cure of dielectric material processing system for semiconductor manufacturing
US6203582B1 (en) * 1996-07-15 2001-03-20 Semitool, Inc. Modular semiconductor workpiece processing tool
KR100219562B1 (ko) * 1996-10-28 1999-09-01 윤종용 반도체장치의 다층 배선 형성방법
US6053687A (en) * 1997-09-05 2000-04-25 Applied Materials, Inc. Cost effective modular-linear wafer processing
US20010051082A1 (en) * 1997-09-05 2001-12-13 Kirkpatrick Thomas I. Cost effective modular-linear wafer processing
US5866945A (en) * 1997-10-16 1999-02-02 Advanced Micro Devices Borderless vias with HSQ gap filled patterned metal layers
JPH11279773A (ja) * 1998-03-27 1999-10-12 Tomoo Ueno 成膜方法
US6021672A (en) * 1998-09-18 2000-02-08 Windbond Electronics Corp. Simultaneous in-situ optical sensing of pressure and etch rate in plasma etch chamber
US6328809B1 (en) * 1998-10-09 2001-12-11 Scp Global Technologies, Inc. Vapor drying system and method
US6610150B1 (en) * 1999-04-02 2003-08-26 Asml Us, Inc. Semiconductor wafer processing system with vertically-stacked process chambers and single-axis dual-wafer transfer system
US6452275B1 (en) * 1999-06-09 2002-09-17 Alliedsignal Inc. Fabrication of integrated circuits with borderless vias
US6235453B1 (en) * 1999-07-07 2001-05-22 Advanced Micro Devices, Inc. Low-k photoresist removal process
US6281135B1 (en) * 1999-08-05 2001-08-28 Axcelis Technologies, Inc. Oxygen free plasma stripping process
US6495825B1 (en) * 1999-12-22 2002-12-17 International Business Machines Corporation Apparatus for photo exposure of materials with subsequent capturing of volatiles for analysis
US20010048867A1 (en) * 2000-03-29 2001-12-06 Lebar Technology, Inc. Method and apparatus for processing semiconductor wafers
US6319809B1 (en) * 2000-07-12 2001-11-20 Taiwan Semiconductor Manfacturing Company Method to reduce via poison in low-k Cu dual damascene by UV-treatment
JP4043705B2 (ja) * 2000-09-27 2008-02-06 株式会社東芝 半導体装置の製造方法、ウェハ処理装置、及びウェハ保管箱
US6720247B2 (en) * 2000-12-14 2004-04-13 Texas Instruments Incorporated Pre-pattern surface modification for low-k dielectrics using A H2 plasma
US6303524B1 (en) * 2001-02-20 2001-10-16 Mattson Thermal Products Inc. High temperature short time curing of low dielectric constant materials using rapid thermal processing techniques
US6503840B2 (en) * 2001-05-02 2003-01-07 Lsi Logic Corporation Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoning
JP3739325B2 (ja) * 2001-09-20 2006-01-25 株式会社日立製作所 有機絶縁膜のエッチング方法

Also Published As

Publication number Publication date
WO2004049073A2 (fr) 2004-06-10
WO2004049073A3 (fr) 2004-11-18
JP2006508535A (ja) 2006-03-09
US20040099283A1 (en) 2004-05-27

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