| Metal–oxide RRAM HSP Wong, HY Lee, S Yu, YS Chen, Y Wu, PS Chen, B Lee, FT Chen, ... Proceedings of the IEEE 100 (6), 1951-1970, 2012 | 3378 | 2012 |
| Synaptic electronics: materials, devices and applications D Kuzum, S Yu, HSP Wong Nanotechnology 24 (38), 382001, 2013 | 1438 | 2013 |
| Optoelectronic resistive random access memory for neuromorphic vision sensors F Zhou, Z Zhou, J Chen, TH Choy, J Wang, N Zhang, Z Lin, S Yu, J Kang, ... Nature nanotechnology 14 (8), 776-782, 2019 | 1259 | 2019 |
| Neuro-inspired computing with emerging nonvolatile memorys S Yu Proceedings of the IEEE 106 (2), 260-285, 2018 | 1232 | 2018 |
| An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation S Yu, Y Wu, R Jeyasingh, D Kuzum, HSP Wong Electron Devices, IEEE Transactions on, 1-9, 2011 | 944 | 2011 |
| Neuro-inspired computing chips W Zhang, B Gao, J Tang, P Yao, S Yu, MF Chang, HJ Yoo, H Qian, H Wu Nature electronics 3 (7), 371-382, 2020 | 909 | 2020 |
| SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations S Choi, SH Tan, Z Li, Y Kim, C Choi, PY Chen, H Yeon, S Yu, J Kim Nature materials 17 (4), 335-340, 2018 | 740 | 2018 |
| Ferroelectric FET analog synapse for acceleration of deep neural network training M Jerry, PY Chen, J Zhang, P Sharma, K Ni, S Yu, S Datta 2017 IEEE international electron devices meeting (IEDM), 6.2. 1-6.2. 4, 2017 | 694 | 2017 |
| Emerging memory technologies: Recent trends and prospects S Yu, PY Chen IEEE Solid-State Circuits Magazine 8 (2), 43-56, 2016 | 668 | 2016 |
| NeuroSim: A circuit-level macro model for benchmarking neuro-inspired architectures in online learning PY Chen, X Peng, S Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 661 | 2018 |
| A low energy oxide‐based electronic synaptic device for neuromorphic visual systems with tolerance to device variation S Yu, B Gao, Z Fang, H Yu, J Kang, HSP Wong Advanced Materials 25 (12), 1774-1779, 2013 | 595 | 2013 |
| Conduction mechanism of TiN/HfOx/Pt resistive switching memory: A trap-assisted-tunneling model S Yu, X Guan, HSP Wong Applied Physics Letters 99, 063507, 2011 | 525 | 2011 |
| NeuroSim+: An integrated device-to-algorithm framework for benchmarking synaptic devices and array architectures PY Chen, X Peng, S Yu 2017 IEEE International Electron Devices Meeting (IEDM), 6.1. 1-6.1. 4, 2017 | 459 | 2017 |
| Overcoming the challenges of crossbar resistive memory architectures C Xu, D Niu, N Muralimanohar, R Balasubramonian, T Zhang, S Yu, Y Xie 2015 IEEE 21st international symposium on high performance computer …, 2015 | 453 | 2015 |
| Power-efficient combinatorial optimization using intrinsic noise in memristor Hopfield neural networks F Cai, S Kumar, T Van Vaerenbergh, X Sheng, R Liu, C Li, Z Liu, M Foltin, ... Nature Electronics 3 (7), 409-418, 2020 | 447 | 2020 |
| DNN+ NeuroSim: An end-to-end benchmarking framework for compute-in-memory accelerators with versatile device technologies X Peng, S Huang, Y Luo, X Sun, S Yu 2019 IEEE international electron devices meeting (IEDM), 32.5. 1-32.5. 4, 2019 | 429 | 2019 |
| HfOx based vertical resistive random access memory for cost-effective 3D cross-point architecture without cell selector HY Chen, S Yu, B Gao, P Huang, J Kang, HSP Wong 2012 international electron devices meeting, 20.7. 1-20.7. 4, 2012 | 414 | 2012 |
| On the switching parameter variation of metal-oxide RRAM—Part I: Physical modeling and simulation methodology X Guan, S Yu, HSP Wong IEEE Transactions on electron devices 59 (4), 1172-1182, 2012 | 413 | 2012 |
| HfOx-Based Vertical Resistive Switching Random Access Memory Suitable for Bit-Cost-Effective Three-Dimensional Cross-Point Architecture S Yu, HY Chen, B Gao, J Kang, HSP Wong ACS nano 7 (3), 2320-2325, 2013 | 410 | 2013 |
| Compute-in-memory chips for deep learning: Recent trends and prospects S Yu, H Jiang, S Huang, X Peng, A Lu IEEE circuits and systems magazine 21 (3), 31-56, 2021 | 401 | 2021 |
H.-S. Philip WongProfessor of Electrical Engineering, Stanford UniversityVerified email at stanford.edu
