| Loihi: A neuromorphic manycore processor with on-chip learning M Davies, N Srinivasa, TH Lin, G Chinya, Y Cao, SH Choday, G Dimou, ... Ieee Micro 38 (1), 82-99, 2018 | 4764 | 2018 |
| Providing hardware support for shared virtual memory between local and remote physical memory GN Chinya, H Wang, DA Mathaikutty, JD Collins, E Schuchman, JP Held, ... US Patent 8,719,547, 2014 | 139 | 2014 |
| SystemCXML: An Exstensible SystemC Front end Using XML. D Berner, JP Talpin, HD Patel, D Mathaikutty, SK Shukla FDL, 405-409, 2005 | 66 | 2005 |
| Metamodeling: An emerging representation paradigm for system-level design A Sangiovanni-Vincentelli, SK Shukla, J Sztipanovits, G Yang, ... IEEE Design & Test of Computers 26 (3), 54-69, 2009 | 51 | 2009 |
| Securing shared interconnect for virtual machine TW Loh, GN Chinya, SJ Robinson, R Fortas, H Wang, H Reinig, ... US Patent App. 14/227,166, 2015 | 49 | 2015 |
| Power estimation methodology for a high-level synthesis framework S Ahuja, DA Mathaikutty, G Singh, J Stetzer, SK Shukla, A Dingankar 2009 10th International Symposium on Quality Electronic Design, 541-546, 2009 | 47 | 2009 |
| Model-driven test generation for system level validation DA Mathaikutty, S Ahuja, A Dingankar, S Shukla 2007 IEEE International High Level Design Validation and Test Workshop, 83-90, 2007 | 38 | 2007 |
| An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS P Meinerzhagen, C Tokunaga, A Malavasi, V Vaidya, A Mendon, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 38-40, 2018 | 37 | 2018 |
| Dataflow architectures for GALS S Suhaib, D Mathaikutty, S Shukla Electronic Notes in Theoretical Computer Science 200 (1), 33-50, 2008 | 36 | 2008 |
| XFM: An incremental methodology for developing formal models SM Suhaib, DA Mathaikutty, SK Shukla, D Berner ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (4 …, 2005 | 31 | 2005 |
| An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V} _ {\text {MIN}} $ Optimization PA Meinerzhagen, C Tokunaga, A Malavasi, V Vaidya, A Mendon, ... IEEE Journal of Solid-State Circuits 54 (1), 144-157, 2018 | 28 | 2018 |
| Validating families of latency insensitive protocols S Suhaib, D Mathaikutty, D Berner, S Shukla IEEE Transactions on Computers 55 (11), 1391-1401, 2006 | 28 | 2006 |
| Ewd: A metamodeling driven customizable multi-moc system modeling framework D Mathaikutty, H Patel, S Shukla, A Jantsch ACM Transactions on Design Automation of Electronic Systems (TODAES) 12 (3 …, 2008 | 23 | 2008 |
| A Functional Programming Framework of Heterogeneous Model of Computation for System Design. D Mathaikutty, HD Patel, SK Shukla FDL, 586-598, 2004 | 22 | 2004 |
| FlexNPU: A dataflow-aware flexible deep learning accelerator for energy-efficient edge devices A Raha, DA Mathaikutty, S Kundu, SK Ghosh Frontiers in High Performance Computing 3, 1570210, 2025 | 21 | 2025 |
| Design fault directed test generation for microprocessor validation DA Mathaikutty, SK Shukla, SV Kodakara, D Lilja, A Dingankar 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 20 | 2007 |
| Providing hardware support for shared virtual memory between local and remote physical memory GN Chinya, H Wang, DA Mathaikutty, JD Collins, E Schuchman, JP Held, ... US Patent 9,003,164, 2015 | 19 | 2015 |
| Design considerations for edge neural network accelerators: An industry perspective A Raha, SK Kim, DA Mathaikutty, G Venkataramanan, D Mohapatra, ... 2021 34th International Conference on VLSI Design and 2021 20th …, 2021 | 18 | 2021 |
| SoC design space exploration through automated IP selection from systemC IP library D Mathaikutty, S Shukla 2006 IEEE International SoC Conference, 109-110, 2006 | 16 | 2006 |
| CARH: Service-oriented architecture for validating system-level designs HD Patel, DA Mathaikutty, D Berner, SK Shukla IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 16 | 2006 |
sandeep shuklaIIT KanpurVerified email at iitk.ac.in
