| Two-Dimensional MoSi2N4: An Excellent 2-D Semiconductor for Field-Effect Transistors K Nandan, B Ghosh, A Agarwal, S Bhowmick, YS Chauhan IEEE Transactions on Electron Devices 69 (1), 406-413, 2021 | 56 | 2021 |
| Two-dimensional semiconductors based Field-Effect Transistors: Review of Major Milestones and Challenges K Nandan, A Agarwal, S Bhowmick, YS Chauhan Frontiers in Electronics 4, 1277927, 2023 | 24 | 2023 |
| Designing Power-Efficient Transistors Using Narrow-Bandwidth Materials from the (; ; ) Monolayer Series K Nandan, S Bhowmick, YS Chauhan, A Agarwal Physical Review Applied 19 (6), 064058, 2023 | 19 | 2023 |
| Di-Metal Chalcogenides: A New Family of Promising 2-D Semiconductors for High-Performance Transistors A Naseer, K Nandan, A Agarwal, S Bhowmick, YS Chauhan IEEE Transactions on Electron Devices 70 (5), 2445-2452, 2023 | 13 | 2023 |
| Performance Investigation of p-FETs Based on Highly Air-Stable Monolayer Pentagonal PdSe2 K Nandan, A Agarwal, S Bhowmick, YS Chauhan IEEE Transactions on Electron Devices 68 (12), 6551-6557, 2021 | 13 | 2021 |
| Compact Modeling of Multi-Layered MoS2 FETs Including Negative Capacitance Effect K Nandan, C Yadav, P Rastogi, A Toral-Lopez, A Marin-Sanchez, ... IEEE Journal of the Electron Devices Society 8, 1177-1183, 2020 | 11 | 2020 |
| Performance Evaluation of Monolayer ZrS3 Transistors for Next-Generation Computing A Naseer, K Nandan, A Agarwal, S Bhowmick, YS Chauhan IEEE Transactions on Electron Devices 70 (10), 5435-5442, 2023 | 10 | 2023 |
| Field-Effect Transistors Based on Two-dimensional Materials K Nandan, A Naseer, YS Chauhan Transactions of the Indian National Academy of Engineering 8 (1), 1-14, 2023 | 8 | 2023 |
| Symmetric BSIM-SOI—Part II: A compact model for partially depleted SOI MOSFETs CK Dabhi, D Nandi, K Nandan, D Rajasekharan, G Pahwa, N Karumuri, ... IEEE Transactions on Electron Devices 71 (4), 2293-2300, 2024 | 7 | 2024 |
| Compact Modeling of Surface Potential and Drain Current in Multi-layered MoS2 FETs K Nandan, C Yadav, P Rastogi, A Toral-Lopez, A Marin-Sanchez, ... 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-4, 2020 | 5 | 2020 |
| A Physics-Based Compact Model for Silicon Cold-Source Transistors A Kar, K Nandan, YS Chauhan IEEE Transactions on Electron Devices 70 (4), 1580-1588, 2023 | 4 | 2023 |
| Transistors based on Novel 2-D Monolayer Semiconductors Bi2O2Se, InSe, and MoSi2N4 for Enhanced Logic Density Scaling K Nandan, A Naseer, A Agarwal, S Bhowmick, YS Chauhan arXiv preprint arXiv:2412.01016, 2024 | 3 | 2024 |
| Designing power efficient transistors using narrow bandwidth materials from the MA2Z4 monolayer series K Nandan, S Bhowmick, YS Chauhan, A Agarwal arXiv preprint arXiv:2211.09540, 2022 | 2 | 2022 |
| Extremely Scaled Silicon Nanosheet Transistors K Nandan, A Agarwal, S Bhowmick, YS Chauhan 2022 IEEE International Conference on Emerging Electronics (ICEE), 1-5, 2022 | 1 | 2022 |
| PdSe2 based field-effect transistors K Nandan, A Agarwal, S Bhowmick, YS Chauhan arXiv preprint arXiv:2201.03493, 2022 | 1 | 2022 |
| Compact Modeling and Cryogenic Benchmarking of 14 nm FinFETsWith Advanced HZH Gate Stack K Nandan, Y Cao 2025 Device Research Conference (DRC), 1-2, 2025 | | 2025 |
| Harnessing Gaussianlike transfer characteristics for ultraefficient computation in monolayer two-dimensional devices A Naseer, K Nandan, M Rafiq, A Agarwal, S Bhowmick, YS Chauhan Physical Review Applied 23 (4), 044026, 2025 | | 2025 |
| Transistors Based on Novel 2-D Monolayer Semiconductors BiOSe, InSe, and MoSiN for Enhanced Logic Density Scaling K Nandan, A Naseer, A Agarwal, S Bhowmick, YS Chauhan IEEE Transactions on Electron Devices, 2024 | | 2024 |
| Hybrid FETs Based on Monolayer ZrI2 for Energy-Efficient Logic Applications A Naseer, K Nandan, A Agarwal, S Bhowmick, YS Chauhan 2024 Device Research Conference (DRC), 1-2, 2024 | | 2024 |
| Emerging Low-Dimensional Materials and Devices for Continued CMOS Scaling K Nandan IIT Kanpur, Kanpur, 208016, India, Source: https://www.researchgate.net …, 2023 | | 2023 |
Yogesh S. ChauhanFellow IEEE & INAE, Professor-IIT KanpurVerified email at iitk.ac.in
