WO2025204381A1 - Stage and method for manufacturing stage - Google Patents
Stage and method for manufacturing stageInfo
- Publication number
- WO2025204381A1 WO2025204381A1 PCT/JP2025/006203 JP2025006203W WO2025204381A1 WO 2025204381 A1 WO2025204381 A1 WO 2025204381A1 JP 2025006203 W JP2025006203 W JP 2025006203W WO 2025204381 A1 WO2025204381 A1 WO 2025204381A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- insulating film
- stage
- substrate
- manufacturing
- holes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/50—Substrate holders
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
Definitions
- One embodiment of the present invention relates to a stage for placing a substrate. Also, another embodiment of the present invention relates to a method for manufacturing a stage for placing a substrate.
- Semiconductor devices utilize the semiconducting properties of silicon and other materials. In recent years, semiconductor devices have been incorporated into almost all electronic devices, enabling control according to the functions of each electronic device. Semiconductor devices are constructed by stacking insulating and conductive films on a substrate such as a silicon wafer (Si-wafer) and then patterning these films or the substrate. For example, these films are stacked on the substrate using semiconductor manufacturing equipment capable of methods such as evaporation, sputtering, chemical vapor deposition (CVD), or chemical reactions on the substrate, and these films or substrates are patterned using semiconductor manufacturing equipment capable of photolithography processes.
- the photolithography process involves forming a resist on the films to be patterned, exposing the resist, forming a resist mask by development, partially removing the films by etching, and then removing the resist mask.
- Patent Documents 1 and 2 describe stages including a substrate on whose surface an insulating film is formed using ceramic thermal spraying, with the aim of preventing a decline in the insulating properties of the stage.
- insulating films formed on the surface of a substrate using conventional methods are prone to cracking.
- the dielectric strength of the insulating film decreases, and the corrosion resistance, dielectric strength, and insulating properties of the stage also decrease.
- One known measure to prevent a decrease in the dielectric strength of the insulating film is to form a protective film on the insulating film to protect the insulating film.
- the adhesion strength between the protective film and the insulating film is low, the protective film will peel off from the insulating film, making it difficult to prevent a decrease in the dielectric strength of the insulating film. If there are problems with the dielectric strength of the insulating film, the corrosion resistance, dielectric strength, and insulating properties of the stage, or the adhesion between the protective film and the insulating film, the long-term reliability of the stage will decrease.
- One of the objectives of embodiments of the present invention is to provide a stage that can prevent a decrease in long-term reliability.
- Another objective of embodiments of the present invention is to provide a method for manufacturing a stage that can prevent a decrease in long-term reliability.
- a stage for placing a substrate includes a base material having a first surface and a second surface opposite the first surface; a third surface, a fourth surface in contact with the first surface and opposite the third surface, and a first insulating film disposed on the base material, the first insulating film including a plurality of holes formed on the third surface; a fifth surface, a sixth surface in contact with the third surface and opposite the fifth surface, and a second insulating film disposed on the first insulating film, the second insulating film including penetration portions in contact with the sidewalls of the plurality of holes and penetrating into the plurality of holes.
- a method for manufacturing a stage for supporting a substrate includes using a base material having a first surface and a second surface opposite the first surface; forming a first insulating film on the first surface, the first insulating film including a third surface, a fourth surface opposite the third surface, and a plurality of holes provided on the third surface side; and forming a second insulating film in contact with the third surface and sidewalls of the plurality of holes and including penetration portions that penetrate into the plurality of holes.
- a stage capable of suppressing a decrease in long-term reliability is provided. Furthermore, according to one embodiment of the present invention, a method for manufacturing a stage capable of suppressing a decrease in long-term reliability is provided.
- FIG. 1 is a perspective view showing a configuration of a stage according to a first embodiment of the present invention.
- FIG. 1 is a plan view showing a configuration of a stage according to a first embodiment of the present invention.
- 3 is a schematic diagram showing a cross section of the stage shown in FIG. 2 taken along line A1-A2.
- FIG. 1 is a schematic diagram showing a cross section of a conventional stage.
- 3 is a flowchart showing a method for manufacturing a stage according to the first embodiment of the present invention.
- 3A to 3C are schematic views for explaining a method of manufacturing a stage according to the first embodiment of the present invention.
- FIG. 10 is a schematic diagram showing a cross section of a semiconductor manufacturing apparatus including a stage according to a second embodiment of the present invention.
- the first insulating film 120 includes a first surface 122 and a second surface 124 opposite the first surface 122.
- the first insulating film 120 is provided so as to cover and be in contact with the substrate 110.
- the second surface 124 of the first insulating film 120 is in contact with the first surface 112 of the substrate 110.
- the first insulating film 120 is also provided so as to cover and be in contact with the inner walls of the hole 102 and the inner walls of the groove portion 104.
- the first insulating film 120 is provided so as to cover and be in contact with the side surfaces of the substrate 110.
- the first insulating film 120 in the stage 100 shown in FIG. 2 is provided on the first surface 112 of the substrate 110, but the first insulating film 120 may also be provided so as to cover and be in contact with the second surface 114.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Plasma & Fusion (AREA)
- General Chemical & Material Sciences (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
本発明の実施形態の一つは基板を載置するためのステージに関する。また、本発明の実施形態の一つは基板を載置するためのステージの作製方法に関する。 One embodiment of the present invention relates to a stage for placing a substrate. Also, another embodiment of the present invention relates to a method for manufacturing a stage for placing a substrate.
半導体デバイスはシリコンなどが有する半導体特性を利用したデバイスである。近年、半導体デバイスは、ほぼ全ての電子機器に搭載されており、各電子機器の機能に応じた制御を可能にする。半導体デバイスは、絶縁膜及び導電膜をシリコンウェーハ(Si-wafer)などの基板上に積層し、これらの膜又は基板をパターニングすることによって、構成される。例えば、これらの膜が、蒸着法、スパッタリング法、化学気相成長(CVD)法又は基板の化学反応などを可能とする半導体製造装置を用いて基板上に積層され、これらの膜又は基板がフォトリソグラフィープロセスを可能とする半導体製造装置を用いてパターニングされる。フォトリソグラフィープロセスは、パターニングに供されるこれらの膜の上へのレジストの形成、レジストの露光、現像によるレジストマスクの形成、エッチングによるこれらの膜の部分的除去、及びレジストマスクの除去を含む。 Semiconductor devices utilize the semiconducting properties of silicon and other materials. In recent years, semiconductor devices have been incorporated into almost all electronic devices, enabling control according to the functions of each electronic device. Semiconductor devices are constructed by stacking insulating and conductive films on a substrate such as a silicon wafer (Si-wafer) and then patterning these films or the substrate. For example, these films are stacked on the substrate using semiconductor manufacturing equipment capable of methods such as evaporation, sputtering, chemical vapor deposition (CVD), or chemical reactions on the substrate, and these films or substrates are patterned using semiconductor manufacturing equipment capable of photolithography processes. The photolithography process involves forming a resist on the films to be patterned, exposing the resist, forming a resist mask by development, partially removing the films by etching, and then removing the resist mask.
半導体製造装置は、基板を設置するための載置台(以下、ステージとよぶ)を含む。上述した膜の特性は、膜を成膜する条件、膜をエッチングする条件などによって大きく左右される。例えば、当該条件は、半導体製造装置に供給されるガス(反応ガス)、ステージに印加する電圧などである。よって、例えば、ステージ及びステージに含まれる部材は、ガス(反応ガス)による腐食が抑制されること(耐食性が高いこと)、印加電圧による劣化が抑制されること(耐電圧及び絶縁性が高いこと)が求められる。なお、例えば、ステージに含まれる部材は、冷却板、静電チャック、ヒータなどを含む。 Semiconductor manufacturing equipment includes a mounting table (hereafter referred to as the stage) on which a substrate is placed. The characteristics of the above-mentioned film are greatly influenced by the conditions for forming the film and the conditions for etching the film. For example, these conditions include the gas (reactive gas) supplied to the semiconductor manufacturing equipment and the voltage applied to the stage. Therefore, for example, the stage and the components included in the stage are required to be resistant to corrosion by the gas (reactive gas) (high corrosion resistance) and to be resistant to deterioration due to the applied voltage (high voltage resistance and insulation). Note that, for example, components included in the stage include a cooling plate, electrostatic chuck, heater, etc.
ステージに含まれる基材表面に絶縁膜を形成する方法として、溶射法(例えば、セラミック溶射)、陽極酸化法などが知られている。ステージの絶縁性の低下の抑制を目的の一つとして、絶縁膜が当該セラミック溶射を用いて表面に形成された基材を含むステージが特許文献1及び特許文献2に記載されている。 Known methods for forming an insulating film on the surface of a substrate included in a stage include thermal spraying (e.g., ceramic thermal spraying) and anodic oxidation. Patent Documents 1 and 2 describe stages including a substrate on whose surface an insulating film is formed using ceramic thermal spraying, with the aim of preventing a decline in the insulating properties of the stage.
一方で、従来の方法によって基材表面に形成された絶縁膜はクラックを含みやすい。例えば、絶縁膜がクラックを含む場合には、絶縁膜の耐電圧が低下し、ステージの耐食性、耐電圧及び絶縁性も低下する。絶縁膜の耐電圧の低下を抑制するための対策の1つとして、当該絶縁膜を保護するための保護膜を絶縁膜上に形成する技術が知られている。しかしながら、保護膜と絶縁膜との密着強度が低い場合には、保護膜が絶縁膜から剥がれるため、絶縁膜の耐電圧の低下の抑制が困難である。絶縁膜の耐電圧、ステージの耐食性、耐電圧及び絶縁性、又は、保護膜と絶縁膜との密着性に問題がある場合には、ステージの長期的な信頼性が低下する。 On the other hand, insulating films formed on the surface of a substrate using conventional methods are prone to cracking. For example, if the insulating film contains cracks, the dielectric strength of the insulating film decreases, and the corrosion resistance, dielectric strength, and insulating properties of the stage also decrease. One known measure to prevent a decrease in the dielectric strength of the insulating film is to form a protective film on the insulating film to protect the insulating film. However, if the adhesion strength between the protective film and the insulating film is low, the protective film will peel off from the insulating film, making it difficult to prevent a decrease in the dielectric strength of the insulating film. If there are problems with the dielectric strength of the insulating film, the corrosion resistance, dielectric strength, and insulating properties of the stage, or the adhesion between the protective film and the insulating film, the long-term reliability of the stage will decrease.
本発明の実施形態の課題の一つは、長期的な信頼性の低下を抑制可能なステージを提供することにある。また、本発明の実施形態の課題の一つは、長期的な信頼性の低下を抑制可能なステージの作製方法を提供することにある。 One of the objectives of embodiments of the present invention is to provide a stage that can prevent a decrease in long-term reliability. Another objective of embodiments of the present invention is to provide a method for manufacturing a stage that can prevent a decrease in long-term reliability.
本発明の実施形態の一つに係る基板を載置するためのステージは、第1の面及び前記第1の面と反対側の第2の面を有する基材と、第3の面、前記第1の面に接し前記第3の面と反対側の第4の面、及び、前記第3の面側に設けられた複数の孔を含み、前記基材上に配置された第1の絶縁膜と、第5の面、前記第3の面に接し前記第5の面と反対側の第6の面、及び、前記複数の孔の側壁に接すると共に前記複数の孔に侵入した侵入部を含み、前記第1の絶縁膜に配置された第2の絶縁膜と、を含む。 In one embodiment of the present invention, a stage for placing a substrate includes a base material having a first surface and a second surface opposite the first surface; a third surface, a fourth surface in contact with the first surface and opposite the third surface, and a first insulating film disposed on the base material, the first insulating film including a plurality of holes formed on the third surface; a fifth surface, a sixth surface in contact with the third surface and opposite the fifth surface, and a second insulating film disposed on the first insulating film, the second insulating film including penetration portions in contact with the sidewalls of the plurality of holes and penetrating into the plurality of holes.
本発明の実施形態の一つに係る基板を載置するためのステージの作製方法は、第1の面及び前記第1の面と反対側の第2の面を有する基材を用いることと、前記第1の面に、第3の面、第3の面と反対側の第4の面、及び、前記第3の面側に設けられた複数の孔を含む第1の絶縁膜を形成することと、前記第3の面及び前記複数の孔の側壁に接すると共に、前記複数の孔に侵入した侵入部を含む第2の絶縁膜を形成することと、を含む。 A method for manufacturing a stage for supporting a substrate according to one embodiment of the present invention includes using a base material having a first surface and a second surface opposite the first surface; forming a first insulating film on the first surface, the first insulating film including a third surface, a fourth surface opposite the third surface, and a plurality of holes provided on the third surface side; and forming a second insulating film in contact with the third surface and sidewalls of the plurality of holes and including penetration portions that penetrate into the plurality of holes.
本発明の実施形態の一つによると、長期的な信頼性の低下を抑制可能なステージが提供される。また、本発明の実施形態の一つによると、長期的な信頼性の低下を抑制可能なステージの作製方法が提供される。 According to one embodiment of the present invention, a stage capable of suppressing a decrease in long-term reliability is provided. Furthermore, according to one embodiment of the present invention, a method for manufacturing a stage capable of suppressing a decrease in long-term reliability is provided.
以下に、本発明の実施形態の一つに係るステージ又はステージの作製方法を、図面を参照しつつ説明する。但し、本発明は、その要旨を逸脱しない範囲において様々な形態で実施することができ、以下に例示する実施形態の記載内容に限定して解釈されるものではない。 Below, a stage or a method for manufacturing a stage according to one embodiment of the present invention will be described with reference to the drawings. However, the present invention can be embodied in various forms without departing from the spirit of the invention, and should not be interpreted as being limited to the description of the embodiment exemplified below.
図面は、説明をより明確にするため、実際の態様に比べ、各部の幅、厚さ、形状等について模式的に表される場合があるが、あくまで一例であって、本発明の解釈を限定するものではない。また、本明細書と各図面において、既出の図面に関して説明したものと同様の機能を備えた要素には、同一の符号を付して、重複する説明を省略することがある。 In order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment, but this is merely an example and does not limit the interpretation of the present invention. Furthermore, in this specification and each drawing, elements with the same function as those explained in the previous drawings may be given the same reference numerals, and duplicate explanations may be omitted.
本明細書及び図面において、同一、あるいは類似する複数の構成を総じて表記する際には同一の符号を用い、これらを個別に表記する際には符号の後にハイフンと数字を付す。 In this specification and drawings, the same reference numeral is used to collectively refer to multiple identical or similar components, and a hyphen and number are added after the reference numeral when referring to them individually.
本明細書において、各構成に付記される「第1」、「第2」、又は「第3」などの文字は、各構成を区別するために用いられる便宜的な標識であり、特段の説明がない限り、それ以上の意味を有さない。 In this specification, the letters "first," "second," or "third" attached to each component are convenient labels used to distinguish between components and have no other meaning unless otherwise specified.
以下の説明において、説明の便宜上、「上」、「下」といった方向を示す語句を用いる場合がある。ステージに対して、重力の働く方向が「下」であり、その逆が「上」である。 In the following explanation, for the sake of convenience, terms indicating directions such as "up" and "down" may be used. "Down" refers to the direction in which gravity acts relative to the stage, and "up" refers to the opposite.
[1.第1実施形態]
図1~図6を参照して、本発明の第1実施形態に係るステージ100を説明する。
1. First embodiment
A stage 100 according to a first embodiment of the present invention will be described with reference to FIGS.
[1-1.ステージ100の概要]
図1~図3を参照して、ステージ100の概要を説明する。図1はステージ100の構成を示す斜視図である。図2はステージ100の構成を示す平面図である。図3はステージ100のA1-A2に沿って切断した断面を示す断面図である。
[1-1. Overview of Stage 100]
An overview of the stage 100 will be described with reference to Figures 1 to 3. Figure 1 is a perspective view showing the configuration of the stage 100. Figure 2 is a plan view showing the configuration of the stage 100. Figure 3 is a cross-sectional view showing a cross section of the stage 100 taken along the line A1-A2.
ステージ100は、円盤型の形状を有する。例えば、ステージ100は、12インチのシリコンウェハを載置可能な直径を有する。また、ステージ100は、基材110、第1の絶縁膜120、第2の絶縁膜130、基板(例えば、シリコンウェハ)を載置可能な上面(第1の面132)、底面(第2の面114)、孔102及び溝部104を含む。孔102及び溝部104の配置、数、及び形状は、半導体製造装置の仕様及び用途などに合わせて適宜変更されてよい。 The stage 100 has a disk-like shape. For example, the stage 100 has a diameter large enough to support a 12-inch silicon wafer. The stage 100 also includes a base material 110, a first insulating film 120, a second insulating film 130, a top surface (first surface 132) on which a substrate (e.g., a silicon wafer) can be placed, a bottom surface (second surface 114), holes 102, and grooves 104. The arrangement, number, and shape of the holes 102 and grooves 104 may be modified as appropriate to suit the specifications and applications of the semiconductor manufacturing equipment.
基材110は、第1の面112及び第1の面112と反対側の第2の面114を含む。なお、基材110は、複数の基材が接合されていてもよい。 The substrate 110 includes a first surface 112 and a second surface 114 opposite the first surface 112. The substrate 110 may also be made up of multiple substrates bonded together.
第1の絶縁膜120は、第1の面122及び第1の面122と反対側の第2の面124を含む。第1の絶縁膜120は基材110を覆うと共に接するように設けられる。第1の絶縁膜120の第2の面124が基材110の第1の面112に接する。また、第1の絶縁膜120は、孔102の内壁及び溝部104の内壁を覆うと共に接するように設けられる。図示は省略するが、第1の絶縁膜120は、基材110の側面を覆うと共に接するように設けられる。また、一例として、図2に示されるステージ100における第1の絶縁膜120は、基材110の第1の面112に設けられるが、第1の絶縁膜120は、第2の面114を覆うと共に接するように設けられてもよい。 The first insulating film 120 includes a first surface 122 and a second surface 124 opposite the first surface 122. The first insulating film 120 is provided so as to cover and be in contact with the substrate 110. The second surface 124 of the first insulating film 120 is in contact with the first surface 112 of the substrate 110. The first insulating film 120 is also provided so as to cover and be in contact with the inner walls of the hole 102 and the inner walls of the groove portion 104. Although not shown, the first insulating film 120 is provided so as to cover and be in contact with the side surfaces of the substrate 110. As an example, the first insulating film 120 in the stage 100 shown in FIG. 2 is provided on the first surface 112 of the substrate 110, but the first insulating film 120 may also be provided so as to cover and be in contact with the second surface 114.
第2の絶縁膜130は、第1の面132及び第1の面132と反対側の第2の面134を含む。第2の絶縁膜130は第1の絶縁膜120を覆うと共に接するように設けられる。第2の絶縁膜130の第2の面134が第1の絶縁膜120の第1の面122に接する。また、例えば、第2の絶縁膜130は、孔102の内壁及び溝部104の内壁に設けられた第1の絶縁膜120を覆うと共に接するように設けられる。なお、第2の絶縁膜130は、孔102の内壁に設けられた第1の絶縁膜120を覆わなくてもよい。 The second insulating film 130 includes a first surface 132 and a second surface 134 opposite the first surface 132. The second insulating film 130 is provided so as to cover and be in contact with the first insulating film 120. The second surface 134 of the second insulating film 130 is in contact with the first surface 122 of the first insulating film 120. Also, for example, the second insulating film 130 is provided so as to cover and be in contact with the first insulating film 120 provided on the inner wall of the hole 102 and the inner wall of the groove portion 104. Note that the second insulating film 130 does not have to cover the first insulating film 120 provided on the inner wall of the hole 102.
溝部104は、媒体が環流するための流路であってよい。例えば、媒体は、ステージ100に載置された基板の温度を制御するために用いられる。例えば、媒体は、水、イソプロパノール、エチレングリコールなどのアルコール、シリコーンオイルなどの液体である。また、例えば、ヘリウム(He)などのような熱伝導率の良いガスであってもよい。媒体は、ステージ100を冷却する場合に用いられてよく、ステージ100を加熱する場合に用いられてもよい。例えば、溝部104は、複数の基材が接合された接合基材の内部に含まれていてよい。 The groove 104 may be a flow path for circulating a medium. For example, the medium is used to control the temperature of a substrate placed on the stage 100. For example, the medium is a liquid such as water, alcohol such as isopropanol or ethylene glycol, or silicone oil. It may also be a gas with good thermal conductivity such as helium (He). The medium may be used to cool the stage 100 or to heat the stage 100. For example, the groove 104 may be included inside a bonded substrate in which multiple substrates are bonded.
また、図示は省略されるが、例えば、複数の基材が接合された接合基材の内部に空間が含まれていてよく、ステージ100は、当該空間に、前記媒体を環流させるように構成されてもよい。また、例えば、熱源が当該空間に配置されてもよい。熱源は、媒体と同様に、ステージ100に載置された基板の温度を制御するために用いられる。例えば、熱源はシースヒータである。シースヒータは通電することで発熱する機能を有する。 Furthermore, although not shown in the figures, for example, a space may be included inside a bonded substrate formed by bonding multiple substrates, and the stage 100 may be configured to circulate the medium through this space. Also, for example, a heat source may be disposed in this space. The heat source, like the medium, is used to control the temperature of the substrate placed on the stage 100. For example, the heat source is a sheathed heater. A sheathed heater has the function of generating heat when electricity is passed through it.
孔102は、ステージ100に載置された基板を持ち上げるためのリフトピン用の孔である。 Holes 102 are for lift pins used to lift the substrate placed on stage 100.
基材110に用いられる材料は、金属、セラミックスなどである。また、基材110に用いられる材料はガラスであってもよい。例えば、金属は、アルミニウム(Al)、チタン(Ti)、ステンレスなどの合金である。基材110に用いられる材料は、一例として、アルミニウムである。 The material used for the substrate 110 is metal, ceramic, or the like. The material used for the substrate 110 may also be glass. For example, the metal is an alloy such as aluminum (Al), titanium (Ti), or stainless steel. One example of the material used for the substrate 110 is aluminum.
第1の絶縁膜120に用いられる材料は、所望の絶縁性を満たすことが可能な材料であってよく、所望の耐電圧特性を満たすことが可能な材料であってよく、所望の耐食性を満たすことが可能な材料であってよい。例えば、第1の絶縁膜120に用いられる材料は無機絶縁材料である。例えば、無機絶縁材料は金属酸化物であり、具体的には、アルカリ土類金属、希土類金属、アルミニウム、タンタル(Ta)、チタン、クロム(Cr)、ジルコニウム(Zr)、イットリウム(Y)、ケイ素(Si)、およびニオブ(Nb)のうち少なくとも1種類以上の元素を含む酸化物、又は、これらの複合酸化物などである。第1の絶縁膜120に用いられる材料は、一例として、酸化アルミニウム(Al2O3)である。 The material used for the first insulating film 120 may be a material capable of satisfying the desired insulating properties, the desired withstand voltage characteristics, or the desired corrosion resistance. For example, the material used for the first insulating film 120 is an inorganic insulating material. For example, the inorganic insulating material is a metal oxide, specifically, an oxide containing at least one element selected from alkaline earth metals, rare earth metals, aluminum, tantalum (Ta), titanium, chromium (Cr), zirconium (Zr), yttrium (Y), silicon (Si), and niobium (Nb), or a composite oxide thereof. For example, the material used for the first insulating film 120 is aluminum oxide (Al 2 O 3 ).
第2の絶縁膜130に用いられる材料は、第1の絶縁膜120との密着性に優れた材料である。また、第2の絶縁膜130に用いられる材料は、所望の絶縁性を満たすことが可能な材料であってよく、所望の耐電圧特性を満たすことが可能な材料であってよく、所望の耐食性を満たすことが可能な材料であってよい。例えば、ステージ100の第2の絶縁膜130に用いられる材料は樹脂材料である。例えば、樹脂材料は、ポリイミド樹脂、ポリエーテルイミド樹脂、ポリアミドイミド樹脂、ポリテトラフルオロエチレン樹脂、ポリエーテルエーテルケトン樹脂、ポリフェニレンサルファイド樹脂などである。第2の絶縁膜130に用いられる材料は、一例として、ポリベンゾイミダゾール(PBI)を含む。 The material used for the second insulating film 130 is a material that has excellent adhesion to the first insulating film 120. Furthermore, the material used for the second insulating film 130 may be a material that can satisfy the desired insulating properties, may be a material that can satisfy the desired voltage resistance characteristics, or may be a material that can satisfy the desired corrosion resistance. For example, the material used for the second insulating film 130 of the stage 100 is a resin material. Examples of resin materials include polyimide resin, polyetherimide resin, polyamideimide resin, polytetrafluoroethylene resin, polyether ether ketone resin, and polyphenylene sulfide resin. An example of a material used for the second insulating film 130 is polybenzimidazole (PBI).
[1-2.ステージ100の断面の一例]
図3及び図4を参照して、ステージ100の断面の構成を説明する。図4は従来技術のステージの断面を示す模式図である。図1~図3と同一、又は類似する構成については、必要に応じて説明する。
[1-2. Example of a cross section of the stage 100]
The cross-sectional structure of the stage 100 will be described with reference to Figures 3 and 4. Figure 4 is a schematic diagram showing the cross section of a conventional stage. Structures that are the same as or similar to those in Figures 1 to 3 will be described as necessary.
「1-1」で説明したとおり、第1の絶縁膜120は、酸化アルミニウムを含み、基材110を覆うと共に接するように設けられる。 As explained in "1-1," the first insulating film 120 contains aluminum oxide and is provided to cover and contact the substrate 110.
また、「1-1」で説明したとおり、第2の絶縁膜130は、ポリベンゾイミダゾールを含む。図3により詳細に示されるように、第2の絶縁膜130は、クラック(隙間)125c-1、125c-2及び125c-3を含まない第1の領域(例えば、領域200)の第1の面112上、並びに、第1の絶縁膜120にクラック125c-1、125c-2及び125c-3を含む領域(第2の領域)の第1の面112上に設けられる。例えば、クラックは、第1の面112に到達しないクラック125c-2及び125c-3、並びに、第1の面112に到達したクラック125c-1を含む。 Furthermore, as described in "1-1," the second insulating film 130 contains polybenzimidazole. As shown in more detail in FIG. 3, the second insulating film 130 is provided on the first surface 112 in a first region (e.g., region 200) that does not include cracks (gaps) 125c-1, 125c-2, and 125c-3, as well as on the first surface 112 in a region (second region) in the first insulating film 120 that includes cracks 125c-1, 125c-2, and 125c-3. For example, the cracks include cracks 125c-2 and 125c-3 that do not reach the first surface 112, and crack 125c-1 that reaches the first surface 112.
第1の絶縁膜120及び第2の絶縁膜130は、領域200では、積層される。基材110と第2の絶縁膜130との間には、隙間(空間)が設けられてよく、第2の絶縁膜130はクラック125c-1~125c-3内の全部又は一部に充填されてもよい。また、クラック125c-1~125c-3は、第1の絶縁膜120の間に設けられている。すなわち、第2の領域は第1の領域(領域200)に隣接し、第1の領域(領域200)は第2の領域の間に設けられているということができる。 The first insulating film 120 and the second insulating film 130 are stacked in region 200. A gap (space) may be provided between the substrate 110 and the second insulating film 130, and the second insulating film 130 may fill all or part of the cracks 125c-1 to 125c-3. Furthermore, the cracks 125c-1 to 125c-3 are provided between the first insulating films 120. In other words, the second region is adjacent to the first region (region 200), and the first region (region 200) is provided between the second regions.
また、図3の下部の領域200の拡大図に示されるように、第1の絶縁膜120は複数の孔140を含む。複数の孔140のそれぞれは、側壁(内壁)142及び底部144を含む。詳細は後述されるが、ステージ100の作製方法は、封孔処理をすることを含まなくてもよい。ここで、例えば、封孔処理は、孔を絶縁膜で埋めるのではなく、孔の側壁や底部を絶縁膜で被覆し、孔を含む絶縁膜の耐食性又は耐候性などを向上させる処理である。 Furthermore, as shown in the enlarged view of region 200 at the bottom of Figure 3, the first insulating film 120 includes a plurality of holes 140. Each of the plurality of holes 140 includes a sidewall (inner wall) 142 and a bottom 144. As will be described in detail later, the method for manufacturing the stage 100 does not necessarily include a sealing process. Here, for example, the sealing process is a process in which, rather than filling the holes with an insulating film, the sidewalls and bottoms of the holes are covered with an insulating film to improve the corrosion resistance or weather resistance of the insulating film containing the holes.
例えば、ステージ100の第2の絶縁膜130は、孔140に侵入し、側壁142に接すると共に底部144と離隔するように設けられる侵入部136を含む。侵入部136は、孔140の側壁142に沿って、孔140の少なくとも一部を埋める(充填する)。また、第2の絶縁膜130と底部144との離隔する距離は、複数の孔140のそれぞれで同一であってよく、複数の孔140のそれぞれで互いに異なってよく、複数の孔140の一部で同一であると共に他の一部で異なってもよい。また、第2の絶縁膜130と底部144との離隔する距離と同様に、複数の孔140の孔径は、複数の孔140のそれぞれで同一であってよく、複数の孔140のそれぞれで互いに異なってよく、複数の孔140の一部で同一であると共に他の一部で異なってもよい。なお、第2の絶縁膜130(侵入部136)と底部144とが離隔し、侵入部136と底部144との間に孔140の一部が残ることにより、断熱効果に伴う熱伝導の抑制が見込まれる場合がある。また、侵入部136は孔140に侵入すると共に孔140の側壁142及び底部144と接するように設けられてもよい。また、図示は省略しているが、侵入部136は孔140の側壁142及び底部144と離隔するように設けられてもよい。 For example, the second insulating film 130 of the stage 100 includes an intrusion portion 136 that intrudes into the hole 140, contacts the sidewall 142, and is spaced apart from the bottom 144. The intrusion portion 136 fills at least a portion of the hole 140 along the sidewall 142 of the hole 140. The distance separating the second insulating film 130 from the bottom 144 may be the same for each of the multiple holes 140, may be different for each of the multiple holes 140, or may be the same for some of the multiple holes 140 and different for others. Similar to the distance separating the second insulating film 130 from the bottom 144, the diameter of the multiple holes 140 may be the same for each of the multiple holes 140, may be different for each of the multiple holes 140, or may be the same for some of the holes 140 and different for others. Note that by separating the second insulating film 130 (intrusion portion 136) from the bottom 144 and leaving a portion of the hole 140 between the intrusion portion 136 and the bottom 144, it may be possible to expect suppression of heat conduction due to the insulating effect. Furthermore, the intrusion portion 136 may be provided so as to intrude into the hole 140 and to contact the sidewall 142 and bottom 144 of the hole 140. Furthermore, although not shown in the figures, the intrusion portion 136 may be provided so as to be separated from the sidewall 142 and bottom 144 of the hole 140.
例えば、クラック125c-1の孔径(第1の面132側の孔径)W1は0.1μm以上20μm以下であり、孔140の孔径W2は1nm以上50nm以下であってよく、10nm以上20nm以下であってもよい。また、例えば、基材110の厚さT1は約30mmであり、第1の絶縁膜120の厚さT2は5μm以上100μm以下であってよく、好ましくは、10μm以上50μm以下であってよく、第2の絶縁膜130の厚さT3は0.1μm以上100μm以下であってよく、好ましくは、1μm以上50μm以下であってよい。厚さT2及びT3は、一例として、30μm及び15μmである。孔径W2は孔径W1より非常に小さく、厚さT3は厚さT1より十分に薄く、厚さT3は厚さT2と同等以下であってよく、十分に薄くてもよい。 For example, the hole diameter W1 of crack 125c-1 (hole diameter on the first surface 132 side) is 0.1 μm or more and 20 μm or less, and the hole diameter W2 of hole 140 may be 1 nm or more and 50 nm or less, or even 10 nm or more and 20 nm or less. Also, for example, the thickness T1 of the substrate 110 may be approximately 30 mm, the thickness T2 of the first insulating film 120 may be 5 μm or more and 100 μm or less, or preferably 10 μm or more and 50 μm or less, and the thickness T3 of the second insulating film 130 may be 0.1 μm or more and 100 μm or less, or preferably 1 μm or more and 50 μm or less. Thicknesses T2 and T3 are, for example, 30 μm and 15 μm. Hole diameter W2 is much smaller than hole diameter W1, and thickness T3 is sufficiently thinner than thickness T1. Thickness T3 may be equal to or smaller than thickness T2, or may be sufficiently thinner.
ここで、図4を参照し、従来技術のステージを説明する。例えば、従来技術のステージの作製方法は封孔処理をすることを含む。例えば、封孔処理を施されたステージは、孔140の少なくとも一部が水和酸化物150で埋まる(充填される)のではなく、第1の絶縁膜120に含まれる孔140の側壁及び底部が水和酸化物150で被覆される。この状態で、第2の絶縁膜130が形成される。詳細は後述されるが、従来技術のステージの密着強度を測定すると、第2の絶縁膜130と第1の絶縁膜120との密着強度が低いため、第2の絶縁膜130が第1の絶縁膜120から剥がれ易い。 Here, referring to Figure 4, a conventional stage will be described. For example, the method of manufacturing a conventional stage includes a sealing process. For example, in a stage that has undergone the sealing process, the sidewalls and bottoms of the holes 140 in the first insulating film 120 are not at least partially filled with hydrated oxide 150, but rather the hydrated oxide 150 covers the sidewalls and bottoms of the holes 140 in the first insulating film 120. In this state, the second insulating film 130 is formed. Details will be described later, but when the adhesion strength of the conventional stage is measured, it is found that the adhesion strength between the second insulating film 130 and the first insulating film 120 is low, and therefore the second insulating film 130 easily peels off from the first insulating film 120.
一方、第2の絶縁膜130は、第1の絶縁膜120(第1の面122、及び、クラック125c-1~125c-3)と接しているため、第1の絶縁膜120(第1の面122、及び、クラック125c-1~125c-3)との密着性が高い。また、第2の絶縁膜130の侵入部136は、孔140に侵入すると共に、複数の孔140の側壁142の一部に沿って、複数の孔140の側壁142の一部と接しているため、第2の絶縁膜130と複数の孔140との密着性が高い。その結果、第1の絶縁膜120が第2の絶縁膜130によって覆われると共に露出しない。また、基材110が第1の絶縁膜及び第2の絶縁膜130によって覆われると共に、第1の絶縁膜と接していて、露出しないため、基材110の絶縁性はクラック(隙間)又は孔を含む基材より高い。 On the other hand, the second insulating film 130 is in contact with the first insulating film 120 (first surface 122 and cracks 125c-1 to 125c-3), and therefore has high adhesion to the first insulating film 120 (first surface 122 and cracks 125c-1 to 125c-3). Furthermore, the penetration portion 136 of the second insulating film 130 penetrates into the hole 140 and contacts a portion of the sidewall 142 of the multiple holes 140 along a portion of the sidewall 142 of the multiple holes 140, thereby providing high adhesion between the second insulating film 130 and the multiple holes 140. As a result, the first insulating film 120 is covered by the second insulating film 130 and is not exposed. Furthermore, because the base material 110 is covered by the first insulating film and the second insulating film 130 and is in contact with the first insulating film and is not exposed, the insulating properties of the base material 110 are higher than those of a base material that includes cracks (gaps) or holes.
また、第2の絶縁膜130が、第1の面122、クラック125c-1~125c-3、及び、複数の孔140を十分に覆うことができるため、第2の絶縁膜130は第1の絶縁膜120へのカバレージ性能が高い。よって、第1の絶縁膜120及び第2の絶縁膜130は、基材110へのカバレージ性能が高い。 Furthermore, because the second insulating film 130 can sufficiently cover the first surface 122, the cracks 125c-1 to 125c-3, and the multiple holes 140, the second insulating film 130 has high coverage performance for the first insulating film 120. Therefore, the first insulating film 120 and the second insulating film 130 have high coverage performance for the substrate 110.
ここで、測定結果の一例として、表1を参照して、第2の絶縁膜130の密着強度の測定結果を説明する。測定に用いたステージ100の試料では、封孔処理を行わずに、第1の絶縁膜120及び第2絶縁膜が、この順に、基材110の上に積層されている。なお、従来技術におけるステージの試料では、封孔処理を行い、第1の絶縁膜120及び第2絶縁膜が、この順に、基材110の上に積層されている。一例として、測定はロミュラス引張試験機を用いて行い、測定ポイントはステージ上の4ポイントである。なお、表1に示された密着強度は当該4ポイントの平均値である。表1に示されるように、ステージ100の密着強度は、従来技術の約3倍である。よって、ステージ100の密着強度は、従来技術におけるステージの密着強度より大きく、ステージ100の密着強度の向上が認められる。 Here, as an example of measurement results, the measurement results of the adhesion strength of the second insulating film 130 will be described with reference to Table 1. In the sample of the stage 100 used in the measurement, the first insulating film 120 and the second insulating film were stacked in this order on the substrate 110 without undergoing a sealing treatment. Note that in the sample of the stage according to the conventional technology, a sealing treatment was performed, and the first insulating film 120 and the second insulating film were stacked in this order on the substrate 110. As an example, the measurement was performed using a Romulus tensile tester, and measurement points were four points on the stage. Note that the adhesion strength shown in Table 1 is the average value of the four points. As shown in Table 1, the adhesion strength of the stage 100 is approximately three times that of the conventional technology. Therefore, the adhesion strength of the stage 100 is greater than that of stages according to the conventional technology, demonstrating an improvement in the adhesion strength of the stage 100.
以上説明したとおり、ステージ100は、基材110の上に、第1の絶縁膜120とポリベンゾイミダゾールを含む第2の絶縁膜130とがこの順に積層された構成を含む。その結果、ステージ100は基材110が第1の絶縁膜120と第2の絶縁膜との密着性に優れた積層膜によって覆われた構成を含む。よって、ステージ100の絶縁性、耐電圧特性又は耐食性が向上し、ステージ100は長期的な信頼性の低下を抑制可能である。 As explained above, the stage 100 has a configuration in which a first insulating film 120 and a second insulating film 130 containing polybenzimidazole are laminated in this order on a substrate 110. As a result, the stage 100 has a configuration in which the substrate 110 is covered with a laminated film that has excellent adhesion between the first insulating film 120 and the second insulating film. This improves the insulation properties, voltage resistance characteristics, and corrosion resistance of the stage 100, making it possible to prevent a decrease in the long-term reliability of the stage 100.
[1-3.ステージ100の作製]
図5及び図6を参照して、ステージ100の作製方法を説明する。図5はステージ100の作製方法を示すフローチャートである。図6はステージ100の作製方法を説明するための模式図である。図1~図4と同一、又は類似する構成については、必要に応じて説明する。
[1-3. Fabrication of stage 100]
A method for manufacturing the stage 100 will be described with reference to Figures 5 and 6. Figure 5 is a flowchart showing the method for manufacturing the stage 100. Figure 6 is a schematic diagram for explaining the method for manufacturing the stage 100. Configurations that are the same as or similar to those in Figures 1 to 4 will be described as necessary.
例えば、ステージ100の作製方法は、ステップ110(S110)、ステップ120(S120)及びステップ130(S130)を含む。「1-2」で説明したとおり、ステージ100の作製方法は封孔処理を行うことを含まない。 For example, the method for manufacturing stage 100 includes step 110 (S110), step 120 (S120), and step 130 (S130). As explained in "1-2," the method for manufacturing stage 100 does not include performing a sealing process.
ステージ100の作製が開始されると、第1の絶縁膜120が、用意された基材110上に形成される(ステップ110)。「1-1」で説明したとおり、基材110の材料は、一例として、アルミニウム基材である。例えば、陽極酸化法を用いて、アルミニウム基材を陽極酸化処理し、第1の絶縁膜120である酸化アルミニウムがアルミニウム基材上に形成される。例えば、耐電圧向上の観点から、第1の絶縁膜120の厚さT2は、5μm以上100μm以下であってよく、好ましくは10μm以上50μm以下であってよい。陽極酸化法は、他の処理方法より、安価に第1の絶縁膜120を基材110上に形成することができる。なお、第1の絶縁膜120を形成する方法は陽極酸化法に限定されない。例えば、第1の絶縁膜120を形成する方法は溶射法であってもよい。 When fabrication of the stage 100 begins, the first insulating film 120 is formed on the prepared substrate 110 (step 110). As explained in "1-1," the material of the substrate 110 is, for example, an aluminum substrate. For example, the aluminum substrate is anodized using an anodization method, and aluminum oxide, which is the first insulating film 120, is formed on the aluminum substrate. For example, from the perspective of improving voltage resistance, the thickness T2 of the first insulating film 120 may be 5 μm or more and 100 μm or less, and preferably 10 μm or more and 50 μm or less. The anodization method can form the first insulating film 120 on the substrate 110 more cheaply than other processing methods. Note that the method for forming the first insulating film 120 is not limited to anodization. For example, the method for forming the first insulating film 120 may be thermal spraying.
次に、ステップ120は、基材110を加熱すること(加熱処理)を含む。例えば、基材110を加熱するために、基材110を載置した載置台を(図示は省略)加熱してよい。 Next, step 120 involves heating the substrate 110 (heat treatment). For example, to heat the substrate 110, a mounting table (not shown) on which the substrate 110 is placed may be heated.
次に、第2の絶縁膜130が第1の絶縁膜120上に形成される(ステップ130(S130))。具体的には、吹付装置180が樹脂材料182を第1の絶縁膜120上に吹き付けること(吹付処理)によって、第2の絶縁膜130が、第1の絶縁膜120の第1の面122、クラック125c-1~125c-3、及び、複数の孔140に形成される。なお、吹付装置180は基材110の上方を第1の面122に沿って移動する。 Next, the second insulating film 130 is formed on the first insulating film 120 (step 130 (S130)). Specifically, the spraying device 180 sprays the resin material 182 onto the first insulating film 120 (spraying process), thereby forming the second insulating film 130 on the first surface 122 of the first insulating film 120, in the cracks 125c-1 to 125c-3, and in the multiple holes 140. The spraying device 180 moves above the substrate 110 along the first surface 122.
「1-1」で説明したとおり、一例として、第2の絶縁膜130はポリベンゾイミダゾールを含み、樹脂材料182はポリベンゾイミダゾールを含む。ポリベンゾイミダゾールは粘度を有する材料であり、第1の絶縁膜120に含まれる酸化アルミニウムは固体である。例えば、耐電圧性及び密着性の観点から、第2の絶縁膜130の厚さT3は、0.1μm以上100μm以下であってよく、好ましくは1μm以上50μmであってよい。 As explained in "1-1," as an example, the second insulating film 130 contains polybenzimidazole, and the resin material 182 contains polybenzimidazole. Polybenzimidazole is a viscous material, and the aluminum oxide contained in the first insulating film 120 is solid. For example, from the standpoint of voltage resistance and adhesion, the thickness T3 of the second insulating film 130 may be 0.1 μm or more and 100 μm or less, and preferably 1 μm or more and 50 μm or less.
例えば、ステップ130は、吹付装置180が、溶剤に溶解された樹脂材料182を第1の絶縁膜120に吹き付けて、第1の絶縁膜120上に第2の絶縁膜130を形成すること(加熱吹付処理)、を含んでよい。例えば、樹脂材料182を溶剤に溶解した状態は、ワニス状態といわれる場合がある。溶剤に溶解された樹脂材料182の粘度は、樹脂材料182の粘度より低いため、第2の絶縁膜130は、クラック125c-1~125c-3に接し易くクラック(隙間)を埋め易い(充填し易い)だけでなく、複数の孔140の側壁142及び底部144に接し易く、孔140に入り易い。 For example, step 130 may include a spraying device 180 spraying a resin material 182 dissolved in a solvent onto the first insulating film 120 to form the second insulating film 130 on the first insulating film 120 (heat spraying process). For example, the state in which the resin material 182 is dissolved in a solvent is sometimes referred to as a varnish state. Because the viscosity of the resin material 182 dissolved in a solvent is lower than the viscosity of the resin material 182 itself, the second insulating film 130 not only easily contacts the cracks 125c-1 to 125c-3 and easily fills the cracks (gaps), but also easily contacts the sidewalls 142 and bottoms 144 of the multiple holes 140 and easily enters the holes 140.
また、例えば、ステップ130は、基材110の形状に応じて、電着(電着塗装)、スピンコート、ディップコートなどを用いて、第1の絶縁膜120上に第2の絶縁膜130を塗布し形成してよく、刷毛又はローラーを用いて、第1の絶縁膜120に第2の絶縁膜130を直接塗布し形成してもよい。例えば、電着(電着塗装)、スピンコート、ディップコート、刷毛、ローラーなどは、樹脂材料を塗布する方法及び装置としてよく知られている。また、例えば、上述した樹脂材料を塗布する方法において、樹脂材料を塗布する装置の内部の気体を、真空ポンプを含む排気装置を用いて排気することにより、複数の孔140に入り込んでいる気体(例えば、空気)を追い出しつつ、第2の絶縁膜130を第1の絶縁膜120に塗布することができる。その結果、第2の絶縁膜130は、クラック125c-1~125c-3に接し易くクラック(隙間)を埋めることができると共に、複数の孔140の側壁142又は底部144に接することができる。換言すると、例えば、侵入部136が側壁142又は底部144に接することができる。また、当該方法及び装置を用いることによって、第1の絶縁膜120上に第2の絶縁膜130を比較的容易に、塗布し形成することができる。例えば、当該方法及び装置を用いることによって、第2の絶縁膜130の成膜に要する時間を短縮できる。 Furthermore, for example, in step 130, depending on the shape of the substrate 110, the second insulating film 130 may be applied and formed on the first insulating film 120 using electrodeposition (electrodeposition coating), spin coating, dip coating, etc., or the second insulating film 130 may be applied directly to the first insulating film 120 using a brush or roller. For example, electrodeposition (electrodeposition coating), spin coating, dip coating, brushes, rollers, etc. are well-known methods and devices for applying resin materials. Furthermore, for example, in the method of applying the resin material described above, the gas inside the device for applying the resin material is evacuated using an exhaust device including a vacuum pump, so that the second insulating film 130 can be applied to the first insulating film 120 while expelling the gas (e.g., air) that has entered the multiple holes 140. As a result, the second insulating film 130 can easily contact the cracks 125c-1 to 125c-3, filling the cracks (gaps), and can also contact the sidewalls 142 or bottoms 144 of the multiple holes 140. In other words, for example, the intrusion portion 136 can contact the sidewalls 142 or bottoms 144. Furthermore, by using this method and apparatus, the second insulating film 130 can be applied and formed relatively easily on the first insulating film 120. For example, by using this method and apparatus, the time required to form the second insulating film 130 can be reduced.
なお、ステップ130はステップ120を含み、ステップ130とステップ120とが一つのステップであってもよい。 Note that step 130 may include step 120, and step 130 and step 120 may be combined into one step.
こうして、ステージ100が作製され、ステージ100の作製は終了する。 In this way, stage 100 is produced, and production of stage 100 is complete.
以上説明したとおり、ステージ100の作製方法は、封孔処理を行うことを含まず、第2の絶縁膜130を、第1の絶縁膜120の第1の面122、クラック125c-1~125c-3、及び、複数の孔140の側壁142又は底部144に形成することを含む。すなわち、ステージ100の作製方法によって、ステージ100は、第1の絶縁膜120の第1の面122、クラック(隙間)125c-1~125c-3だけでなく、従来技術では絶縁膜が形成困難であった複数の孔140に侵入し、複数の孔140の側壁142又は底部144に沿って形成されると共に埋められた(充填された)第2の絶縁膜130(侵入部136)を含む。 As explained above, the method for manufacturing the stage 100 does not include a sealing process, but rather includes forming the second insulating film 130 on the first surface 122 of the first insulating film 120, the cracks 125c-1 to 125c-3, and the sidewalls 142 or bottoms 144 of the multiple holes 140. In other words, thanks to the method for manufacturing the stage 100, the stage 100 includes not only the first surface 122 and cracks (gaps) 125c-1 to 125c-3 of the first insulating film 120, but also the second insulating film 130 (intrusion portion 136) that penetrates into the multiple holes 140, where it was difficult to form an insulating film using conventional technology, and is formed along and filled (filled) the sidewalls 142 or bottoms 144 of the multiple holes 140.
その結果、ステージ100は、クラック(隙間)だけでなく、複数の孔140の側壁142又は底部144を第2の絶縁膜130(侵入部136)で被覆及び埋める(充填する)ことができるため、従来技術のステージより、高い密着性、高い絶縁性、高い耐電圧特性及び高い耐食性を有することができる。よって、ステージ100は長期的な信頼性の低下を抑制可能である。 As a result, the stage 100 can cover and fill (fill) not only cracks (gaps) but also the sidewalls 142 or bottoms 144 of the multiple holes 140 with the second insulating film 130 (penetration portions 136), thereby providing higher adhesion, insulation, voltage resistance, and corrosion resistance than stages of conventional technology. Therefore, the stage 100 can prevent a decrease in long-term reliability.
また、基材110又は第1の絶縁膜120はプラズマ処理によって表面処理されてもよい。第1の絶縁膜120がプラズマ処理した基材110上に形成されると、第1の絶縁膜120の均一性が向上する。その結果、ステージ100の絶縁性及び耐食性が向上する。 Furthermore, the substrate 110 or the first insulating film 120 may be surface-treated by plasma treatment. When the first insulating film 120 is formed on a plasma-treated substrate 110, the uniformity of the first insulating film 120 is improved. As a result, the insulating properties and corrosion resistance of the stage 100 are improved.
また、第1の絶縁膜120は、ブラスト処理によって研磨されてもよい。第1の絶縁膜120が研磨されることによって、第1の絶縁膜120は平坦化される。 Alternatively, the first insulating film 120 may be polished by blasting. By polishing the first insulating film 120, the first insulating film 120 is planarized.
[2.第2実施形態]
図7を参照して、本発明の第2実施形態に係る半導体製造装置の構成を説明する。半導体製造装置はステージ100を含む。例えば、半導体製造装置は膜加工装置300である。膜加工装置300は、所謂、CVD装置である。なお、図7を参照して説明される膜加工装置300の構成は一例であって、膜加工装置300の構成は図7に示される構成に限定されない。また、膜加工装置300はCVD装置に限定されない。膜加工装置300の説明において、図1~図6を参照して説明した構成と同一、又は類似する構成は、必要に応じて説明する。
[2. Second embodiment]
The configuration of a semiconductor manufacturing apparatus according to a second embodiment of the present invention will be described with reference to FIG. 7. The semiconductor manufacturing apparatus includes a stage 100. For example, the semiconductor manufacturing apparatus is a film processing apparatus 300. The film processing apparatus 300 is a so-called CVD apparatus. Note that the configuration of the film processing apparatus 300 described with reference to FIG. 7 is one example, and the configuration of the film processing apparatus 300 is not limited to the configuration shown in FIG. 7. Furthermore, the film processing apparatus 300 is not limited to a CVD apparatus. In the description of the film processing apparatus 300, configurations that are the same as or similar to the configurations described with reference to FIGS. 1 to 6 will be described as necessary.
図7は、膜加工装置300の断面の模式図である。膜加工装置300は、反応ガスを化学的に反応させ、種々の膜を基板上に化学的に形成することができる。膜加工装置300は、チャンバー302を含む。チャンバー302は、反応ガスを化学的に反応させ、種々の膜を基板上に化学的に形成する空間を提供する。 Figure 7 is a schematic cross-sectional view of a film processing apparatus 300. The film processing apparatus 300 chemically reacts a reactive gas and can chemically form various films on a substrate. The film processing apparatus 300 includes a chamber 302. The chamber 302 provides a space in which the reactive gas is chemically reacted and various films are chemically formed on a substrate.
排気装置304がチャンバー302に接続される。例えば、排気装置304はチャンバー302内の圧力を低減することができる。導入管306がチャンバー302に設けられる。導入管306はバルブ308を介してチャンバー302内に反応ガスを導入することができる。反応ガスとしては、作成する膜に応じて種々のガスを用いることができる。また、反応ガスは、常温で液体でもよい。例えば、反応ガスは、シラン、ジクロロシラン、テトラエトキシシラン、フッ化タングステン、トリメチルアルミニウムなどである。シラン、ジクロロシラン、テトラエトキシシランなどを用いることで、シリコン、酸化ケイ素、又は、窒化ケイ素などの薄膜が基板上に形成される。また、フッ化タングステンやトリメチルアルミニウムなどを用いることで、タングステン、アルミニウム、又は酸化アルミニウムなどの金属薄膜又は金属酸化物薄膜が基板上に形成される。 An exhaust device 304 is connected to the chamber 302. For example, the exhaust device 304 can reduce the pressure inside the chamber 302. An inlet pipe 306 is provided in the chamber 302. The inlet pipe 306 can introduce a reactive gas into the chamber 302 via a valve 308. Various gases can be used as the reactive gas depending on the film to be formed. The reactive gas may also be a liquid at room temperature. For example, the reactive gas may be silane, dichlorosilane, tetraethoxysilane, tungsten fluoride, trimethylaluminum, etc. By using silane, dichlorosilane, tetraethoxysilane, etc., a thin film of silicon, silicon oxide, silicon nitride, or the like is formed on the substrate. Furthermore, by using tungsten fluoride, trimethylaluminum, etc., a thin metal or metal oxide thin film of tungsten, aluminum, aluminum oxide, or the like is formed on the substrate.
マイクロ波源312が導波管310を介してチャンバー302上部に設けられる。マイクロ波源312はマイクロ波を供給するためのアンテナなどを含む。マイクロ波源312で発生されたマイクロ波は導波管310によってチャンバー302内部へ導入される。反応ガスがマイクロ波によりプラズマ化され、ガスの化学反応がプラズマに含まれる種々の活性種により促進され、化学反応によって得られる生成物が基板上に堆積され、薄膜が基板上に形成される。 Microwave source 312 is installed above chamber 302 via waveguide 310. Microwave source 312 includes an antenna for supplying microwaves. The microwaves generated by microwave source 312 are introduced into chamber 302 via waveguide 310. The reactive gas is converted into plasma by the microwaves, the chemical reaction of the gas is promoted by various active species contained in the plasma, and the product of the chemical reaction is deposited on the substrate, forming a thin film on the substrate.
任意の構成として、磁石344がチャンバー302内に設けられてもよい。磁石344は、プラズマの密度を増大させることができる。チャンバー302の側面にはさらに磁石316、および磁石318を設けてもよい。磁石316及び磁石318は、永久磁石でよく、電磁コイルを有する電磁石でもよい。 As an optional configuration, a magnet 344 may be provided within the chamber 302. The magnet 344 can increase the density of the plasma. Magnets 316 and 318 may also be provided on the side of the chamber 302. Magnets 316 and 318 may be permanent magnets or electromagnets having electromagnetic coils.
基板を載置するためのステージ100がチャンバー302の下部に設けられ、基板がステージ100上に設置された状態で、薄膜を基板上に形成することができる。任意の構成として、電源324がステージ100に接続されてもよい。電源324は、高周波電力に相当する電圧をステージ100に印加することができる。 A stage 100 for placing a substrate is provided at the bottom of the chamber 302, and a thin film can be formed on the substrate while the substrate is placed on the stage 100. Optionally, a power supply 324 may be connected to the stage 100. The power supply 324 can apply a voltage equivalent to high-frequency power to the stage 100.
例えば、ステージ100がシースヒータ(図示は省略)を備える場合、シースヒータを制御するヒータ電源330が、ステージ100に接続される。任意の構成として、基板をステージ100に固定するための静電チャック用の電源326、ステージ100内部(溝部104)に環流される媒体の温度制御を行う温度コントローラ328、ステージ100を回転軸106を中心として回転させるための回転制御装置(図示は省略)がステージ100に接続されてもよい。例えば、シースヒータ、ヒータ電源330、温度コントローラ328を用いることによって、ステージ100の温度を制御すると共に、ステージ100に載置される基板の温度を制御することができる。 For example, if the stage 100 is equipped with a sheathed heater (not shown), a heater power supply 330 that controls the sheathed heater is connected to the stage 100. Optionally, the stage 100 may be connected to a power supply 326 for an electrostatic chuck that secures the substrate to the stage 100, a temperature controller 328 that controls the temperature of the medium circulating inside the stage 100 (groove 104), and a rotation control device (not shown) that rotates the stage 100 around the rotation axis 106. For example, by using the sheathed heater, heater power supply 330, and temperature controller 328, it is possible to control the temperature of the stage 100 as well as the temperature of the substrate placed on the stage 100.
第2実施形態に係る膜加工装置300はステージ100を含む。その結果、膜加工装置300は、基板を均一に加熱し、かつ、加熱温度を精密に制御することができる。ステージ100は絶縁性能に優れているため、基板に印加される電圧に対して、膜加工装置300の耐電圧が向上する。また、耐食性、絶縁性、耐電圧性能、保護膜と絶縁膜との密着性に優れたステージ100を含む膜加工装置300は、長期信頼性に優れているため、ユーザーは膜加工装置300のメンテナンスの回数を減らすことができる。 The film processing apparatus 300 according to the second embodiment includes a stage 100. As a result, the film processing apparatus 300 is able to uniformly heat the substrate and precisely control the heating temperature. The stage 100 has excellent insulating properties, which improves the withstand voltage of the film processing apparatus 300 relative to the voltage applied to the substrate. Furthermore, the film processing apparatus 300, which includes a stage 100 that has excellent corrosion resistance, insulating properties, withstand voltage performance, and adhesion between the protective film and the insulating film, has excellent long-term reliability, allowing users to reduce the number of maintenance tasks for the film processing apparatus 300.
本発明の実施形態として、半導体製造装置のステージ100に含まれる基材110上に第1の絶縁膜120及び第2の絶縁膜130を設ける例を説明したが、本発明の実施形態は半導体製造装置に限定されない。例えば、第1の絶縁膜120及び第2の絶縁膜130の設けられた基材110は航空宇宙の分野で用いられる部材であってよく、自動車の分野で用いられる部材であってよく、第1の絶縁膜120及び第2の絶縁膜130がアルミニウムを含む基材110上に設けられた部材を含む用途に応用されてもよい。 As an embodiment of the present invention, an example in which a first insulating film 120 and a second insulating film 130 are provided on a substrate 110 included in a stage 100 of a semiconductor manufacturing apparatus has been described, but embodiments of the present invention are not limited to semiconductor manufacturing apparatuses. For example, the substrate 110 on which the first insulating film 120 and the second insulating film 130 are provided may be a component used in the aerospace field, or a component used in the automotive field, or may be applied to applications including components in which the first insulating film 120 and the second insulating film 130 are provided on a substrate 110 containing aluminum.
本発明の実施形態として上述した部材、ステージ、ステージの作製方法及び半導体製造装置の各構成は、相互に矛盾しない限りにおいて、適宜組み合わせて実施することができる。また、本発明の実施形態として上述した部材、ステージ、ステージの作製方法及び半導体製造装置の各構成は、相互に矛盾しない限りにおいて、適宜、交換可能である。また、各実施形態を基にして、当業者が適宜構成要素の追加、削除もしくは設計変更を行ったものも、本発明の要旨を備えている限り、本発明の範囲に含まれる。 The components, stages, stage manufacturing methods, and semiconductor manufacturing apparatuses described above as embodiments of the present invention can be combined as appropriate, provided they are not mutually inconsistent. Furthermore, the components, stages, stage manufacturing methods, and semiconductor manufacturing apparatuses described above as embodiments of the present invention can be interchanged as appropriate, provided they are not mutually inconsistent. Furthermore, even if a person skilled in the art adds, deletes, or modifies components as appropriate based on each embodiment, these additions, deletions, or design changes are within the scope of the present invention, provided they still incorporate the spirit of the present invention.
また、上述した各実施形態によりもたらされる作用効果とは異なる他の作用効果であっても、本明細書の記載から明らかなもの、又は、当業者において容易に予測し得るものについては、当然に本発明によりもたらされるものと理解される。 Furthermore, even if there are other effects and advantages different from those brought about by the above-described embodiments, if they are clear from the description in this specification or can be easily predicted by a person skilled in the art, they are naturally understood to be brought about by the present invention.
100:ステージ、102:孔、104:溝部、106:回転軸、110:基材、112:第1の面、114:第2の面、120:第1の絶縁膜、122:第1の面、124:第2の面、125c-1:クラック、125c-2:クラック、125c-3:クラック、130:第2の絶縁膜、132:第1の面、134:第2の面、136:侵入部、140:孔、142:側壁、144:底部、150:水和酸化物、180:吹付装置、182:樹脂材料、200:領域、300:膜加工装置、302:チャンバー、304:排気装置、306:導入管、308:バルブ、310:導波管、312:マイクロ波源、316:磁石、318:磁石、324:電源、326:電源、328:温度コントローラ、330:ヒータ電源、344:磁石 100: Stage, 102: Hole, 104: Groove, 106: Rotation shaft, 110: Base material, 112: First surface, 114: Second surface, 120: First insulating film, 122: First surface, 124: Second surface, 125c-1: Crack, 125c-2: Crack, 125c-3: Crack, 130: Second insulating film, 132: First surface, 134: Second surface, 136: Intrusion portion, 140: Hole, 142: Sidewall, 144: bottom, 150: hydrated oxide, 180: spraying device, 182: resin material, 200: area, 300: film processing device, 302: chamber, 304: exhaust device, 306: inlet pipe, 308: valve, 310: waveguide, 312: microwave source, 316: magnet, 318: magnet, 324: power supply, 326: power supply, 328: temperature controller, 330: heater power supply, 344: magnet
Claims (16)
第3の面、前記第1の面に接し前記第3の面と反対側の第4の面、及び、前記第3の面側に設けられた複数の孔を含み、前記基材上に配置された第1の絶縁膜と、
第5の面、前記第3の面に接し前記第5の面と反対側の第6の面、及び、前記複数の孔の側壁に接すると共に前記複数の孔に侵入した侵入部を含み、前記第1の絶縁膜に配置された第2の絶縁膜と、
を含む、基板を載置するためのステージ。 a substrate having a first surface and a second surface opposite the first surface;
a first insulating film disposed on the substrate, the first insulating film including a third surface, a fourth surface in contact with the first surface and opposite to the third surface, and a plurality of holes provided on the third surface side;
a second insulating film disposed on the first insulating film, the second insulating film including a fifth surface, a sixth surface in contact with the third surface and opposite to the fifth surface, and intrusion portions in contact with side walls of the plurality of holes and intruding into the plurality of holes;
a stage for placing a substrate thereon,
前記第2の絶縁膜は前記クラックに接する、請求項1に記載のステージ。 the first insulating film includes cracks;
The stage according to claim 1 , wherein the second insulating film contacts the crack.
前記侵入部は前記底部と離隔している、請求項1に記載のステージ。 the hole includes a bottom;
The stage of claim 1 , wherein the penetration is spaced from the bottom.
前記第1の面に、第3の面、第3の面と反対側の第4の面、及び、前記第3の面側に設けられた複数の孔を含む第1の絶縁膜を形成することと、
前記第3の面及び前記複数の孔の側壁に接すると共に、前記複数の孔に侵入する侵入部を含む第2の絶縁膜を形成することと、
を含む、基板を載置するためのステージの作製方法。 using a substrate having a first surface and a second surface opposite the first surface;
forming a first insulating film on the first surface, the first insulating film including a third surface, a fourth surface opposite to the third surface, and a plurality of holes provided on the third surface side;
forming a second insulating film in contact with the third surface and sidewalls of the plurality of holes and including an intrusion portion that intrudes into the plurality of holes;
A method for manufacturing a stage for placing a substrate, comprising:
前記第2の絶縁膜は前記隙間に接する、請求項8に記載のステージの作製方法。 the first insulating film includes a gap;
The method for manufacturing a stage according to claim 8 , wherein the second insulating film contacts the gap.
前記複数の孔の側壁に接する侵入部は前記底部と離隔している、請求項8に記載のステージの作製方法。 the hole includes a bottom;
The method for manufacturing a stage according to claim 8 , wherein the penetration portions in contact with the side walls of the plurality of holes are spaced apart from the bottom portions.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004190136A (en) * | 2002-11-28 | 2004-07-08 | Tokyo Electron Ltd | Member inside plasma treatment vessel |
| WO2018159189A1 (en) * | 2017-02-28 | 2018-09-07 | 日本発條株式会社 | Substrate supporting unit and film forming device having substrate supporting unit |
| WO2023120112A1 (en) * | 2021-12-21 | 2023-06-29 | 日本発條株式会社 | Laminate structure, stage, semiconductor manufacturing device, and manufacturing method for laminate structure |
| JP2023149720A (en) * | 2022-03-31 | 2023-10-13 | 日本特殊陶業株式会社 | holding device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004190136A (en) * | 2002-11-28 | 2004-07-08 | Tokyo Electron Ltd | Member inside plasma treatment vessel |
| WO2018159189A1 (en) * | 2017-02-28 | 2018-09-07 | 日本発條株式会社 | Substrate supporting unit and film forming device having substrate supporting unit |
| WO2023120112A1 (en) * | 2021-12-21 | 2023-06-29 | 日本発條株式会社 | Laminate structure, stage, semiconductor manufacturing device, and manufacturing method for laminate structure |
| JP2023149720A (en) * | 2022-03-31 | 2023-10-13 | 日本特殊陶業株式会社 | holding device |
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