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WO2025126975A1 - Composant électronique en céramique multicouche et son procédé de fabrication - Google Patents

Composant électronique en céramique multicouche et son procédé de fabrication Download PDF

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Publication number
WO2025126975A1
WO2025126975A1 PCT/JP2024/043213 JP2024043213W WO2025126975A1 WO 2025126975 A1 WO2025126975 A1 WO 2025126975A1 JP 2024043213 W JP2024043213 W JP 2024043213W WO 2025126975 A1 WO2025126975 A1 WO 2025126975A1
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Prior art keywords
layer
metal layer
element body
paste
base metal
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English (en)
Japanese (ja)
Inventor
中村智彰
平岡研一
冨川千鶴
篠▲崎▼潤一
寺岡秀弥
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Taiyo Yuden Co Ltd
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Taiyo Yuden Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors

Definitions

  • the present invention relates to a multilayer ceramic electronic component and a manufacturing method thereof.
  • components of the plating solution may penetrate through the interface between the base metal layer and the base body. This may cause corrosion of the internal electrodes, etc.
  • the present invention was developed in consideration of the above problems, and aims to suppress deterioration of the internal electrodes.
  • the present invention is a multilayer ceramic electronic component comprising: an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked plurality of internal electrodes being alternately exposed and having end faces facing each other in a second direction; a base metal layer that contacts a portion of the plurality of internal electrodes exposed from the end face and is provided at an end portion of a surface of the element body connected to the end face on the side of the end face; a glass layer provided at the end portion between the tip of the base metal layer and the element body and on the opposite side to the end face; and a plating layer that is provided at the end portion so as to sandwich the base metal layer and the glass layer between the element body and the element body and forms an external electrode together with the base metal layer.
  • the glass layer may contain silicon oxide.
  • the base metal layer can be configured to include a first layer that sandwiches the glass layer with the element body at the end, and a second layer that has a lower Si concentration than the first layer and contacts the end face.
  • the first layer can be configured to sandwich the second layer between the end surface.
  • the first layer may not be provided on the end surface.
  • the plating layer can be configured not to come into contact with the base body.
  • the present invention is a method for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, and the stacked plurality of internal electrodes have end faces that are alternately exposed and face each other in a second direction; applying a first conductor paste containing glass powder containing silicon oxide to the end face side of the surface of the element body that is connected to the end face; applying a second conductor paste having a lower Si concentration than the first conductor paste to the end face; sintering the first conductor paste and the second conductor paste to form an undercoat metal layer that contacts a portion of the plurality of internal electrodes exposed from the end face and is provided on the end face, and a glass layer containing silicon oxide that is provided between the tip of the undercoat metal layer at the end face and the element body to the opposite side of the end face; and forming a plating layer that is provided at the end face so as to
  • the step of applying the first conductive paste includes a step of forming the first conductive paste on the end portion so that the first conductive paste is not provided on the end surface, and the step of applying the second conductive paste can be configured to be performed after the step of applying the first conductive paste.
  • the step of applying the first conductive paste can be performed after the step of applying the second conductive paste, and the configuration can include a step of applying the first conductive paste so as to cover the second conductive paste.
  • the present invention is a method for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked plurality of internal electrodes having end faces that are alternately exposed and facing each other in a second direction; applying a paste containing silicon oxide to an end of the surface of the element body that is connected to the end face of the element body, without applying the paste containing silicon oxide to the end face; applying a conductive paste to the end face of the element body and onto the paste; and baking the paste and the conductive paste to form a base metal layer that is in contact with a portion of the plurality of internal electrodes exposed from the end face and is provided on the end face, and a glass layer containing silicon oxide that is provided between the tip of the base metal layer at the end face and the element body and on the opposite side to the end face; and forming a plating layer that is provided at the end face so as to sandwich
  • the present invention makes it possible to suppress deterioration of the internal electrodes.
  • FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor according to a first embodiment.
  • FIG. 2 is a cross-sectional view taken along line AA of FIG.
  • FIG. 3 is a cross-sectional view taken along line BB of FIG.
  • FIG. 4 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment.
  • FIG. 5A is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment.
  • FIG. 5B is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to embodiment 1.
  • FIG. 6A is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment.
  • FIG. 6B is a cross-sectional view showing the method for manufacturing the multilayer ceramic capacitor according to embodiment 1.
  • 7A to 7C are cross-sectional views showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment.
  • FIG. 8 is a cross-sectional view of a comparative multilayer ceramic capacitor.
  • FIG. 9 is a cross-sectional view of the multilayer ceramic capacitor of the first embodiment.
  • FIG. 10 is a cross-sectional view of a multilayer ceramic capacitor according to a modified example of the first embodiment.
  • FIG. 11 is a cross-sectional view of the multilayer ceramic capacitor according to the second embodiment.
  • FIG. 12A is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the second embodiment.
  • FIG. 12B is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the second embodiment.
  • FIG. 13A is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the second embodiment.
  • FIG. 13B is a cross-sectional view showing the method for manufacturing the multilayer ceramic capacitor according to the second embodiment.
  • FIG. 14 is a cross-sectional view of a multilayer ceramic capacitor according to a modified example of the second embodiment.
  • FIG. 15 is a cross-sectional view of the multilayer ceramic capacitor according to the third embodiment.
  • FIG. 16A is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the third embodiment.
  • FIG. 16B is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the third embodiment.
  • FIG. 17 is a cross-sectional view showing a method for manufacturing the multilayer ceramic capacitor according to the third embodiment.
  • Fig. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to embodiment 1.
  • Fig. 2 is a cross-sectional view taken along line AA in Fig. 1.
  • Fig. 3 is a cross-sectional view taken along line BB in Fig. 1.
  • the Z direction (first direction) is the stacking direction in which the dielectric layers 14 and the internal electrodes 12a and 12b are stacked, and is the direction in which the bottom surface 55 and top surface 56 of the element body 10 face each other.
  • the X direction (second direction) is the length direction of the element body 10, and is the direction in which a pair of end surfaces 51 and 52 of the element body 10 face each other.
  • the Y direction (third direction) is the width direction of the internal electrodes 12a and 12b, and is the direction in which a pair of side surfaces 53 and 54 of the element body 10 face each other.
  • the X direction, Y direction, and Z direction intersect or are perpendicular to each other.
  • the multilayer ceramic capacitor 100 comprises an element body 10 having a substantially rectangular parallelepiped shape, and external electrodes 20a and 20b.
  • the element body 10 has a plurality of dielectric layers 14, a plurality of internal electrodes 12a and 12b, and a cover dielectric layer 16.
  • the plurality of internal electrodes 12a and the plurality of internal electrodes 12b are alternately stacked.
  • One of the plurality of dielectric layers 14 is provided between one of the plurality of internal electrodes 12a and one of the plurality of internal electrodes 12b.
  • the outermost layers in the stacking direction (Z direction) of the laminate in which the dielectric layer 14 and the internal electrodes 12a and 12b are stacked are the internal electrodes 12a and 12b, and the lower and upper surfaces of the laminate are covered by the cover dielectric layer 16.
  • the region sandwiching the plurality of internal electrodes 12a and 12b in the Y direction is the side margin region 18.
  • Internal electrodes 12a and 12b are alternately exposed at end faces 51 and 52. Internal electrode 12a is exposed at end face 51, but internal electrode 12b is not exposed. Internal electrode 12b is exposed at end face 52, but internal electrode 12a is not exposed. In other words, internal electrodes 12a and 12b are connected to different end faces 51 and 52.
  • the external electrode 20a contacts the internal electrode 12a exposed from the element body 10 at the end face 51.
  • the external electrode 20b contacts the internal electrode 12b exposed from the element body 10 at the end face 52.
  • the external electrode 20a covers the end face 51 as well as the end faces 40 in the -X direction of the side faces 53, 54, the lower face 55 and the upper face 56.
  • the end faces 40 are the portions of the faces connected to the end faces 51 and 52 of the element body 10 on the end face 51 and 52 side.
  • the external electrode 20b contacts the internal electrode 12b at the end face 52.
  • the external electrode 20b covers the end face 40 in the +X direction of the side faces 53, 54, the lower face 55 and the upper face 56 as well as the end face 52.
  • Each of the external electrodes 20a and 20b comprises an underlying metal layer 22 and a plating layer 24 provided to cover the underlying metal layer 22.
  • the underlying metal layer 22 comprises metal layers 22a and 22b.
  • the metal layer 22a is provided at the end 40.
  • a glass layer 21 is provided between the metal layer 22a and the element body 10. The glass layer 21 is exposed from the tip of the metal layer 22a.
  • the metal layer 22b is provided on the end faces 51 and 52.
  • the glass layer 21 is not provided on the end faces 51 and 52, and the metal layer 22b contacts the internal electrode 12a or 12b.
  • the plating layer 24 is provided to cover the underlying metal layer 22.
  • the tip of the plating layer 24 contacts the glass layer 21 and does not contact the element body 10.
  • the size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length (length in the X direction), 0.125 mm in width (width in the Y direction), and 0.125 mm in height (height in the Z direction), or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes.
  • the internal electrodes 12a and 12b are mainly composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn).
  • the internal electrodes 12a and 12b may be made of precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these metals.
  • the thickness of the internal electrodes 12a and 12b is, for example, 0.1 ⁇ m or more and 1 ⁇ m or less.
  • the dielectric layer 14 has a main phase of a ceramic material having a perovskite structure represented by the general formula ABO 3.
  • the perovskite structure includes ABO 3- ⁇ , which is not a stoichiometric composition.
  • the ceramic material can be selected from at least one of barium titanate (BaTiO 3 ), calcium zirconate (CaZrO 3 ), calcium titanate (CaTiO 3 ), strontium titanate (SrTiO 3 ), magnesium titanate (MgTiO 3 ), and Ba 1-x-y Ca x Sr y Ti 1-z Zr z O 3 (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ z ⁇ 1) that forms a perovskite structure.
  • the dielectric layer 14 may contain additives.
  • additives to the dielectric layer 14 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.
  • Zr zirconium
  • Hf hafnium
  • Mg manganese
  • Mo molybden
  • the base metal layer 22 mainly contains a metal such as copper, nickel, aluminum (Al), zinc (Zn), or an alloy of two or more of these metals (for example, an alloy of copper and nickel), and contains ceramics such as a glass component for densifying the base metal layer 22 and a common material for controlling the sintering property of the external electrodes 20a and 20b.
  • the glass component is an oxide of barium (Ba), strontium (Sr), calcium (Ca), zinc, aluminum, silicon, boron, or the like.
  • the common material is, for example, a ceramic component mainly containing the same material as the main component of the dielectric layer 14.
  • the silicon oxide concentration of the metal layer 22a is higher than that of the metal layer 22b. In the following, the silicon oxide concentration is the concentration of SiO 2.
  • the thickness of the base metal layer 22 is, for example, 3 ⁇ m to 50 ⁇ m.
  • the silicon oxide concentration of the metal layers 22a and 22b is, for example, 5 mol% or more.
  • the silicon oxide concentration of metal layer 22a is higher than the silicon oxide concentration of metal layer 22b by measuring the concentration of the Si element (Si concentration) (at%) in metal layers 22a and 22b using, for example, the STEM (Scanning Transmission Electron Microscope)-EDS (Energy Dispersive X-ray Spectroscopy) method.
  • the Si concentration of metal layer 22a is higher than the Si concentration of metal layer 22b.
  • the plating layer 24 is mainly composed of a metal such as copper, nickel, aluminum, zinc or tin, or an alloy of two or more of these metals.
  • the plating layer 24 may be a plating layer of a single metal component, or may be a plurality of plating layers of different metal components.
  • a film of a conductive resin such as epoxy resin or urethane resin may be formed on the surface of the plating layer 24.
  • the thickness of the plating layer 24 is, for example, 5 ⁇ m to 15 ⁇ m.
  • the glass layer 21 is mainly composed of silicon oxide (e.g., silicon dioxide) and may contain other metal oxides.
  • the thickness of the glass layer 21 is, for example, 0.1 ⁇ m to 5 ⁇ m.
  • a green sheet is formed (step S10).
  • a dielectric material is prepared by adding various additive compounds (such as sintering aids) to ceramic powder, for example.
  • a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material and wet-mixed to generate a slurry.
  • a green sheet is applied onto a substrate using the generated slurry, for example, by a die coater method or a doctor blade method.
  • the substrate is, for example, a PET (polyethylene terephthalate) film.
  • the green sheet is then dried.
  • step S12 metal patterns that will become the internal electrodes 12a and 12b are formed on the green sheet (step S12).
  • a conductive paste for forming the internal electrodes containing an organic binder is printed on the green sheet on the base material using, for example, a gravure printing method.
  • a plurality of metal patterns corresponding to the internal electrodes 12a and 12b are formed on the green sheet at a distance from each other.
  • the conductive paste contains a metal powder that is the main component, such as nickel powder, a binder, and an organic solvent. Ceramic particles may be added to the conductive paste as a co-material.
  • step S14 green sheets on which metal patterns that become the internal electrodes 12a and 12b are printed are laminated to form a laminate sheet. Green sheets corresponding to the cover dielectric layer 16 are laminated on both end faces in the lamination direction of the laminate sheet.
  • step S16 the laminated sheet is pressure-bonded (step S16).
  • step S16 the laminated sheet formed in step S14 is pressed to bond the green sheets together.
  • the pressure-bonding means for example, a hydrostatic press is used.
  • step S18 the laminated sheet is cut (step S18).
  • a cutting blade is used to cut the laminated sheet in the lamination direction along a predetermined cut line to prepare a plurality of element bodies 10.
  • the internal electrode 12a is exposed from an end face 51
  • the internal electrode 12b is exposed from an end face 52.
  • the element body 10 may be polished by a technique such as barrel polishing. This rounds the corners of the element body 10.
  • step S20 the element body 10 is fired (step S20).
  • the element body 10 is subjected to a binder removal process in a nitrogen gas atmosphere at 250° C. to 500° C., and then fired in a reducing atmosphere at 1300° C. to 1400° C. for about one hour. This sinters the particles of the element body 10 and the internal electrodes 12 a and 12 b.
  • Step S25 includes steps S22, S24, and S26.
  • Figures 5A to 7 are cross-sectional views showing the method for manufacturing the multilayer ceramic capacitor according to the first embodiment.
  • paste 30 is applied to element body 10 (step S22). As shown in FIG. 5A, paste 30 is applied to end portion 40 and end surface 51 of element body 10 by, for example, a dipping method.
  • Paste 30 contains a metal powder having a main component such as copper powder, glass powder (glass frit) containing silicon oxide, a binder, and an organic solvent.
  • the glass powder may contain at least one metal oxide selected from barium oxide, zinc oxide, calcium oxide, aluminum oxide, magnesium oxide, boron oxide, and the like.
  • the concentration of SiO 2 in the glass powder in paste 30 is, for example, 30 mol % to 98 mol %.
  • the paste 30 applied to the end surface 51 is removed using blotting paper or the like. This leaves the paste 30 only on the end 40.
  • paste 32 is applied to end surface 51 of element body 10 by, for example, a dipping method.
  • Paste 32 contains a metal powder having a main component such as copper powder, glass powder, a binder, and an organic solvent.
  • the glass powder contains almost no silicon oxide, and contains at least one metal oxide selected from barium oxide, zinc oxide, calcium oxide, aluminum oxide, magnesium oxide, boron oxide, and the like.
  • the SiO 2 concentration in the glass powder in paste 32 is lower than the SiO 2 concentration in the glass powder in paste 32, and is, for example, 5 mol % to 30 mol %.
  • step S24 the pastes 30 and 32 are sintered (step S24).
  • step S24 the pastes 30 and 32 are baked in a nitrogen atmosphere at 750°C to 850°C, which is lower than the firing temperature in step S22. This causes the pastes 30 and 32 to be baked onto the base body 10.
  • the glass layer 21 contacts the element body 10 and is mainly composed of silicon oxide.
  • the glass layer 21 may contain glass powder components in the paste 30 and oxides of elements in the element body 10.
  • the glass layer 21 may contain metals such as copper in the paste 30, but has a higher resistivity than the metal layer 22a and is an insulator.
  • the glass layer 21 is an inorganic insulator containing silicon oxide and metal oxide, and is amorphous.
  • the metal layer 22a sandwiches the glass layer 21 with the element body 10.
  • the tip of the glass layer 21 protrudes from the tip of the metal layer 22a. In other words, the tip portion of the glass layer 21 is exposed from the metal layer 22a.
  • the metal layer 22a is mainly composed of metals such as copper, and contains glass powder components in the paste 30.
  • a metal layer 22b is formed from the paste 32 on the end surface 51 of the element body 10.
  • the metal layer 22b is mainly composed of a metal such as copper, and contacts the internal electrode 12a exposed from the end surface 51 of the element body 10.
  • the metal layer 22b is mainly composed of a metal such as copper, and contains glass powder components in the paste 32.
  • the silicon oxide concentration in the metal layer 22b is lower than the silicon oxide concentration in the metal layer 22a.
  • the metal layers 22a and 22b form the base metal layer 22.
  • step S26 the plating layer 24 is formed (step S26). As shown in FIG. 7, in step S26, the plating layer 24 is formed to cover the base metal layer 22.
  • the base metal layer 22 and the plating layer 24 form the external electrodes 20a and 20b.
  • the plating layer 24 is, for example, from the base metal layer 22 side, a layer mainly composed of copper, a layer mainly composed of nickel, and a layer mainly composed of tin.
  • the base metal layer 22 and the plating layer 24 form the external electrodes 20a and 20b.
  • FIG. 8 is a cross-sectional view of a comparative multilayer ceramic capacitor, and is an enlarged cross-sectional view of the vicinity of the corners of the end face 51 and the upper face 56.
  • the comparative multilayer ceramic capacitor does not have a glass layer 21, and the base metal layer 22 is in contact with the end 40 of the element body 10.
  • the plating layer 24 is provided so as to cover the base metal layer 22.
  • moisture or corrosive components in the plating liquid may penetrate into the interface between the element body 10 and the base metal layer 22 as shown by the arrow 50, and may penetrate into the end face 51. This may cause corrosion of the internal electrodes 12a, etc.
  • the flux for soldering may penetrate into the interface between the element body 10 and the base metal layer 22 when mounting the multilayer ceramic capacitor. In this way, the resistance to the plating liquid and the moisture resistance are reduced.
  • FIG. 9 is a cross-sectional view of the multilayer ceramic capacitor of embodiment 1, and is an enlarged cross-sectional view of the vicinity of the corner of the end face 51 and the upper surface 56.
  • the base metal layer 22 contacts the multiple internal electrodes 12a exposed from the end face 51 and is provided at the end 40 of the element body 10.
  • the glass layer 21 is provided from between the tip of the base metal layer 22 and the element body 10 at the end 40 to the opposite side of the end face 51.
  • the plating layer 24 is provided at the end 40 so as to sandwich the base metal layer 22 and the glass layer 21 between the element body 10.
  • the glass layer 21 serves as a barrier against moisture or corrosive components in the plating solution, and the moisture or corrosive components can be prevented from penetrating the interface between the element body 10 and the base metal layer 22. Therefore, corrosion of the internal electrodes 12a and the like can be prevented.
  • the multilayer ceramic capacitor it is possible to prevent the flux for solder from penetrating into the interface between the element body 10 and the base metal layer 22. In this way, it is possible to improve resistance to plating liquid and moisture resistance.
  • the glass layer 21 contains silicon oxide.
  • the glass layer 21 containing silicon oxide has good adhesion to the base metal layer 22 and the element body 10. This makes it possible to suppress the intrusion of moisture and corrosive components through the interface between the glass layer 21 and the element body 10 and the interface between the glass layer 21 and the base metal layer 22.
  • the concentration of SiO2 in the glass layer 21 is preferably 50 mol% or more, more preferably 75 mol% or more, and even more preferably 90 mol% or more.
  • paste 30 (first conductor paste) containing powder containing silicon oxide is applied so as to contact end 40 of element body 10.
  • paste 32 second conductor paste having a lower silicon oxide concentration than paste 30 is applied so as to contact end surface 51.
  • pastes 30 and 32 are sintered to form base metal layer 22 and glass layer 21.
  • paste 30 applied to end 40 contains glass powder containing silicon oxide.
  • glass layer 21 containing silicon oxide can be formed between element body 10 and metal layer 22a by a baking process.
  • paste 30 containing glass powder containing a large amount of silicon oxide is provided on end surface 51, the contact resistance between internal electrode 12a and base metal layer 22 becomes high. Therefore, as shown in FIG. 5B, paste 30 is formed on end 40 so that paste 30 is not provided on end surface 51. Then, as shown in FIG. 6A, paste 32 is applied so as to contact end surface 51. Then, as shown in FIG. 6B, a baking process is performed. As a result, paste 30 forms glass layer 21 provided on end 40 and metal layer 22a (first layer) that sandwiches glass layer 21 with element body 10 at end 40. Metal layer 22b (second layer) that has a lower silicon oxide concentration than metal layer 22a and contacts end surface 51 is formed. In addition, metal layer 22a is not provided on end surface 51. Since metal layer 22b with a lower silicon oxide concentration contacts internal electrode 12a, the contact resistance between internal electrode 12a and base metal layer 22 can be reduced.
  • the baking temperature of paste 30 containing glass powder with a high silicon oxide content is higher than the baking temperature of paste 32 containing glass powder with a low silicon oxide content. For this reason, the baking process of paste 30 and the baking process of paste 32 may be performed separately, and the baking temperature of paste 30 containing silicon oxide may be higher than the baking temperature of paste 32.
  • the silicon oxide concentration of paste 30 is higher than the silicon oxide concentration of paste 32 by measuring the Si concentration in pastes 20 and 32 using, for example, the STEM-EDS method.
  • the Si concentration of paste 30 is higher than the Si concentration of paste 32.
  • the silicon oxide concentration in the metal layer 22a is preferably at least twice, more preferably at least three times, and even more preferably at least ten times, the silicon oxide concentration in the metal layer 22b.
  • the silicon oxide concentration in the metal layer 22b is, for example, 5 mol% to 30 mol%.
  • the silicon oxide concentration in the metal layer 22a is, for example, 50 mol% to 99 mol%.
  • the silicon oxide concentration in the metal layers 22a and 22b is the molar ratio of SiO2 in the glass (i.e., inorganic insulator containing silicon oxide and metal oxide) contained in the metal layers 22a and 22b.
  • FIG. 10 is a cross-sectional view of a multilayer ceramic capacitor according to a modification of embodiment 1.
  • the metal layer 22b is provided so as to cover the metal layer 22a.
  • the other configurations are the same as those of embodiment 1, and description thereof will be omitted.
  • the metal layer 22b may cover at least a part of the metal layer 22a at the end portion 40.
  • FIG. 11 is a cross-sectional view of a multilayer ceramic capacitor according to embodiment 2.
  • a metal layer 22b is provided so as to contact an end face 51, and is hardly provided at an end 40.
  • a glass layer 21 is provided at an end 40 of an element body 10.
  • a metal layer 22a is provided so as to contact a metal layer 22b at an end face 51 and a glass layer 21 at an end 40.
  • a plating layer 24 is provided so as to cover a base metal layer 22, and a tip of the plating layer 24 is in contact with the glass layer 21 and does not contact the element body 10.
  • the other configurations are the same as those of embodiment 1, and description thereof will be omitted.
  • Fig. 12A to Fig. 13B are cross-sectional views showing a method for manufacturing a multilayer ceramic capacitor according to embodiment 2.
  • step S22 as shown in Fig. 12A, paste 32 is applied to end face 51 of element body 10. At this time, paste 32 is hardly applied to end portion 40.
  • paste 30 is applied so as to cover paste 32 on end face 51 and to cover end portion 40.
  • the method for applying pastes 30 and 32 is, for example, a dipping method.
  • a glass layer 21 and a metal layer 22a are formed from paste 30.
  • Glass layer 21 covers end 40
  • metal layer 22a covers glass layer 21 and metal layer 22b.
  • plating layer 24 is formed to cover metal layer 22a.
  • External electrode 20a is formed by base metal layer 22 and plating layer 24.
  • paste 32 is applied to contact end face 51, and then paste 30 is applied to cover paste 32 as shown in FIG. 12B.
  • a baking process is performed.
  • metal layer 22a first layer
  • metal layer 22b second layer
  • Metal layer 22a is formed at end 40, sandwiching glass layer 21 with element body 10.
  • Metal layer 22b is formed, which has a lower silicon oxide concentration than metal layer 22a and contacts end face 51.
  • Metal layer 22a is provided so as to sandwich metal layer 22b with end face 51.
  • Metal layer 22b which has a lower silicon oxide concentration, contacts internal electrode 12a, so that the connectivity between internal electrode 12a and base metal layer 22 is good.
  • Fig. 14 is a cross-sectional view of a multilayer ceramic capacitor according to a modification of the second embodiment.
  • the metal layer 22b is provided so as to cover a part of the end 40.
  • the other configurations are the same as those of the second embodiment, and description thereof will be omitted.
  • the metal layer 22b may cover a part of the end 40. It is sufficient that the metal layer 22a is provided so as to cover the tip of the metal layer 22b.
  • Fig. 15 is a cross-sectional view of a multilayer ceramic capacitor according to embodiment 3.
  • a base metal layer 22 has one metal layer.
  • the base metal layer 22 contacts the internal electrodes 12a and 12b at end faces 51 and 52, respectively, and sandwiches the glass layer 21 between the base metal layer 22 and the element body 10 at an end 40.
  • a plating layer 24 is provided so as to cover the base metal layer 22, and its tip contacts the glass layer 21 but does not contact the element body 10.
  • the other configuration is the same as that of embodiment 1, and description thereof will be omitted.
  • FIGS. 16A to 17 are cross-sectional views showing a method for manufacturing a multilayer ceramic capacitor according to the third embodiment.
  • a paste is applied to the element body 10.
  • the paste 34 is applied to the end 40 of the element body 10.
  • the paste 34 is applied to the end 40 and the end face 51 by, for example, a dipping method, as in FIGS. 5A and 5B.
  • the paste 34 applied to the end face 51 is removed.
  • the paste 34 does not contain metal powder, but contains glass powder containing silicon oxide, a binder, and an organic solvent.
  • the glass powder may contain at least one metal oxide of barium oxide, zinc oxide, calcium oxide, aluminum oxide, magnesium oxide, boron oxide, and the like.
  • paste 36 is applied to end 40 and end surface 51, for example, by dipping.
  • the tip of paste 36 is located closer to end surface 51 than the tip of paste 34.
  • the tip of paste 34 is exposed from paste 36.
  • Paste 30 contains metal powder such as copper powder, glass powder, a binder, and an organic solvent.
  • the glass powder contains at least one metal oxide such as barium oxide, zinc oxide, calcium oxide, aluminum oxide, magnesium oxide, and boron oxide.
  • the glass powder may contain silicon oxide, but the silicon oxide concentration of paste 36 is lower than the silicon oxide concentration of paste 34.
  • step S24 a baking process is performed.
  • the glass layer 21 is formed from the paste 34, and the base metal layer 22 is formed from the paste 36.
  • the glass layer 21 is an inorganic insulator containing silicon oxide and metal oxide, and is amorphous.
  • the base metal layer 22 is mainly composed of a metal such as copper, and sandwiches the glass layer 21 with the element body 10. The tip portion of the glass layer 21 is exposed from the base metal layer 22.
  • step S26 a plating layer 24 is formed so as to cover the base metal layer 22. The tip portion of the plating layer 24 contacts the glass layer 21 and does not contact the element body 10.
  • the structure of the plating layer 24 is the same as that of embodiment 1.
  • the base metal layer 22 and the plating layer 24 form the external electrodes 20a and 20b. Note that after the paste 34 is baked, the paste 36 may be baked.
  • paste 34 containing silicon oxide and no metal is applied to end 40 of element body 10 without being applied to end face 51 of element body 10.
  • paste 36 (conductive paste) is applied to end face 51 of element body 10 and on paste 34.
  • pastes 34 and 36 are baked to form base metal layer 22 and glass layer 21. This allows glass layer 21 containing silicon oxide as a main component to be formed on end 40.
  • the glass layer 21 is formed over the entire end 40, but the glass layer 21 may be provided at the tip of the base metal layer 22 as in FIG. 9.
  • the Si concentration is measured, for example, using the STEM (Scanning Transmission Electron Microscope)-EDS (Energy Dispersive X-ray Spectroscopy) method.
  • STEM Sccanning Transmission Electron Microscope
  • EDS Electronic X-ray Spectroscopy
  • An electron beam is irradiated onto the glass, and the molar ratio of Si to the entire glass is calculated from the peaks of Si and metal elements in the glass, which is used as the Si concentration.
  • a similar method to that described above is used when measuring the Si concentration of a conductive paste.
  • the Si concentration may be measured at any point in the relevant layer.
  • a certain component may be composed mainly of a certain element or molecule if the certain component contains the certain element or molecule to an extent that the effect of the embodiment is achieved, and the concentration of the certain element or molecule in the certain component is, for example, 50 mol% or more, 80 mol% or more, or 90 mol% or more.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)

Abstract

Ce composant électronique en céramique multicouche comprend : un corps d'élément dans lequel une pluralité d'électrodes internes et une pluralité de couches diélectriques composées principalement de céramique sont stratifiées en alternance dans une première direction, et la pluralité stratifiée d'électrodes internes ont des surfaces d'extrémité qui sont exposées en alternance et en regard l'une de l'autre dans une seconde direction ; une couche métallique de base qui est en contact avec une partie de la pluralité d'électrodes internes exposées à partir des surfaces d'extrémité et est disposée au niveau de la partie extrémité sur le côté de surface d'extrémité parmi des surfaces reliées aux surfaces d'extrémité du corps d'élément ; une couche de verre disposée entre la pointe de la couche métallique de base et le corps d'élément au niveau de la partie extrémité vers le côté opposé des surfaces d'extrémité ; et une couche de placage qui est disposée de sorte à prendre en sandwich la couche métallique de base et la couche de verre avec le corps d'élément au niveau de la partie extrémité et forme une électrode externe conjointement avec la couche métallique de base.　
PCT/JP2024/043213 2023-12-13 2024-12-06 Composant électronique en céramique multicouche et son procédé de fabrication Pending WO2025126975A1 (fr)

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JP2023-210194 2023-12-13

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013108533A1 (fr) * 2012-01-19 2013-07-25 株式会社村田製作所 Composant électronique en céramique

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013108533A1 (fr) * 2012-01-19 2013-07-25 株式会社村田製作所 Composant électronique en céramique

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