WO2025153272A1

WO2025153272A1 - Method of predicting an effect of a maintenance action in production of integrated circuits and associated apparatus

Info

Publication number: WO2025153272A1
Application number: PCT/EP2024/086477
Authority: WO
Inventors: Frans Bernard AARDEN
Original assignee: ASML Netherlands BV
Current assignee: ASML Netherlands BV
Priority date: 2024-01-15
Filing date: 2024-12-16
Publication date: 2025-07-24
Anticipated expiration: 2026-07-15

Abstract

Disclosed is a method of predicting an effect of a potential substrate table maintenance action relating to a substrate table of a lithographic apparatus. The method comprises obtaining per-layer substrate loading distortion status data relating to a distortion of a substrate or group of substrates resulting from loading the substrate onto said substrate table when exposing one or more layers; obtaining at least one per-layer sensitivity value describing a sensitivity of a substrate loading distortion induced error metric to said substrate loading distortion status data for one or more respective layers on said substrate; and determining the effect of a potential substrate table maintenance action on said substrate loading distortion induced error metric based on said per-layer substrate loading distortion status data and said at least one per-layer sensitivity value.

Description

METHOD OF PREDICTING AN EFFECT OF A MAINTENANCE ACTION IN PRODUCTION OF INTEGRATED CIRCUITS AND ASSOCIATED APPARATUSES CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application claims priority of EP application 24151768.9 which was filed on January 15, 2024 and which is incorporated herein in its entirety by reference. FIELD OF THE INVENTION [0002] The present invention relates to methods and apparatus usable, for example, in the manufacture of devices by lithographic techniques, and to methods of manufacturing devices using lithographic techniques. BACKGROUND ART [0003] A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. including part of a die, one die, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. These target portions are commonly referred to as “fields”. [0004] In the manufacture of complex devices, typically many lithographic patterning steps are performed, thereby forming functional features in successive layers on the substrate. A critical aspect of performance of the lithographic apparatus is therefore the ability to place the applied pattern correctly and accurately in relation to features laid down (by the same apparatus or a different lithographic apparatus) in previous layers. For this purpose, the substrate is provided with one or more sets of alignment marks. Each mark is a structure whose position can be measured at a later time using a position sensor, typically an optical position sensor. The lithographic apparatus includes one or more alignment sensors by which positions of marks on a substrate can be measured accurately. Different types of marks and different types of alignment sensors are known from different manufacturers and different products of the same manufacturer. [0005] In other applications, metrology sensors are used for measuring exposed structures on a substrate (either in resist and/or after etch). A fast and non-invasive form of specialized inspection tool is a scatterometer in which a beam of radiation is directed onto a target on the surface of the substrate and properties of the scattered or reflected beam are measured. Examples of known scatterometers include angle-resolved scatterometers of the type described in US2006033921A1 and Confidential US2010201963A1. In addition to measurement of feature shapes by reconstruction, diffraction based overlay can be measured using such apparatus, as described in published patent application US2006066855A1. Diffraction-based overlay metrology using dark-field imaging of the diffraction orders enables overlay measurements on smaller targets. Examples of dark field imaging metrology can be found in international patent applications WO 2009/078708 and WO 2009/106279 which documents are hereby incorporated by reference in their entirety. Further developments of the technique have been described in published patent publications US20110027704A, US20110043791A, US2011102753A1, US20120044470A, US20120123581A, US20130258310A, US20130271740A and WO2013178422A1. These targets can be smaller than the illumination spot and may be surrounded by product structures on a wafer. Multiple gratings can be measured in one image, using a composite grating target. The contents of all these applications are also incorporated herein by reference. [0006] It is necessary to routinely perform maintenance actions on a lithographic so as to replace deteriorated components. In particular, the wafer table (substrate support) requires periodic replacement due to wear on the wafer table burls (protrusions) which actually support the substrate. It may be necessary to ramp-down (temporarily cease production) of one or more layers in the run-up to a maintenance action, as the fingerprints or impact of the replacement component compared to replaced component can cause large overlay errors when different layers of the same substrate have been exposed before and after the maintenance action. [0007] It is desirable to predict the effect of these maintenance actions on productivity. SUMMARY OF THE INVENTION [0008] The invention in a first aspect provides a method of predicting an effect of a potential substrate table maintenance action relating to a substrate table of a lithographic apparatus, comprising: obtaining per-layer substrate loading distortion status data relating to a distortion of a substrate or group of substrates resulting from loading the substrate onto said substrate table when exposing one or more layers; obtaining at least one per-layer sensitivity value describing a sensitivity of a substrate loading distortion induced error metric to said substrate loading distortion status data for one or more respective layers on said substrate; and determining the effect of a potential substrate table maintenance action on said substrate loading distortion induced error metric based on said per-layer substrate loading distortion status data and said at least one per-layer sensitivity value. [0009] Also disclosed is a computer program and lithographic apparatus being operable to perform the method of the first aspect. [0010] The above and other aspects of the invention will be understood from a consideration of the examples described below. BRIEF DESCRIPTION OF THE DRAWINGS Confidential [0011] Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which: [0012] Figure 1 depicts a lithographic apparatus; [0013] Figure 2 illustrates schematically measurement and exposure processes in the apparatus of Figure 1; [0014] Figure 3(a) conceptually illustrates the cancelling effect in overlay of wafer table fingerprints in each layer in the absence of a wafer table swap, and Figure 3(b) conceptually illustrates the performance impact in overlay of such a wafer table swap; [0015] Figure 4 is a plot of cumulative lots of wafers produced against time, illustrating the concept of A-time, B-time and C-time; [0016] Figure 5 is a flowchart describing a method for scheduling and/or determining the effect of maintenance actions according to an embodiment; and [0017] Figure 6 is a plot of wafer load grid status against time, illustrating the concepts disclosed herein. DETAILED DESCRIPTION OF EMBODIMENTS [0018] Before describing embodiments of the invention in detail, it is instructive to present an example environment in which embodiments of the present invention may be implemented. [0019] Figure 1 schematically depicts a lithographic apparatus LA. The apparatus includes an illumination system (illuminator) IL configured to condition a radiation beam B (e.g., UV radiation or DUV radiation), a patterning device support or support structure (e.g., a mask table) MT constructed to support a patterning device (e.g., a mask) MA and connected to a first positioner PM configured to accurately position the patterning device in accordance with certain parameters; two substrate tables (e.g., a wafer table) WTa and WTb each constructed to hold a substrate (e.g., a resist coated wafer) W and each connected to a second positioner PW configured to accurately position the substrate in accordance with certain parameters; and a projection system (e.g., a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by patterning device MA onto a target portion C (e.g., including one or more dies) of the substrate W. A reference frame RF connects the various components, and serves as a reference for setting and measuring positions of the patterning device and substrate and of features on them. [0020] The illumination system may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, for directing, shaping, or controlling radiation. [0021] The patterning device support MT holds the patterning device in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions, such as for example whether or not the patterning device is held in a vacuum environment. The patterning device support can use mechanical, vacuum, electrostatic or other clamping techniques to Confidential hold the patterning device. The patterning device support MT may be a frame or a table, for example, which may be fixed or movable as required. The patterning device support may ensure that the patterning device is at a desired position, for example with respect to the projection system. [0022] The term “patterning device” used herein should be broadly interpreted as referring to any device that can be used to impart a radiation beam with a pattern in its cross-section such as to create a pattern in a target portion of the substrate. It should be noted that the pattern imparted to the radiation beam may not exactly correspond to the desired pattern in the target portion of the substrate, for example if the pattern includes phase-shifting features or so called assist features. Generally, the pattern imparted to the radiation beam will correspond to a particular functional layer in a device being created in the target portion, such as an integrated circuit. [0023] As here depicted, the apparatus is of a transmissive type (e.g., employing a transmissive patterning device). Alternatively, the apparatus may be of a reflective type (e.g., employing a programmable mirror array of a type as referred to above, or employing a reflective mask). Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels. Any use of the terms “reticle” or “mask” herein may be considered synonymous with the more general term “patterning device.” The term “patterning device” can also be interpreted as referring to a device storing in digital form pattern information for use in controlling such a programmable patterning device. [0024] The term “projection system” used herein should be broadly interpreted as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term “projection lens” herein may be considered as synonymous with the more general term “projection system”. [0025] The lithographic apparatus may also be of a type wherein at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, e.g., water, so as to fill a space between the projection system and the substrate. An immersion liquid may also be applied to other spaces in the lithographic apparatus, for example, between the mask and the projection system. Immersion techniques are well known in the art for increasing the numerical aperture of projection systems. [0026] In operation, the illuminator IL receives a radiation beam from a radiation source SO. The source and the lithographic apparatus may be separate entities, for example when the source is an excimer laser. In such cases, the source is not considered to form part of the lithographic apparatus and the radiation beam is passed from the source SO to the illuminator IL with the aid of a beam delivery system BD including, for example, suitable directing mirrors and/or a beam expander. In other cases the source may be an integral part of the lithographic apparatus, for example when the Confidential source is a mercury lamp. The source SO and the illuminator IL, together with the beam delivery system BD if required, may be referred to as a radiation system. [0027] The illuminator IL may for example include an adjuster AD for adjusting the angular intensity distribution of the radiation beam, an integrator IN and a condenser CO. The illuminator may be used to condition the radiation beam, to have a desired uniformity and intensity distribution in its cross section. [0028] The radiation beam B is incident on the patterning device MA, which is held on the patterning device support MT, and is patterned by the patterning device. Having traversed the patterning device (e.g., mask) MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. With the aid of the second positioner PW and position sensor IF (e.g., an interferometric device, linear encoder, 2-D encoder or capacitive sensor), the substrate table WTa or WTb can be moved accurately, e.g., so as to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and another position sensor (which is not explicitly depicted in Figure 1) can be used to accurately position the patterning device (e.g., mask) MA with respect to the path of the radiation beam B, e.g., after mechanical retrieval from a mask library, or during a scan. [0029] Patterning device (e.g., mask) MA and substrate W may be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2. Although the substrate alignment marks as illustrated occupy dedicated target portions, they may be located in spaces between target portions (these are known as scribe-lane alignment marks). Similarly, in situations in which more than one die is provided on the patterning device (e.g., mask) MA, the mask alignment marks may be located between the dies. Small alignment marks may also be included within dies, in amongst the device features, in which case it is desirable that the markers be as small as possible and not require any different imaging or process conditions than adjacent features. The alignment system, which detects the alignment markers is described further below. [0030] The depicted apparatus could be used in a variety of modes. In a scan mode, the patterning device support (e.g., mask table) MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto a target portion C (i.e., a single dynamic exposure). The speed and direction of the substrate table WT relative to the patterning device support (e.g., mask table) MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS. In scan mode, the maximum size of the exposure field limits the width (in the non-scanning direction) of the target portion in a single dynamic exposure, whereas the length of the scanning motion determines the height (in the scanning direction) of the target portion. Other types of lithographic apparatus and modes of operation are possible, as is well-known in the art. For example, a step mode is known. In so-called “maskless” lithography, a programmable patterning device is held stationary but with a changing pattern, and the substrate table WT is moved or scanned. Confidential [0031] Combinations and/or variations on the above described modes of use or entirely different modes of use may also be employed. [0032] Lithographic apparatus LA is of a so-called dual stage type which has two substrate tables WTa, WTb and two stations – an exposure station EXP and a measurement station MEA – between which the substrate tables can be exchanged. While one substrate on one substrate table is being exposed at the exposure station, another substrate can be loaded onto the other substrate table at the measurement station and various preparatory steps carried out. This enables a substantial increase in the throughput of the apparatus. The preparatory steps may include mapping the surface height contours of the substrate using a level sensor LS and measuring the position of alignment markers on the substrate using an alignment sensor AS. If the position sensor IF is not capable of measuring the position of the substrate table while it is at the measurement station as well as at the exposure station, a second position sensor may be provided to enable the positions of the substrate table to be tracked at both stations, relative to reference frame RF. Other arrangements are known and usable instead of the dual-stage arrangement shown. For example, other lithographic apparatuses are known in which a substrate table and a measurement table are provided. These are docked together when performing preparatory measurements, and then undocked while the substrate table undergoes exposure. [0033] Figure 2 illustrates the steps to expose target portions (e.g. dies) on a substrate W in the dual stage apparatus of Figure 1. On the left hand side within a dotted box are steps performed at a measurement station MEA, while the right hand side shows steps performed at the exposure station EXP. From time to time, one of the substrate tables WTa, WTb will be at the exposure station, while the other is at the measurement station, as described above. For the purposes of this description, it is assumed that a substrate W has already been loaded into the exposure station. At step 200, a new substrate W’ is loaded to the apparatus by a mechanism not shown. These two substrates are processed in parallel in order to increase the throughput of the lithographic apparatus. [0034] Referring initially to the newly-loaded substrate W’, this may be a previously unprocessed substrate, prepared with a new photo resist for first time exposure in the apparatus. In general, however, the lithography process described will be merely one step in a series of exposure and processing steps, so that substrate W’ has been through this apparatus and/or other lithography apparatuses, several times already, and may have subsequent processes to undergo as well. Particularly for the problem of improving overlay performance, the task is to ensure that new patterns are applied in exactly the correct position on a substrate that has already been subjected to one or more cycles of patterning and processing. These processing steps progressively introduce distortions in the substrate that must be measured and corrected for, to achieve satisfactory overlay performance. [0035] The previous and/or subsequent patterning step may be performed in other lithography apparatuses, as just mentioned, and may even be performed in different types of lithography apparatus. For example, some layers in the device manufacturing process which are very demanding in parameters such as resolution and overlay may be performed in a more advanced lithography tool Confidential than other layers that are less demanding. Therefore some layers may be exposed in an immersion type lithography tool, while others are exposed in a ‘dry’ tool. Some layers may be exposed in a tool working at DUV wavelengths, while others are exposed using EUV wavelength radiation. [0036] At 202, alignment measurements using the substrate marks P1 etc. and image sensors (not shown) are used to measure and record alignment of the substrate relative to substrate table WTa/WTb. In addition, several alignment marks across the substrate W’ will be measured using alignment sensor AS. These measurements are used in one embodiment to establish a “wafer grid”, which maps very accurately the distribution of marks across the substrate, including any distortion relative to a nominal rectangular grid. [0037] At step 204, a map of wafer height (Z) against X-Y position is measured also using the level sensor LS. Conventionally, the height map is used only to achieve accurate focusing of the exposed pattern. It may be used for other purposes in addition. [0038] When substrate W’ was loaded, recipe data 206 were received, defining the exposures to be performed, and also properties of the wafer and the patterns previously made and to be made upon it. To these recipe data are added the measurements of wafer position, wafer grid and height map that were made at 202, 204, so that a complete set of recipe and measurement data 208 can be passed to the exposure station EXP. The measurements of alignment data for example comprise X and Y positions of alignment targets formed in a fixed or nominally fixed relationship to the product patterns that are the product of the lithographic process. These alignment data, taken just before exposure, are used to generate an alignment model with parameters that fit the model to the data. These parameters and the alignment model will be used during the exposure operation to correct positions of patterns applied in the current lithographic step. The model in use interpolates positional deviations between the measured positions. A conventional alignment model might comprise four, five or six parameters, together defining translation, rotation and scaling of the ‘ideal’ grid, in different dimensions. Advanced models are known that use more parameters. [0039] At 210, wafers W’ and W are swapped, so that the measured substrate W’ becomes the substrate W entering the exposure station EXP. In the example apparatus of Figure 1, this swapping is performed by exchanging the supports WTa and WTb within the apparatus, so that the substrates W, W’ remain accurately clamped and positioned on those supports, to preserve relative alignment between the substrate tables and substrates themselves. Accordingly, once the tables have been swapped, determining the relative position between projection system PS and substrate table WTb (formerly WTa) is all that is necessary to make use of the measurement information 202, 204 for the substrate W (formerly W’) in control of the exposure steps. At step 212, reticle alignment is performed using the mask alignment marks M1, M2. In steps 214, 216, 218, scanning motions and radiation pulses are applied at successive target locations across the substrate W, in order to complete the exposure of a number of patterns. Confidential [0040] By using the alignment data and height map obtained at the measuring station in the performance of the exposure steps, these patterns are accurately aligned with respect to the desired locations, and, in particular, with respect to features previously laid down on the same substrate. The exposed substrate, now labeled W” is unloaded from the apparatus at step 220, to undergo etching or other processes, in accordance with the exposed pattern. [0041] The skilled person will know that the above description is a simplified overview of a number of very detailed steps involved in one example of a real manufacturing situation. For example rather than measuring alignment in a single pass, often there will be separate phases of coarse and fine measurement, using the same or different marks. The coarse and/or fine alignment measurement steps can be performed before or after the height measurement, or interleaved. [0042] A lithographic apparatus or scanner requires regular maintenance actions, for example to replace hardware components which are subject to degradation over time. By way of a specific example, the wafer table of a scanner degrades and requires periodic replacement. Such hardware swaps and/or maintenance actions, can result in a performance impact. [0043] Such a performance impact is conceptually illustrated in Figure 3. Overlay is an important parameter which describes the proper placement of a layer with respect to a previously exposed (lower) layer. Each wafer table imposes a wafer clamping impact or clamping fingerprint on a substrate clamped thereto, which should be corrected for. However, as a wafer table wears over time, the associated wafer clamping impact is affected (typically becoming greater) which will affect the positioning of exposed structures on the substrate. As such, the degradation of the wafer table (and other components) will lead to positional errors; these errors can be divided into lower frequency errors or correctable errors (CEs), which may be measured (using a suitable metrology tool) and corrected for within the scanner via a process correction loop (e.g., as known as the advanced process corrections or APC loop), and higher frequency errors or non-correctable errors (NCEs) which cannot be corrected via APC either because the effect of the errors cannot be measured using sufficiently fast metrology, captured by the models used to represent the metrology data and/or because the required corrections cannot be actuated within the scanner. [0044] Without a wafer table swap, the wafer clamping impact changes sufficiently slowly such that there is essentially no significant change between exposures of different layers on a single wafer. Because overlay is a relative measure between two layers, NCEs resulting from this impact in each layer largely cancel themselves out. Referring to Figure 3(a), the lines for the first layer L1 and second layer L2 represent a high frequency component of wafer grid impact of a degraded wafer table. Although this degradation results in a relatively large magnitude disturbance of the local placement of features in each exposure layer, these disturbances are typically sufficiently similar in each layer and cancel themselves out in overlay (i.e., the positional errors are the same in each layer meaning that misalignment between layers due to this effect is relatively small). Therefore, overlay NCEs due to this wafer table fingerprint in each layer will be small. By contrast, Figure 3(b) Confidential conceptually illustrates the situation should there be a wafer table swap between exposure of layer L1 and L2. The new table results in an overall smaller wafer grid impact due to wafer table imperfection; however the impact of the old table is present in the layer L1 exposure. Therefore, there is no longer a cancelling out of this impact, resulting in a significantly larger NCE overlay penalty. This may cause an APC non-correctable jump due to the difference in these fingerprints, which may be sufficiently large to affect yield (the fact that the errors are non-correctable means that these wafers cannot be recovered via rework). [0045] This overlay penalty due to hardware maintenance during wafer processing (i.e., between exposing different layers on a wafer) is often referred to as a wafer-in-process (WIP) impact. One strategy to mitigate this WIP impact, is to “ramp-down” the exposure of a number of layers in the run- up to such a maintenance action, so as to reduce the number of wafers in progress (wafers with only some of the required layers exposed) at the time of the action. Such a ramp-down typically comprises the ceasing of exposure of one or more layers in the weeks leading up to the maintenance action, e.g., ceasing exposure of each layer in turn from the bottom layer, at intervals of a few days to a couple or few weeks between the ramping down of each successive layer. It may be that not all layers are ramped down. This ramping down of layers represents a loss of productivity with respect to continuing wafer production at the rate prior to beginning ramp-down. [0046] In addition to a ramp-down impact, there will be an accompanying ramp-up impact (i.e., in comparison to full production rate) when production restarts following the maintenance action. For example, there is a need to restart production for each layer ramped down layer before production of layers higher in the stack can be started. [0047] The wafer table reconditioning/swap will also cause a sudden change in CE. APC has the potential to correct for this sudden change, but it is too slow as there is no (or insufficient) metrology data for the post-maintenance system, at least for an initial number of lots. To address this, the correction loop or APC loop may be restarted and/or recalibrated, which takes time and therefore results in a production delay. As an alternative, production may be continued without such a recalibration; however, this typically results in exposures that are out-of-specification. As such, many of the first wafers in progress that are exposed post-maintenance action will be exposed out-of-spec and therefore will require reworking (stripped of the poorly exposed resist, re-covered and re- exposed). [0048] The method of predicting an effect of a potential substrate table maintenance action (e.g., CE jump prediction) disclosed herein may be used to help in deciding on one of these strategies (i.e., restart/recalibrate the control loop or incur a rework penalty in not doing so) and/or any alternative strategies, e.g., scheduling small send-ahead lots for a smart calibration, such that the calibration may be tuned to a known issue. [0049] The combination of this ramp-down and ramp-up time leads to what is often referred to as C- time: the time impact of these ramp-down and ramp-up periods with respect to no ramp-up or ramp- Confidential down. C-time is additional to A-time (the nominal downtime for the actual maintenance action) and B-time (a margin applied to the A-time). [0050] Figure 4 is a plot of the cumulative number of lots #lots against time showing production rate for a production period (solid line) which includes a ramp-down period, maintenance action and ramp-up period. The A+B time is the period of the actual maintenance action including margin, during which productivity is nil (machine down-time). The dotted line represents a nominal production rate had there been no ramp-down or ramp-up time, and production continued at a constant rate till the maintenance action and again immediately on recommencing production after the action. C-time is the time difference between the two plots after completion of ramp-up and production has reached an approximately steady rate. It may be appreciated that C-time is typically much greater than A+B-time, more so than illustrated in this plot. [0051] Wafer load grid (WLG) is a wafer distortion, typically described in terms of a distortion in overlay, related to unflatness of the substrate (wafer) during clamping and finite friction coefficient between burls and substrate. Burls are projections on the substrate support (wafer table) on which the substrate is supported. A perfect loading of a substrate onto a substrate support implies that no strain remains in the loaded substrate once it fully lies on (and is clamped to) the plurality of burls. Any strain locked into the substrate may deform the substrate in the XY plane and thereby cause overlay errors. Local sliding of the substrate may take place when loading the substrate onto the substrate support. The residual deformations in the substrate caused by this local sliding contributes to the overlay error. The WLG induced error metric is a metric for quantifying the (correctable) error introduced by this deformation. [0052] Wafer clamping may comprise a sequence of wafer loading from e-pins to the substrate holder or wafer table. Such a process may comprise carrying the substrate on the e-pins downward to the substrate table, when the substrate contacts the substrate holder, it is clamped on the substrate holder (e.g., by vacuum or electrostatically depending on the scanner type) such that stresses are locked into the substrate. [0053] The physical properties of a wafer depend on the product and layer. The WLG causes an average-wafer deformation typically comprising a donut shape. This average-wafer deformation is mainly a correctable error (CE), which is corrected partly via alignment corrections (e.g., higher-order alignment modeling). The residual CE after alignment correction is addressed through process corrections such as the aforementioned APC control loop. WLG also causes a wafer-to-wafer deformation that is not correctable by any correction mechanism, i.e., this represents a non-correctable error (NCE). As the wafer table condition worsens over time, the NCE increases until the resultant on- product overlay (OPO) error becomes too large, with a resultant impact on yield. [0054] To prevent yield loss, a maintenance action may be periodically performed to replace or recondition the wafer table. As has already been described, the wafer table swap will have a consequent WIP impact because the process corrections will not match the re-conditioned wafer table. Confidential Either the process corrections are reset and re-calibrated or the process corrections are automatically recovered. Reset and recalibration of the process corrections leads to significant C-time (on the order of days or weeks) and a significant related human effort. Automatically recovering the process corrections causes the initial lots to suffer from OPO errors and typically requires them to be reworked until the OPO is within specification. [0055] The concepts disclosed provide a method, based on measurements made prior to a maintenance action (e.g., wafer table recondition/replacement) to predict at least one parameter of interest jump magnitude caused by the maintenance action. This provides information for optimizing the moment for performing the maintenance action and to plan potential post-maintenance action actions. [0056] The parameter of interest may be a substrate loading distortion induced error metric (e.g., a WLG induced error metric) which is dependent on the WLG. For example, the WLG induced error metric may be the (e.g., overlay) CE content resultant from the WLG, although other WLG dependent metrics are possible. [0057] In an embodiment, the method may predict two CE jump magnitudes. The first CE jump is a consequence of a wafer having a present layer (i.e., a target layer or last exposed layer) exposed on a reconditioned/replaced wafer table, but where its zero layer was exposed on the wafer table prior to the maintenance action (e.g., the zero layer and present layer being effectively exposed on different wafer tables, a worn table and a good table). The second CE jump is a consequence of both zero layer and present layer again being again exposed on a common wafer table, e.g., the reconditioned/replaced wafer table, this jump being determined with respect to the CE value resultant from the first jump. As such, the first jump may be a jump in a first direction (e.g., to a relatively large CE value due to the difference in wafer table between zero layer and present layer exposure) and the second jump may be a jump in the reverse direction (e.g., to a typically very small CE value, such as smaller than the CE value before the maintenance action, due to zero layer and present layer exposure both being performed on a reconditioned and good condition wafer table). A jump may describe a sudden, relatively large change in the measured substrate loading distortion induced error metric or CE value over a short period of time, indicative of a sudden change. [0058] The method disclosed herein may be used to determine an impact of an immediate maintenance action. In doing this, a model may be used to predict the WLG induced error metric based on the WLG status (substrate loading distortion status) of each wafer (or group of wafers, such as held by a cassette or FOUP (Front Opening Unified Pod)) at moment of its present-layer exposure (e.g., the layer just exposed on that wafer) and associated WLG sensitivities for this present-layer, and the WLG status of each wafer (or group of wafers) at moment of its zero layer exposure, and associated WLG sensitivities for this zero layer. The WLG sensitivities (or substrate loading distortion induced error metric sensitivities) may describe a per-layer sensitivity of the WLG induced error metric to the WLG status. Confidential [0059] Figure 5 is a flow diagram describing a method for determining a substrate loading distortion induced error metric or WLG induced error metric (e.g., an overlay impact and more specifically a correctable overlay impact resulting from the WLG), and in particular the magnitude of any change (e.g., a jump) in the WLG induced error metric resulting from a substrate table maintenance action or wafer table maintenance action, such as a wafer table swap or reconditioning. In particular, the method may comprise determining two jumps or abrupt changes due to such a substrate table maintenance action. [0060] The method may use input data DATIN comprising: [0061] measured absolute WLG status data (or substrate loading distortion status data) 500 describing the absolute WLG status of the system (e.g. for example as may be quantified by measuring an overlay difference between reference wafers which are respectively sensitive and insensitive to the WLG or any other suitable method). [0062] Layer timings 505; e.g., the times/dates that each layer (or at least the zero layer and target layer or last exposed layer) is exposed per wafer or group of wafers (e.g., per FOUP). [0063] On-product metrology data or derived data, derived from the on-product metrology data 510. Such on-product metrology data may comprise alignment data (e.g., fine wafer alignment measurement FIWA data) or correction data (e.g., per-exposure correction data) derived therefrom. Alternatively, on-product metrology data may comprise on-product overlay data. Such on-product metrology data enables the monitoring of the on-product magnitude of a corrected typical WLG shape (before re-conditioning and/or for monitoring before and after reconditioning for sensitivity calibration purposes). The typical WLG shape is known to comprise a ring or donut shape, and as such a suitable WLG shape model 515 may be used to extract or isolate the on-product WLG contribution. [0064] As such, the on-product metrology data 510 and typical WLG shape model 515 may be used to obtain 520 on-product WLG induced error metric data 525 (e.g., on-product WLG CE metric data describing the WLG contribution to the metrology data 510, or WLG CE content). The on-product WLG contribution can be isolated from the on-product metrology data 510 using the WLG shape model 515. Better isolation may be achieved by using alignment data or derived correction data, as it is more difficult to distinguish the on-product WLG contribution from other (process) effects, compared to using on-product-overlay data. The on-product metrology data 510 may relate only to a time range relating to a substrate table maintenance action, e.g., to comprise only jump data (e.g., relating to the first and second jumps). This requires a data range over a time period during which a maintenance action has been done. However, calibration step S3 (to be described below) can also be performed using pre- maintenance action data. In this case a more complicated layer-to-layer model is applied. The advantage of this is that the prediction can be done prior to any maintenance action having been performed for a certain layer. Confidential [0065] The proposed prediction method WLG PRED uses the input data DATIN to make CE jump predictions, e.g., based on the insight that there is in-resist propagation of the WLG shape during stack build-up; i.e. the CE is a layer-to-layer error. It does not only depend on the WLG deterioration when clamping the wafer to expose the current layer, but also on the in-resist WLG shape that is already present on the wafer due to exposure of earlier layers. [0066] At step S1, the absolute WLG status metric 500 is used to determine per-date WLG status metric data 530 (e.g., a WLG status drift curve). [0067] At step S2, the WLG status at the moment of exposure of each individual wafer or group of wafers (e.g., per FOUP) is determined 535. This needs to be done for the prediction’s target layer (e.g., the current layer or layer last exposed) and for its zero layer (i.e., the first exposed layer), yielding respectively current layer per-wafer/FOUP, per-date WLG status data 540 and zero layer per- wafer/FOUP, per-date WLG status data 545. [0068] Information on both the target layer and zero layer is used because the observed typical WLG fingerprint on a clamped wafer is the sum of: the wafer deformation due to clamping the wafer for exposure of target layer N, depending on the wafer table’s WLG status at the time of layer-N exposure and the in-resist pattern on the wafer due to wafer deformation at the time of exposure of the zero layer. A reason for this is that the zero layer will be exposed without alignment corrections (as there are no alignment marks to measure) and therefore the WLG will be imprinted into the layer. [0069] At step S3, the WLG sensitivities 555 are calibrated 550 respectively for the target layer and zero layer. The combination of wafer table roughness and wafer backside roughness determine the WLG effect. Since different layers in the stack will have different wafer backside properties, the sensitivities due to WLG may differ per layer. In a simpler example, these sensitivities may be estimated from earlier calibrated layers that have similar physical wafer (backside) properties. [0070] At step S4, the calibrated sensitivities 555, the WLG status at moment of zero layer exposure, and the current WLG status are input to a layer-to-layer model 560. By way of example, the model 560 may take the form: ^_{^^^^^^^^^^^ = ^^ ∗ ^^^^^^^ − ^^ ∗ ^^^^^^^ [^^ 1]} [0071] where ^^^_^^^^^^^^^ is the predicted CE content due to WLG in the metrology data or process corrections, ^_^, ^_^ are the sensitivities respectively of the zero layer and target layer N and ^^^^^_^^, ^^^^^_^^ is the WLG status at time ^_^ of exposing target layer N and at time ^_^ of exposing the zero layer on the same wafer. [0072] At step S5, the layer-to-layer model 560 may be used to predict 565 the ∆CE jumps 570, should the wafer table be replaced/reconditioned at this moment. For CE jump prediction after a maintenance action, the future ^^^^^_^^ and ^^^^^_^^ after the maintenance action should be predicted. In one example, this prediction may be assume that the WLG content for all times (in the Confidential relevant timeframe) after the maintenance action is zero (no WLG effect for some time after the maintenance action). As has already been mentioned, two jumps will be predicted. The first jump because target layer N is exposed after the maintenance action but the zero layer still was exposed before the maintenance action. The second jump is due to the zero layer also being exposed on a good wafer table (all the wafers having previously had its zero layer exposed on the old wafer table having now been processed). [0073] In an embodiment, step S5 may comprise determining the ^^^_^^^^^^^^^ immediately before _{the maintenance action as ^^ ∗ ^^^^^^^ − ^^ ∗ ^^^^^^^, and immediately after the maintenance} _{action as ^^ ∗ 0 − ^^ ∗ ^^^^^^^ for all wafers having had its zero layer exposed on the old wafer} table. As such, this approach assumes that the WLG is zero immediately after the maintenance action. The first jump ∆^^^_{^^^^^^^^^^^^^} may be defined as the difference of these values; i.e.,: ∆_{^^^^^^^^^^^^^^^^ = −^^ ∗ ^^^^^^^ [Eq. 2]} [0074] The second jump ∆^^^_{^^^^^^^^^^^^^!} is applicable to a time when all the wafers having had a zero layer exposed on the old table have now also had the target layer exposed thereon, such that that all subsequent wafers now having a target layer exposed thereon have had their zero layer also exposed on the new table. ∆^^^_{^^^^^^^^^^^^^!} may be defined as the difference between the _{^^^^^^^^^^^^ immediately after the maintenance action, defined as ^^ ∗ 0 − ^^ ∗ ^^^^^^^ and zero;} i.e., ∆_{^^^^^^^^^^^^^^^^! = ^^ ∗ ^^^^^^^ [Eq. 3]} [0075] That the second term is assumed to be zero is because it is assumed that the WLG is zero for both the zeroth layer and layer N as both are now exposed on the good table. [0076] It can be appreciated than in an implementation of this concept it may be assumed that ^_^ = ^_^, e.g., such that each represents the “present day” in each of the first and second jump determinations (e.g., where both layer N and the zero layer were exposed just before the maintenance action for the determination of both jumps). [0077] In other embodiments, the real timings of the exposed layers may be used. For example, an embodiment may comprise using real timing of zero layer exposure date pre-maintenance action instead of assuming all zero layers of Wafers In Process (WIP) were exposed at a single time t0; e.g., immediately before the maintenance action. This has the advantage of enabling suppression of the first and second jump effects by smarter scheduling of the wafer batches such that not all wafer batches will have the same ∆CE. Having the ∆CE predictions per batch makes it possible to schedule batches such that the impact on APC is minimized. A further advantage is that it provides the Confidential potential to detect and quantify post- maintenance action ‘local jumps’ due to wafers/FOUPs having different WLG properties (e.g.,. having its zero layer being exposed pre- or post- maintenance action) being scheduled in mixed sequence. [0078] Alternatively or in addition, the proposed methods may include real timing of the present layer exposure dates instead of assuming all Wafers In Process (WIP) were exposed at a single “present” date. For example, where both zero layer and target layer real timing is used, it is possible to predict/identify local jumps (e.g., abrupt WIP metric changes over substrate batches) that are not related to wafer table maintenance, but due to batch scheduling. Such an approach may use a combined model for the zero layer and target layer. An application may be to detect wafers that are more likely to require reworking, e.g., because they have bad corrections due to a local jump. Another advantage may comprise the fine tuning of the second jump prediction by incorporating WLG drift measurement after maintenance (it is assumed to be zero when predicting the second jump). Also this may be used for smarter batch scheduling or for more accurately detecting wafers that are more likely to require working. [0079] The layer sensitivities may be calibrated (e.g., at step S3 above) using substrate loading distortion data 500 and substrate loading induced error metric data 525 corresponding to a time period that includes the relevant post-maintenance action jump. For example, the sensitivities may be determined by substitution of this data into the Equation 2 or Equation 3 above. The jump ∆^^^_{^^^^^^^^^^^^^} or ∆^^^_{^^^^^^^^^^^^^!} may be calculated by averaging a pre-jump and a post-jump group of wafers in order to obtain a required accuracy. Alternatively the sensitivities can be calibrated using the substrate loading distortion data 500 and substrate loading induced error metric data 525 of a pre-maintenance action time range. This allows the calculation of the sensitivities of the active layer and zero layer using Equation 1 above. It can be appreciated that the substrate loading distortion data typically has a sigmoid shape in time. In practice it may be necessary to deal with any (non-WLG) offsets in the data. For this it may help to have reference data covering a period with no WLG error. [0080] Figure 6 is a plot of WLG against time for a wafer or group/FOUP illustrating the concepts described above. At time ^_^, the zero layer is exposed, imparting a shape WLGL0 on the wafer. This shape remains present in subsequent layers, as indicated by the dotted line, such that the total WLG for each subsequent layer is the sum of WLGL0 and an additional WLG impact of the subsequent layer(s). At a later time, a first layer may be exposed on the zero layer at time t1. The additional WLG impact is additional to the zero layer impact WLGL0. This additional WLG impact is mostly correctable error and therefore can be addressed via alignment and APC correction CORR1. Note that the WLGL0 component does not require correction as it is present in both layers and largely cancels out (as described in relation to Figure 3). At a time tN, which is immediately before a maintenance action is performed at time tMA, a further (target) layer is exposed, imposing a further WLG impact Confidential on top of shape WLGL0, describing a WLG correctable error, for which corrections CORRN are determined. [0081] At a time t>MA, after the maintenance action MA, layer N is exposed on the new/refurbished wafer table (having zero WLG), on a wafer having had the zero layer exposed on the old wafer table. The resultant corrections CORR’N, and therefore correctable error are determined with respect to the zero layer WLG imparted by the old wafer table to minimize overlay. This results in the first jump in the correctable error, comprising a magnitude of the difference of the respective magnitudes of corrections CORRN and corrections CORR’N. [0082] At a yet later time t>>MA, when both zero layer and target layer are exposed on a good table, there will be a second jump as now the WLG is effectively zero for both layers. [0083] The above concepts are described in relation to determining a CE jump. However, it can also be appreciated that wafer-to-wafer NCE will cause a post-maintenance action jump in NCE. Such NCE jumps may be predicted in a similar way as the CE jumps. The NCE jump prediction may be relevant to determine applicability of a WIPless maintenance action strategy for example. For NCE jump prediction the 'bottom layer' (i.e., the layer being aligned to) is relevant, instead of the zero layer. [0084] The different aspects of the invention are described in the following clauses: 1. A method of predicting an effect of a potential substrate table maintenance action relating to a substrate table of a lithographic apparatus, the method comprising: obtaining per-layer substrate loading distortion status data relating to a distortion of a substrate or group of substrates resulting from loading the substrate onto said substrate table when exposing one or more layers; obtaining at least one per-layer sensitivity value describing a sensitivity of a substrate loading distortion induced error metric to said substrate loading distortion status data for one or more respective layers on said substrate; and determining the effect of a potential substrate table maintenance action on said substrate loading distortion induced error metric based on said per-layer substrate loading distortion status data and said at least one per-layer sensitivity value. 2. A method as set out in clause 1, wherein: said per-layer substrate loading distortion status data comprises at least target layer substrate loading distortion status data corresponding to a time of exposure of a target layer on the substrate; and said at least one per-layer sensitivity value comprises at least one target layer sensitivity value describing a sensitivity of the substrate loading distortion induced error metric to said target layer substrate loading distortion status data. 3. A method as set out in clause 2, wherein, in said step of determining the effect of a potential substrate table maintenance action, said target layer substrate loading distortion status data is assumed to be zero for said at least one time subsequent said maintenance action. Confidential 4. A method as set out in clause 2 or 3, wherein said target layer comprises the layer last exposed on each substrate. 5. A method as set out in any of clauses 2 to 4, comprising determining said effect from at least a first product comprising a product of said target layer substrate loading distortion status data and said at least one target layer sensitivity value. 6. A method as set out in any of clauses 2 to 5, wherein: said per-layer substrate loading distortion status data comprises at least zero layer substrate loading distortion status data corresponding to a time of exposure of a zero layer on the substrate, the zero layer being the first layer exposed on said substrate; and said at least one per-layer sensitivity value comprises at least one zero layer sensitivity value describing a sensitivity of the substrate loading distortion induced error metric to said zero layer substrate loading distortion status data. 7. A method as set out in clause 6, wherein, in said step of determining the effect of a potential substrate table maintenance action, said zero layer substrate loading distortion status data is assumed to be zero for substrates having had its zero layer exposed thereon when supported by said substrate table subsequent to performance of said maintenance action. 8. A method as set out in clause 6 or 7, comprising determining said effect from at least a second product comprising a product of said zero layer substrate loading distortion status data and said at least one zero layer sensitivity value. 9. A method as set out in a combination of clauses 5 and 8, wherein said method comprises determining a per-layer model for at least the target layer and zero layer, the per-layer model describing said substrate loading distortion induced error metric in terms of a combination of the first product and second product. 10. A method as set out in clause 9, wherein said combination of the first product and second product comprises a difference of said first product and second product. 11. A method as set out in clause 9 or 10, comprising using said model to estimate said substrate loading distortion induced error metric at a point before said maintenance action and/or at least one time subsequent said maintenance action. 12. A method as set out in clause 11, comprising assuming that the substrate loading distortion status is zero for any layer exposed on said substrate table subsequent to performance of said maintenance action. 13. A method as set out in any preceding clause, wherein said effect comprises at least a first jump in said substrate loading distortion induced error metric. 14. A method as set out in any preceding clause, wherein said effect comprises at least a first jump and a second jump in said substrate loading distortion induced error metric. 15. A method as set out in any preceding clause, comprising: Confidential obtaining substrate loading distortion status data over time and relating to a distortion of a substrate or group of substrates resulting from loading the substrate onto said substrate table; obtaining timing data describing the times of exposures of different layers on the substrate or group of substrates; and correlating the substrate loading distortion status data with the timing data to obtain said per-layer substrate loading distortion status data. 16. A method as set out in clause 15, comprising assuming a single exposure time for each layer exposure of a batch of substrates, respectively for one or more of said layers. 17. A method as set out in clause 15, comprising using real timing data for each layer exposure over a batch of substrates, respectively for one or more of said layers. 18. A method as set out in any preceding clause, wherein said effect of a potential substrate table maintenance action on said substrate loading distortion induced error metric may comprise one or more jumps in said substrate loading distortion induced error metric relating to a correctable error component of on-product metrology data and/or corrections derived therefrom. 19. A method as set out in any of clauses 2 to 5, wherein: said per-layer substrate loading distortion status data comprises at least an aligned-to layer substrate loading distortion status data corresponding to a time of exposure of an aligned-to layer to which said target layer is being aligned to; and said at least one per-layer sensitivity value comprises at least one aligned-to layer sensitivity value describing a sensitivity of the substrate loading distortion induced error metric to said aligned-to layer substrate loading distortion status data. 20. A method as set out in clause 19, wherein said effect of a potential substrate table maintenance action on said substrate loading distortion induced error metric may comprise one or more jumps in said substrate loading distortion induced error metric relating to a non-correctable error component of on-product metrology data and/or corrections derived therefrom. 21. A method as set out in any of clauses 1 to 18, comprising determining said at least one per- layer sensitivity value from a correctable error component extracted from on-product metrology data and/or corrections derived therefrom. 22. A method as set out in clause 21, wherein said on-product metrology data and/or corrections derived therefrom comprise alignment data and/or per-exposure positional corrections derived therefrom. 23. A method as set out in clause 21 or 22, wherein said correctable error component is extracted from said on-product metrology data and/or corrections derived therefrom by application of a model having an expected shape for the substrate loading distortion on said substrate. 24. A method as set out in any of clauses 1 to 17, comprising using a respective assumed or predicted value for each of said at least one per-layer sensitivity value. Confidential 25. A method as set out any preceding clause, comprising scheduling a maintenance action based on the determined effect of the potential substrate table maintenance action. 26. A method as set out any preceding clause, comprising: deciding on a post-maintenance action strategy based on the determined effect of the potential substrate table maintenance action. 27. A method as set out in clause 26, wherein potential post-maintenance action strategies may include restarting and/or recalibrating a control loop, not restarting and/or recalibrating the control loop or any alternative strategy. 28. A computer program comprising program instructions operable to perform the method of any of clauses 1 to 27, when run on a suitable apparatus. 29. A non-transient computer program carrier comprising the computer program of clause 28. 30. A processing system comprising a processor and a storage device comprising the computer program of clause 28. 31. A lithographic apparatus comprising the processing system of clause 30. [0085] While specific embodiments of the invention have been described above, it will be appreciated that the invention may be practiced otherwise than as described. [0086] Although specific reference may have been made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention may be used in other applications, for example imprint lithography, and where the context allows, is not limited to optical lithography. In imprint lithography a topography in a patterning device defines the pattern created on a substrate. The topography of the patterning device may be pressed into a layer of resist supplied to the substrate whereupon the resist is cured by applying electromagnetic radiation, heat, pressure or a combination thereof. The patterning device is moved out of the resist leaving a pattern in it after the resist is cured. [0087] The terms “radiation” and “beam” used herein encompass all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g., having a wavelength of or about 365, 355, 248, 193, 157 or 126 nm) and extreme ultra-violet (EUV) radiation (e.g., having a wavelength in the range of 1-100 nm), as well as particle beams, such as ion beams or electron beams. [0088] The term “lens”, where the context allows, may refer to any one or combination of various types of optical components, including refractive, reflective, magnetic, electromagnetic and electrostatic optical components. Reflective components are likely to be used in an apparatus operating in the UV and/or EUV ranges. [0089] The breadth and scope of the present invention should not be limited by any of the above- described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents. Confidential

Claims

CLAIMS 1. A method of predicting an effect of a potential substrate table maintenance action relating to a substrate table of a lithographic apparatus, the method comprising: obtaining per-layer substrate loading distortion status data relating to a distortion of a substrate or group of substrates resulting from loading the substrate onto said substrate table when exposing one or more layers; obtaining at least one per-layer sensitivity value describing a sensitivity of a substrate loading distortion induced error metric to said substrate loading distortion status data for one or more respective layers on said substrate; and determining the effect of a potential substrate table maintenance action on said substrate loading distortion induced error metric based on said per-layer substrate loading distortion status data and said at least one per-layer sensitivity value.

2. A method as claimed in claim 1, wherein: said per-layer substrate loading distortion status data comprises at least target layer substrate loading distortion status data corresponding to a time of exposure of a target layer on the substrate; and said at least one per-layer sensitivity value comprises at least one target layer sensitivity value describing a sensitivity of the substrate loading distortion induced error metric to said target layer substrate loading distortion status data.

3. A method as claimed in claim 2, wherein, in said step of determining the effect of a potential substrate table maintenance action, said target layer substrate loading distortion status data is assumed to be zero for said at least one time subsequent said maintenance action.

4. A method as claimed in claim 2 or 3, wherein said target layer comprises the layer last exposed on each substrate.

5. A method as claimed in any of claims 2 to 4, comprising determining said effect from at least a first product comprising a product of said target layer substrate loading distortion status data and said at least one target layer sensitivity value.

6. A method as claimed in any of claims 2 to 5, wherein: said per-layer substrate loading distortion status data comprises at least zero layer substrate loading distortion status data corresponding to a time of exposure of a zero layer on the substrate, the zero layer being the first layer exposed on said substrate; and Confidential said at least one per-layer sensitivity value comprises at least one zero layer sensitivity value describing a sensitivity of the substrate loading distortion induced error metric to said zero layer substrate loading distortion status data.

7. A method as claimed in claim 6, wherein, in said step of determining the effect of a potential substrate table maintenance action, said zero layer substrate loading distortion status data is assumed to be zero for substrates having had its zero layer exposed thereon when supported by said substrate table subsequent to performance of said maintenance action.

8. A method as claimed in claim 6 or 7, comprising determining said effect from at least a second product comprising a product of said zero layer substrate loading distortion status data and said at least one zero layer sensitivity value.

9. A method as claimed in a combination of claims 5 and 8, wherein said method comprises determining a per-layer model for at least the target layer and zero layer, the per-layer model describing said substrate loading distortion induced error metric in terms of a combination of the first product and second product.

10. A method as claimed in any preceding claim, wherein said effect comprises at least a first jump and a second jump in said substrate loading distortion induced error metric.

11. A method as claimed in any preceding claim, comprising: obtaining substrate loading distortion status data over time and relating to a distortion of a substrate or group of substrates resulting from loading the substrate onto said substrate table; obtaining timing data describing the times of exposures of different layers on the substrate or group of substrates; and correlating the substrate loading distortion status data with the timing data to obtain said per-layer substrate loading distortion status data.

12. A method as claimed in any of claims 1 to 11, comprising determining said at least one per- layer sensitivity value from a correctable error component extracted from on-product metrology data and/or corrections derived therefrom.

13. A method as claimed in claim 12, wherein said correctable error component is extracted from said on-product metrology data and/or corrections derived therefrom by application of a model having an expected shape for the substrate loading distortion on said substrate. Confidential

14. A method as claimed any preceding claim, comprising scheduling a maintenance action based on the determined effect of the potential substrate table maintenance action.

15. A method as claimed any preceding claim, comprising: deciding on a post-maintenance action strategy based on the determined effect of the potential substrate table maintenance action.

16. A method as claimed in claim 15, wherein potential post-maintenance action strategies may include restarting and/or recalibrating a control loop, not restarting and/or recalibrating the control loop or any alternative strategy.

17. A computer program comprising program instructions operable to perform the method of any of claims 1 to 16, when run on a suitable apparatus.

18. A processing system comprising a processor and a storage device comprising the computer program of claim 17.

19. A lithographic apparatus comprising the processing system of claim 18. Confidential