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WO2025079193A1 - Élément de réception de lumière à semi-conducteur, dispositif de terminaison de ligne optique, dispositif d'émission/réception à modulation d'intensité à valeurs multiples, dispositif de réception cohérente numérique, système de radio sur fibre, système de capteur spad et dispositif lidar - Google Patents

Élément de réception de lumière à semi-conducteur, dispositif de terminaison de ligne optique, dispositif d'émission/réception à modulation d'intensité à valeurs multiples, dispositif de réception cohérente numérique, système de radio sur fibre, système de capteur spad et dispositif lidar Download PDF

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WO2025079193A1
WO2025079193A1 PCT/JP2023/036960 JP2023036960W WO2025079193A1 WO 2025079193 A1 WO2025079193 A1 WO 2025079193A1 JP 2023036960 W JP2023036960 W JP 2023036960W WO 2025079193 A1 WO2025079193 A1 WO 2025079193A1
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layer
type
receiving element
semiconductor light
light receiving
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Japanese (ja)
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栄太郎 石村
晴央 山口
亮太 竹村
大樹 坪内
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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  • This disclosure relates to semiconductor photodetectors, optical line termination devices, multilevel intensity modulation transceivers, digital coherent receivers, radio-over-fiber systems, SPAD sensor systems, and lidar devices.
  • Optical communication is used for communication networks and communication within data centers.
  • optical communication has made remarkable progress in increasing speed and capacity.
  • avalanche photodiodes which provide high receiving sensitivity, are used as optical communication receivers.
  • the greater the ratio of the ionization rates of electrons and holes the smaller the excess noise generated during multiplication and the higher the receiving sensitivity. Furthermore, the greater the ratio of the ionization rates of electrons and holes, the shorter the multiplication time in the multiplication layer, resulting in a wider bandwidth.
  • k ⁇ / ⁇ .
  • Compound semiconductor materials such as InAlAs or InP are used for the multiplication layer of APDs for optical communications.
  • InAlAs is selected as the material for the multiplication layer, the difference in the ionization rates of electrons and holes will be greater than in InP. Note that in InP, the ionization rate of holes is greater than that of electrons, and the ionization rate of holes is approximately twice that of electrons. On the other hand, if InAlAs is selected as the material for the multiplication layer, the ionization rate of electrons is greater than that of holes, and the ionization rate of electrons is approximately five times that of holes. Therefore, since the reception sensitivity is higher when InAlAs is used as the multiplication layer, InAlAs is more suitable than InP as the material for the multiplication layer of an APD.
  • APDs which are semiconductor light receiving elements, are required to have a wide response bandwidth and high receiving sensitivity.
  • APDs have a problem in that the time required for multiplication, that is, the multiplication time, becomes longer as the multiplication factor increases, resulting in a decrease in bandwidth at high multiplication factors.
  • APDs with a multiplication layer made of InAlAs, which is used in optical communications have a wider bandwidth than APDs made of other semiconductor materials, but when the multiplication factor is 6 or more, the bandwidth remains at around 20 GHz. In other words, there is a problem in that the bandwidth of around 37.5 GHz or more required for 50G-PON systems is difficult to achieve when conventional APDs are used.
  • the Optical Line Terminal i.e. the receiving device on the central office side
  • SOA Semiconductor Optical Amplifier
  • EML electro-absorption modulated laser diode
  • DSPs and SOAs consume very large amounts of power, which is a factor in increasing costs, and it is feared that the replacement of existing PON systems with 50G-PON systems will not progress.
  • transceivers are designed that incorporate expensive and power-hungry DSPs and SOAs into the ONU or OLT, but this creates problems such as increased power consumption and costs.
  • This disclosure has been made to resolve the above-mentioned problems, and aims to provide a semiconductor light-receiving element that has high reception sensitivity, a wide response band, and operates with low power consumption.
  • the semiconductor light receiving element comprises: An InP substrate; an n-type semiconductor layer formed on the InP substrate; a multiplication layer formed on the n-type semiconductor layer and having a digital alloy structure with a layer thickness of 40 nm or more and 170 nm or less; a p-type electric field buffer layer formed on the multiplication layer; an InGaAs light absorption layer formed on the p-type electric field buffer layer; Equipped with.
  • the optical line terminal comprises: The semiconductor light receiving element described above, an optical multiplexer/demultiplexer that inputs an optical signal to the semiconductor light receiving element; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; a clock data recovery circuit connected to the amplifier circuit and configured to recover clock data from the amplified electrical signal; a forward error correction circuit connected to the clock data recovery circuit for correcting an error in the clock data; Equipped with.
  • the radio-over-fiber system comprises: a light source that emits an analog modulated optical signal; The semiconductor light receiving element described above for receiving the analog-modulated optical signal; a transmission path for transmitting the analog electrical signal output from the semiconductor light receiving element to an antenna; an antenna connected to the transmission line and configured to radiate the analog electrical signal as a radio wave signal; Equipped with.
  • a digital coherent receiving device includes: The semiconductor light receiving element described above, a polarization splitter that splits the polarization of the intensity- and phase-modulated polarization multiplexed optical signal; a 90-degree hybrid that splits and combines the optical signals output from the polarization splitter; a digital signal processing circuit connected to the 90-degree hybrid device and processing a digital signal; Equipped with.
  • the SPAD sensor system comprises: A SPAD sensor constituted by the semiconductor light receiving element described above; a quenching circuit for repeatedly applying a voltage equal to or greater than a breakdown voltage and a voltage equal to or less than the breakdown voltage to the SPAD sensor; an optoelectronic measurement circuit for measuring an electrical signal output from the SPAD sensor; Equipped with.
  • the LIDAR device comprises: A light source that emits light in a pulsed manner; the semiconductor light receiving element described above for receiving light emitted from the light source and reflected by an object; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; a distance measuring circuit for calculating a distance based on the electrical signal amplified by the amplifier circuit; Equipped with.
  • optical line termination device multilevel intensity modulation transceiver device, digital coherent receiver device, optical fiber radio system, SPAD sensor system, and LIDAR device disclosed herein use the semiconductor light receiving element disclosed herein as the semiconductor light receiving element, and therefore have the effect of providing devices and systems with excellent performance.
  • FIG. 13 is a diagram showing the electric field dependence of the electron dead space in an InAlAs multiplication layer. 4A to 4C are diagrams showing the ionization rates of electrons and holes. FIG. 13 is a graph showing the dependence of the ionization rate ratio and the tunnel current on the thickness of the multiplication layer.
  • FIG. 6A to 6D are diagrams showing the ionization rates in the multiplication layer and the electric field relaxation layer, with FIG. 6A showing the ionization rate in the case of a random alloy structure multiplication layer, FIG. 6B showing the ionization rate in the case of a digital alloy structure multiplication layer, FIG. 6C showing the ionization rate in the case of a partially disordered digital alloy structure multiplication layer, and FIG. 6D showing the ionization rate in the case of a combination of a thick electric field relaxation layer and a digital alloy structure multiplication layer.
  • FIG. 1 is a diagram illustrating the configuration of a comparative example of an optical line terminal (ONU and OLT) of a 50G-PON system.
  • FIG. 1 is a diagram showing the configuration of an OLT in a 50G-PON system using a semiconductor photodetector according to a first embodiment.
  • FIG. 1 is a diagram showing the configuration of a 50G-PON system and an OLT/ONU as a comparative example.
  • FIG. 11 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a second embodiment.
  • FIG. 11 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a second embodiment.
  • FIG. 11 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a third embodiment.
  • FIG. 11 is a cross-sectional view showing the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element according to a fourth embodiment.
  • FIG. 13 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a fifth embodiment.
  • FIG. 13 is a cross-sectional view showing another element structure of a front-illuminated APD which is an example of a semiconductor light receiving element according to the fifth embodiment.
  • FIG. 13 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a sixth embodiment.
  • FIG. 13 is a cross-sectional view showing the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element according to a seventh embodiment.
  • FIG. 13 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a fifth embodiment.
  • FIG. 13 is a cross-sectional
  • FIG. 13 is a cross-sectional view showing the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element according to an eighth embodiment.
  • FIG. FIG. 13 is a diagram illustrating a configuration of a multilevel intensity modulation transmitting/receiving device according to a ninth embodiment.
  • 23A and 23B are diagrams illustrating received waveforms of a multilevel intensity modulation transmitting/receiving device according to embodiment 9.
  • FIG. 24A and 24B are diagrams for explaining the operation of a PD when a high optical input is applied.
  • FIG. 1 is a diagram illustrating the operation of an APD when a high optical input is applied.
  • FIG. 2 is a diagram showing the residence times of electrons and holes for each material constituting the multiplication layer.
  • FIG. 13 is a diagram illustrating a configuration of a radio-on-fiber system according to a tenth embodiment.
  • FIG. 1 illustrates a configuration of a radio-on-fiber system as a comparative example.
  • FIG. 30A is a diagram illustrating waveforms of a digital coherent receiving device that is a comparative example
  • FIG. 30B is a diagram illustrating waveforms of a digital coherent receiving device according to embodiment 11.
  • FIG. 23 is a diagram showing the configuration of a SAPD sensor system according to a twelfth embodiment.
  • FIG. 32A is a diagram showing waveforms of a SAPD sensor system which is a comparative example
  • FIG. 32B is a diagram showing waveforms of a SAPD sensor system according to embodiment 12.
  • FIG. 13 is a diagram showing the calculated difference between the quenching electric field and the Geiger mode electric field for each multiplication layer configuration.
  • FIG. 35A is a diagram showing a received waveform of an APD of a LIDAR device which is a comparative example
  • FIG. 35B is a diagram showing a received waveform of an APD of a LIDAR device according to embodiment 13.
  • Fig. 1 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element 100 according to the first embodiment.
  • Fig. 2 is a cross-sectional view showing the element structure of an edge-illuminated APD, which is an example of a semiconductor light-receiving element 110 according to the first embodiment.
  • the semiconductor light receiving element 100 comprises an n-type InP substrate 1, an n-type InAlAs buffer layer 2 having a carrier concentration of 1 to 5 ⁇ 10 cm and a layer thickness of 0.1 to 1.0 ⁇ m, which are successively formed on the n-type InP substrate 1, an InAlAs multiplication layer 3 (hereinafter referred to as an InAlAs digital alloy structure multiplication layer 3, and may also be abbreviated as a DA multiplication layer) having a digital alloy structure in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated a plurality of times, and
  • the n-type InP substrate 1 is made up of a p-type InP electric field relaxation layer 4 having a thickness of 10 to
  • the number of atomic layers in each layer of the InAlAs digital alloy structure multiplication layer 3 is preferably 2 to 4 atomic layers, with 2 atomic layers being optimal. The reason for this is that the thinner the atomic layer thickness of each layer is, the greater the effect of reducing the ionization rate ratio k due to the digital alloy structure.
  • the InAlAs digital alloy structure multiplication layer 3 may be stacked by alternately forming InAs layers and AlAs layers in that order.
  • the InAlAs digital alloy structure multiplication layer 3 has an i-type conductivity and an example of a carrier concentration of 1 ⁇ 10 17 cm ⁇ 3 or less. However, the InAlAs digital alloy structure multiplication layer 3 may have a p-type or n-type conductivity with a carrier concentration of 5 ⁇ 10 18 cm ⁇ 3 or less.
  • the thickness of the InAlAs digital alloy structure multiplication layer 3 is preferably in the range of 40 nm to 170 nm. However, considering the typical degree of variation in layer thickness during the manufacture of the semiconductor light receiving element 100 of 20%, the thickness of the InAlAs digital alloy structure multiplication layer 3 is preferably in the range of 50 nm to 140 nm.
  • an InAlGaAs digital alloy structure in which InAlyGa(1-y)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Y) and InAlzGa(1-z)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Z) are alternately stacked can also be applied as the multiplication layer of this disclosure.
  • a digital alloy structure made of InAlAsSb, a material system containing antimony (Sb) can also be applied as the multiplication layer of this disclosure.
  • the p-type InP electric field buffer layer 4 preferably has a carrier concentration of 0.1 to 50 ⁇ 10 cm and a layer thickness in the range of 10 nm to 70 nm.
  • Examples of p-type dopants for the p-type InP electric field buffer layer 4 include beryllium (Be), zinc (Zn), and carbon (C).
  • the electric field relaxation layer does not necessarily have to be made of p-type InP.
  • the electric field relaxation layer may be a p-type InAlAs digital alloy structure or a p-type InAlAs random alloy structure.
  • the dopant contained in the p-type InP electric field relaxation layer 4 diffuses into the adjacent InAlAs digital alloy structure multiplication layer 3, the digital alloy structure may become disordered and may change to a random alloy structure of InAlAs.
  • the InAlAs digital alloy structure multiplication layer 3 has a thin layer thickness of about 100 nm, it may be significantly affected by disorder caused by dopant diffusion.
  • a layer made of InAlGaAs or InGaAsP having an intermediate band gap between the i-type InGaAs light absorption layer 5 and the p-type InAlAs layer and having a thickness of 0.1 ⁇ m or less may be provided.
  • the p-type InGaAs contact layer 8 has an outer periphery that is smaller in area than the multiplication layer.
  • two types of i-type InAlGaAs layers with different compositions are alternately stacked multiple times on an i-type InGaAs light absorption layer 5 to form an InAlGaAs/InAlAs graded layer 6.
  • the conductivity type of the InAlGaAs/InAlAs graded layer 6 may be p-type or n-type.
  • a p-type InAlAs window layer may be used instead of the p-type InP window layer 7.
  • the response bandwidth is as follows: (1) RC time constant (R is the element resistance, C is the element capacitance) (2) Carrier transit time (the time it takes for an electron or hole to travel through the depletion layer) In APD, the (3) It is also limited by the multiplication time (the time it takes for electrons and holes to multiply in a chain reaction in the multiplication layer, which increases in proportion to the multiplication factor).
  • Multiplication time TM Multiplication rate M/GB product (1)
  • GB product 1/(2 ⁇ Nk ⁇ av) (2)
  • Multiplication time TM 2 ⁇ NkM ⁇ av (3) It becomes.
  • GB product is the product of the multiplication factor and the bandwidth
  • k is the ionization rate ratio
  • N is a coefficient that is loosely dependent on the ionization rate ratio k
  • ⁇ av is the average time it takes for electrons and holes to travel through the multiplication layer. Therefore, by reducing the ionization rate ratio k, it is possible to shorten the multiplication time TM. In particular, to realize a high-speed PON system, it is necessary to make the multiplication time TM approach zero, in other words, to make the ionization rate ratio k approach zero.
  • Non-Patent Document 1 In order to make the ionization rate ratio k zero, various compound semiconductors have been proposed as materials for the multiplication layer. In addition, in order to reduce the ionization rate ratio k, a digital alloy structure (also called ALSL: Atomic Layer Super Lattice) has been proposed in which semiconductor layers of different compositions are alternately stacked at a period of about 1 to 6 atomic layers. However, even with the digital alloy structure, it is difficult to make the ionization rate ratio k zero unless the structure is optimized. The digital alloy structure is described in Non-Patent Document 1.
  • the inventors therefore fabricated an APD with a digital alloy structure multiplication layer using a multiplication layer in which two-atom InAs layers and two-atom AlAs layers are alternately stacked in order to reduce the ionization rate ratio k of the digital alloy structure.
  • a multiplication layer made of normal InAlAs made of bulk crystal, that is, an InAlAs random alloy structure multiplication layer.
  • the distance that carriers travel in the multiplication layer until they are ionized is called the dead space.
  • a front-illuminated APD which is an example of the semiconductor light-receiving element 100 according to the first embodiment, can be realized by using metal organic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE) on an n-type InP substrate 1.
  • MOVPE metal organic vapor phase epitaxy
  • MBE molecular beam epitaxy
  • the InAlAs digital alloy structure multiplication layer 3 is grown by crystal growth on the n-type InAlAs buffer layer 2.
  • the InAlAs digital alloy structure multiplication layer 3 is formed by alternately growing crystals of an AlAs layer (layer thickness: 2 atomic layers, approximately 0.6 nm) and an InAs layer (layer thickness: 2 atomic layers, approximately 0.6 nm) from the n-type InAlAs buffer layer 2.
  • an i-type InGaAs light absorption layer 5 having a thickness of 0.1 ⁇ m or more and 2 ⁇ m or less, an i-type InAlGaAs/InAlAs graded layer 6, a p-type InP window layer 7 having a thickness of 0.1 ⁇ m or more and 3 ⁇ m or less, and a p-type InGaAs contact layer 8 are successively crystal-grown.
  • the InAlGaAs/InAlAs graded layer may be n-type or p-type.
  • a p-type InAlAs window layer may be used instead of the p-type InP window layer 7.
  • incident light 90 is incident perpendicularly to the i-type InGaAs light absorption layer 5.
  • the diameter of the light receiving part of the APD is circular, or the size of the long side of the light receiving part of the APD is rectangular, is within the range of 5 ⁇ m to 1 mm.
  • the incident surface of the APD is coated with an anti-reflective coating (not shown).
  • incident light 90 is incident from a direction parallel to the i-type InGaAs light absorption layer 5.
  • the edge portion is covered with an insulating film, an organic film, or a semiconductor layer.
  • an Fe-doped semi-insulating InP buried layer 20 is formed on the edge.
  • the layer thickness of the Fe-doped semi-insulating InP buried layer 20 is in the range of 100 nm to 5 ⁇ m in the incident direction.
  • the APD according to the first embodiment Ti and Au are used as the electrode materials for the p-type electrode 32.
  • the amount of electric field relaxation is adjusted so that tunnel breakdown does not occur at a voltage lower than avalanche breakdown.
  • the operating voltage is 15V to 90V
  • the electric field in the multiplication layer during APD operation is 500kV/cm to 900kV/cm.
  • the electric field of the i-type InGaAs light absorption layer 5 is set to 300kV/cm or less.
  • the multiplication factor is used within the range of 3 to 30, but is 100 or more when operating in Geiger mode.
  • the dead space is highly dependent on the applied electric field, and when the reciprocal of the applied electric field is 1.27 ⁇ 10 ⁇ 6 cm/V, the dead space length is about 50 nm, as shown in the graph in Fig. 3, so the multiplication layer needs to be thinned to 75 nm.
  • the thickness of the InAlAs digital alloy structure multiplication layer can be made thicker than the thickness of the InAlAs random alloy structure multiplication layer.
  • FIG. 5 is a diagram showing the dependence of the ionization rate ratio and the tunnel current on the thickness of the multiplication layer.
  • the inventors fabricated APDs having an InAlAs digital alloy structure multiplication layer and an InAlAs random alloy structure multiplication layer, respectively, measured the ionization rate ratio k, and further plotted the results in FIG. 5 together with the measurement results in References 1 and 2 described in FIG. 5.
  • documents 1 and 2 in FIG. 5 are as follows. (1) Reference 1 Yuan Yuan, et al “Temperature dependence of the ionization coefficients of InAlAs and AlGaAs digital alloys”pp. 794, Vol. 6, No.
  • the optimal thickness range for an InAlAs digital alloy structure multiplication layer is 40 nm to 170 nm, and layer thicknesses within this range can be fabricated with sufficient reproducibility.
  • the thickness of the InAlAs digital alloy structure multiplication layer at which the dead space effect is sufficient to reduce the ionization rate ratio k is considered to be approximately twice the dead space length when the reciprocal of the applied electric field is 1.47 x 10-6 cm/V. Considering that the dead space length is 85 nm as shown in Figure 3, therefore, 170 nm, which is twice the dead space length, is a suitable upper limit for the thickness of the InAlAs digital alloy structure multiplication layer.
  • the length of the dead space is preferably 50 nm to 90 nm.
  • the ratio of the length of the dead space to the thickness of the multiplication layer is preferably 29% or more, which is the minimum dead space length of 50 nm divided by the maximum multiplication layer thickness of 170 nm. As the ratio increases, the ionization rate ratio k becomes smaller, but it cannot exceed 100%. This is because multiplication does not occur when the ionization rate ratio k exceeds 100%. Therefore, the ratio of the dead space length to the thickness of the multiplication layer is preferably 29% or more and less than 100%.
  • Tmin is the minimum thickness of the multiplication layer at which the tunnel current becomes small enough that it does not affect noise, and the thicker the multiplication layer, the more the tunnel current decreases.
  • Figures 6A to 6D show the ionization rates in the multiplication layer and the electric field relaxation layer.
  • Figure 6A shows the ionization rate in the case of an InAlAs random alloy structure multiplication layer
  • Figure 6B shows the ionization rate in the case of an InAlAs digital alloy structure multiplication layer
  • Figure 6C shows the ionization rate in the case of a partially disordered InAlAs digital alloy structure multiplication layer
  • Figure 6D shows the ionization rate in the case of a combination of a thick electric field relaxation layer and an InAlAs digital alloy structure multiplication layer.
  • the dead space length of the InAlAs digital alloy structure multiplication layer shown in Figure 6B is longer, but due to dopant diffusion from the electric field relaxation layer, the dead space length is shorter in the partially disordered InAlAs digital alloy structure multiplication layer, as shown in Figure 6C.
  • N is the impurity concentration
  • t is time
  • D is the diffusion constant
  • x is position
  • F is the external force acting on the diffusion.
  • materials for the electric field buffer layer include InP, InAlAs random alloy structure, and InAlAs digital alloy structure.
  • p-type dopants for the electric field buffer layer include Be and Zn. Considering the p-type dopant, a combination of a Be-doped p-type InP electric field buffer layer and an InAlAs digital alloy structure multiplication layer is preferable. This is because Be has a small diffusion constant D and also forms a potential barrier with the InAlAs digital alloy structure multiplication layer. The potential barrier corresponds to F in formula (6).
  • the carrier concentration of the electric field relaxation layer is preferably 2 ⁇ 10 18 cm -3 or less .
  • Zn doping is optimal, and the carrier concentration is optimally 2 ⁇ 10 18 cm -3 or less. Note that if the impurity concentration is higher than 2 ⁇ 10 18 cm -3 , the amount of inactive impurities increases and diffusion is likely to occur, so the carrier concentration must be 5 ⁇ 10 18 cm -3 or less.
  • the thickness of the electric field relaxation layer is about 10 nm.
  • the carrier concentration of the electric field relaxation layer is controlled to be 5 ⁇ 10 18 cm -3 or less.
  • the electric field relaxation layer needs to have a thickness of 10 nm or more.
  • the dead space length is 45 nm or less, so the layer thickness of the random alloy electric field buffer layer needs to be 70 nm or less.
  • the dead space length is 85 nm or less, so the layer thickness of the digital alloy electric field buffer layer needs to be 130 nm or less.
  • the 3 dB bandwidth f c of the APD having the InAlAs digital alloy structure multiplication layer according to the first embodiment is limited only by the RC time constant and the carrier transit time according to equations (1), (2), and (3) because the ionization rate ratio k is close to zero, and therefore can be expressed by the following equation (9).
  • fc 1/((1/frc) 2 +(1/ftr) 2 ) 0.5 (9)
  • the transit time ftr of a carrier includes the transit time through the light absorption layer plus the transit time through the multiplication layer.
  • Vav is the average saturation transit velocity of electrons and holes
  • Wt is the total thickness of the light absorption layer and the multiplication layer.
  • FIG. 7 is a configuration diagram showing an optical line terminal (OLT) 250 of a 50G-PON system as a comparative example.
  • the optical line terminal 250 as a comparative example includes a forward error correction (FEC) circuit FEC251, a driver amplifier 252, a light source 253, an optical multiplexer/demultiplexer WDM254 (Wavelength Division Multiplexing: WDM), a digital signal processing circuit DSP255, an analog-to-digital converter (ADC256), an analog-to-digital conversion circuit ADC256, a burst TIA (Trans Impedance Amplifier) 257, and a conventional APD258.
  • FEC forward error correction
  • FEC251 driver amplifier
  • WDM254 Widelength Division Multiplexing: WDM
  • DSP255 digital signal processing circuit
  • ADC256 analog-to-digital converter
  • ADC256 analog-to-digital conversion circuit ADC256
  • burst TIA Trans Impedance Amplifier
  • Iph is the photocurrent of the APD
  • M is the multiplication factor
  • q is the unit charge
  • Id is the dark current to be multiplied
  • F is the excess noise factor of the APD
  • B is the bandwidth
  • Kb is the Boltzmann constant
  • T is the absolute temperature
  • Ft is the noise figure of the amplifier
  • Rt is the input resistance.
  • the term on the left of the denominator represents the shot noise of the APD, and the term on the right of the denominator represents the thermal noise of the amplifier.
  • the system is designed with the ionization rate ratio k for an unthinned InAlAs multiplication layer set to 0.2.
  • an APD with an InAlAs digital alloy structure as a multiplication layer that is, the DA-APD of the present disclosure
  • the dead space effect works even with a layer thickness of 100 nm or more, so it can be applied to APDs.
  • the signal-to-noise ratio is improved by 3 dB when the DA-APD of the present disclosure is applied.
  • FIG. 11 is a diagram showing the configuration of a 50G-PON system 282 and an OLT/ONU according to the first embodiment.
  • the OLT of the 50G-PON system 282 includes an FEC 261, a driver amplifier 262, a light source 263, a WDM 264, a DSP 265a, an ADC 266a, a burst TIA 267, and a DA-APD 268 of the present disclosure.
  • the OLT of the 50G-PON system 282 includes an FEC 261, a driver amplifier 262, a light source 263, a WDM 264, a DSP 265a, an ADC 266a, a TIA 267a, and a DA-APD 268 of the present disclosure.
  • the number of branches which is 32 in the 50G-PON system 280 shown in FIG. 10 as a comparative example, can be doubled to 64 branches as in the 50G-PON system 282 according to the first embodiment shown in FIG. 11, making it possible to achieve a dramatic improvement. Furthermore, since it is possible to double the number of branches in PON systems other than the 50G-PON system 282, it is also possible to reduce the driving current of the transmitter laser.
  • the use of SOAs in the ONU and OLT, which are optical line terminals, is being considered to compensate for the lack of sensitivity, but it is possible to configure the ONU and OLT without using SOAs, as in the 50G-PON system 284 according to embodiment 1 shown in Figure 12.
  • the DA-APD of the present disclosure has an InAlAs digital alloy structure multiplication layer, and by controlling the thickness of the multiplication layer within a predetermined range to make the ionization rate ratio k zero, the multiplication time in formula (1) becomes almost zero. As a result, the response band of the APD does not deteriorate even if the multiplication factor is increased. In other words, in the DA-APD of the present disclosure, the band is limited only by the RC time constant and the carrier travel time, as in the conventional PD. Therefore, the wide band required for the 50G-PON system is possible, and reception is possible without digital band compensation by a DSP.
  • the semiconductor photodetector according to the first embodiment has a digital alloy structure multiplication layer whose layer thickness is controlled within a predetermined range, and thus has the effect of providing a semiconductor photodetector that is highly reliable and has excellent broadband and low noise characteristics.
  • the semiconductor light receiving element 120 includes an n-type InP substrate 1, an n-type InAlAs buffer layer 2 having a carrier concentration of 1 to 5 ⁇ 10 18 cm ⁇ 3 and a thickness of 0.1 to 1.0 ⁇ m, which are successively formed on the n-type InP substrate 1, an InAlAs digital alloy structure multiplication layer 3 in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated multiple times, a p-type InP electric field relaxation layer 4 having a carrier concentration of 0.1 to 50 ⁇ 10 17 cm ⁇ 3 and a layer thickness of 10 to 70 nm, an i-type InGaAs light absorption layer 5 having a layer thickness of 0.1 to 2.0 ⁇ m, an i-
  • the p-type diffusion region 15 is formed by partially selectively diffusing a p-type dopant such as Zn in a solid or gas phase.
  • the carrier concentration of the p-type diffusion region 15 is 5 ⁇ 10 17 cm ⁇ 3 or more.
  • the tip of the p-type diffusion region 15 may be located at a depth up to the middle of the n-type InP window layer 11, at a depth reaching the i-type InAlGaAs/InAlAs graded layer 6, or at a depth reaching the i-type InGaAs light absorption layer 5.
  • the p-type diffusion region 15 has a depth reaching the i-type InAlGaAs/InAlAs graded layer 6.
  • a p-type InGaAs contact layer 8 is provided on the p-type diffusion region 15.
  • the electric field is several tens of percent higher than in the conventional InAlAs random alloy structure, and the effect of the side portions may shorten the life of the semiconductor light receiving element.
  • the portion of the InAlAs digital alloy structure multiplication layer 3 to which an electric field is applied that is, the portion directly below the p-type diffusion region 15, is not exposed to the outside of the crystal layer, which has the effect of preventing deterioration of the dead space length in the InAlAs digital alloy structure multiplication layer 3 in which each layer is highly distorted.
  • the use of Be-doped p-type InP for the p-type InP electric field relaxation layer 4 suppresses the diffusion of Be into the InAlAs digital alloy structure multiplication layer 3, and prevents the intrusion of Zn and vacancies into the InAlAs digital alloy structure multiplication layer 3 due to interdiffusion, thereby preventing the InAlAs digital alloy structure multiplication layer 3 from becoming disordered.
  • the InAlAs digital alloy structure multiplication layer 3 can be prevented from becoming disordered, so that the dead space length does not shorten as shown in FIG. 6C, for example, and it is possible to maintain a long dead space length as shown in FIG. 6B.
  • the semiconductor light receiving elements 120 and 130 according to the second embodiment it is possible to maintain the ionization rate ratio k at approximately zero, even though Zn diffusion is performed to form the p-type diffusion region 15.
  • the front-illuminated APD which is an example of the semiconductor photodetector 140 according to the third embodiment, is characterized in that, in addition to the element structure of the front-illuminated APD, which is an example of the semiconductor photodetector 120 according to the second embodiment, a separation groove 17 is provided along the outer periphery of the p-type diffusion region 15 formed in the n-type InP window layer 11.
  • the inside of the separation groove 17 and the surface of the n-type InP window layer 11 are protected by a surface protective film 18 made of an insulating film made of an oxide film such as SiN or SiO2 .
  • the surface protective film 18 also serves as an anti-reflective coating for the light receiving section.
  • the thickness of the surface protective film 18 is preferably within a range of 50 nm to 5000 nm.
  • the surface protective film 18 may also be an organic film such as benzocyclobutene (BCB).
  • each layer of the InAlAs digital alloy structure is highly strained, so that the InAlAs digital alloy structure is easily disordered when stress is applied from the outside. Therefore, as in the semiconductor light receiving element 140 according to the third embodiment, by providing the separation groove 17 along the outer periphery of the p-type diffusion region 15, the stress that affects the entire wafer during the manufacturing process can be alleviated. Even in the state of individual semiconductor light receiving elements 140, the stress is alleviated by the presence of the separation groove 17, so that the stress concentration in the light receiving part at the center of the semiconductor light receiving element 140 can be alleviated.
  • the InAlAs digital alloy structure multiplication layer 3 is exposed in the separation groove 17, it is desirable that the above-mentioned surface protection film 18 covers the surface of the separation groove 17. Note that a high electric field is not applied to the separation groove 17, so it does not become a starting point of deterioration.
  • the InAlAs digital alloy structure multiplication layer 3 can be prevented from becoming disordered, so that it is possible to maintain a long dead space length as shown in FIG. 6B, for example, without the dead space length becoming shorter as shown in FIG. 6C. As a result, it is possible to maintain the ionization rate ratio k at approximately zero, even though Zn diffusion is performed in the manufacturing process.
  • the semiconductor light receiving element 140 of the third embodiment can achieve high reliability by maintaining a wide bandwidth and low noise for a long period of time.
  • FIG. 16 is a cross-sectional view showing the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element 150 according to the fourth embodiment.
  • the back-illuminated APD which is an example of the semiconductor light receiving element 150 according to the fourth embodiment, can prevent the InAlAs digital alloy structure multiplication layer 3 from becoming disordered, even if a high-temperature heat treatment is performed to diffuse Zn in the diffusion process for forming the p-type diffusion region 15, just like the semiconductor light receiving element 140 according to the third embodiment. Therefore, for example, the dead space length does not become shorter as shown in FIG. 6C, and it is possible to maintain a long dead space length as shown in FIG. 6B.
  • the area of the p-type diffusion region 15 can be formed smaller in a back-illuminated APD such as the semiconductor light receiving element 150 than in a front-illuminated APD such as the semiconductor light receiving element 120, it is possible to further reduce the stress generated during p-type diffusion, and therefore it is possible to further prevent disordering of the InAlAs digital alloy structure multiplication layer 3.
  • disordering of the InAlAs digital alloy structure multiplication layer 3 can be prevented, so it is possible to maintain the ionization rate ratio k at almost zero, and the stress can be further reduced, resulting in the effect of obtaining a semiconductor light receiving element that is highly reliable and has excellent wideband and low noise characteristics.
  • the element structure is a back-illuminated APD, and therefore the area of the p-type diffusion region can be made smaller than that of a front-illuminated APD. This makes it possible to maintain the ionization rate ratio k at approximately zero, and further reduces stress, thereby providing an advantageous effect of providing a semiconductor light-receiving element that is highly reliable and has excellent broadband and low-noise characteristics.
  • Fig. 17 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of the semiconductor light receiving element 160 according to the fifth embodiment.
  • Fig. 18 is a cross-sectional view showing another element structure of a front-illuminated APD, which is an example of the semiconductor light receiving element 170 according to the fifth embodiment.
  • the semiconductor light receiving element 160 comprises an n-type InP substrate 1, an n-type InAlAs buffer layer 2 having a carrier concentration of 1 to 5 ⁇ 10 cm and a thickness of 0.1 to 1.0 ⁇ m, which are successively formed on the n-type InP substrate 1, an InAlAs digital alloy structure multiplication layer 3 in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm ) are alternately laminated multiple times, and
  • the n-type InP substrate 1 is made up of a p-type InP electric field relaxation layer 4 having a thickness of 10 to 70 nm and a thickness of 300 nm, an i-type InGaAs light absorption layer 5 having a thickness of 0.1 to 2.0 ⁇ m, an i
  • the manufacturing method of the semiconductor light receiving element 160 according to the fifth embodiment is characterized in that the p-type InAlAs conductive layer 25 is crystal-grown on the n-type InP window layer 11 by MOCVD or the like, and then the p-type InGaAs contact layer 8 is crystal-grown, after which the p-type InAlAs conductive layer 25 is removed, leaving the light receiving portion.
  • the semiconductor light receiving element 160 shown in FIG. 17 has an n-type electrode 31 on the back side
  • the semiconductor light receiving element 170 shown in FIG. 18 has an n-type electrode 31a on the front side. That is, in the semiconductor light receiving element 170, an n-type InP conductive layer 2a is provided on an Fe-doped semi-insulating InP substrate 1a, and after crystal growth, the layers above the n-type InP conductive layer 2a are partially removed, and then the n-type electrode 31a is formed on the n-type InP conductive layer 2a.
  • a p-type InP substrate or an n-type InP substrate may be used.
  • the semiconductor light receiving element of the fifth embodiment as in the semiconductor light receiving element of the second embodiment, the region of the multiplication layer directly below the light receiving portion to which a high electric field is applied is separated from the side portion of the element, and therefore high reliability is obtained. As a result, a semiconductor light receiving element having high reliability, wide bandwidth, and low noise characteristics is obtained.
  • FIG. 19 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element 180 according to the sixth embodiment.
  • the depth of the separation groove 17 is preferably within the range of 2 ⁇ m to 5 ⁇ m.
  • the opening width of the separation groove 17 is preferably within the range of 0.5 ⁇ m to 100 ⁇ m.
  • the bottom of the separation groove 17 reaches at least the InAlAs digital alloy structure multiplication layer 3.
  • FIG. 19 shows an example in which the bottom of the separation groove 17 reaches halfway through the n-type InAlAs buffer layer 2.
  • Either dry etching or wet etching may be used to form the separation groove 17. However, it is preferable to add wet etching to remove the damaged layer caused by the dry etching after dry etching, which has excellent depth control.
  • the InAlAs digital alloy structure multiplication layer 3 is exposed in the separation groove 17, it is desirable that the above-mentioned surface protection film 18 covers the surface of the separation groove 17. Note that a high electric field is not applied to the separation groove 17, so that it does not become a starting point of deterioration.
  • the separation groove can relieve stress due to heat treatment or the like in the manufacturing process, and therefore disordering of the digital alloy structure multiplication layer can be prevented. This makes it possible to maintain the ionization rate ratio k at approximately zero, and provides the effect of providing a semiconductor photodetector that is highly reliable and has excellent broadband and low noise characteristics.
  • FIG. 20 is a cross-sectional view showing the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element 190 according to the seventh embodiment.
  • a front-illuminated APD which is an example of a semiconductor light-receiving element 180 according to the sixth embodiment, receives light from the front side as shown in Fig. 19
  • a back-illuminated APD which is an example of a semiconductor light-receiving element 190 according to the seventh embodiment, is characterized in that, as shown in Fig. 20, a part of the n-type electrode 31b on the back side is removed to provide an opening 33, and light is made incident on the n-type InP substrate 1 exposed in the opening 33.
  • the opening 33 which is an incident region for incident light 90, is provided on the back side of the n-type InP substrate 1 opposite the p-type electrode 32.
  • the area of the mesa-shaped p-type InAlAs conductive layer 25 can be reduced compared to that of a front-illuminated APD, so the effect of stress from the mesa portion of the p-type InAlAs conductive layer 25 is reduced, and the InAlAs digital alloy structure multiplication layer 3 does not become disordered.
  • the semiconductor photodetector 190 according to the seventh embodiment can maintain a wide bandwidth and low noise for a long period of time.
  • FIG. 21 is a cross-sectional view showing the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element 200 according to the eighth embodiment.
  • the semiconductor light receiving element 200 comprises an Fe-doped semi-insulating InP substrate 1a, and a p-type InGaAlAs contact layer 40 having a carrier concentration of 1 to 5 ⁇ 10 cm ⁇ 3 and a layer thickness of 0.1 to 1 ⁇ m, which are successively formed on the Fe-doped semi-insulating InP substrate 1a, a p-type InGaAlAs contact layer 40 having a carrier concentration of 1 to 5 ⁇ 10 cm ⁇ 3 and a layer thickness of 0.1 to 1 ⁇ m, a p-type InP conductive layer 41 having a carrier concentration of 1 to 5 ⁇ 10 cm ⁇ 3 and a layer thickness of 0.1 to 1 ⁇ m, a p-type or low carrier concentration (5 ⁇ 10 17 cm ⁇ 3 or less) n-type or i-type InAlGaAs/InAlAs graded layer 42, an i-type InGaA
  • a p-type InP conductive layer 41 having a carrier concentration of 1 to 5 ⁇ 10 18 cm ⁇ 3 and a thickness of 0.1 to 1 ⁇ m is grown by crystal growth on the p-type InGaAlAs contact layer 40.
  • the p-type InP conductive layer 41 may be p-type InGaAsP or p-type InAlGaAs instead of p-type InP.
  • an i-type, n-type or p-type InAlAs layer with a small barrier against holes may be provided on the p-type InP conductive layer 41. Furthermore, after the p-type or low carrier concentration (5 ⁇ 10 17 cm -3 or less) n-type or i-type InAlGaAs/InAlAs graded layer 42 is crystal-grown, the i-type InGaAs light absorbing layer 43 is crystal-grown to a thickness of 0.1 to 2 ⁇ m.
  • the i-type InGaAs light absorbing layer 43 may be an n-type or p-type with a low carrier concentration (5 ⁇ 10 17 cm -3 or less) instead of an i-type.
  • either or both of the p-type InP conductive layer 41 and the n-type InAlGaAs/InAlAs graded layer 42 are not necessarily required.
  • the p-type InP electric field buffer layer 44 having a carrier concentration of 1 to 50 ⁇ 10 17 cm -3 is crystal-grown to a thickness of 10 to 100 nm.
  • Examples of p-type dopants for the p-type InP electric field buffer layer 44 include Be, Zn, and C.
  • the p-type InP electric field buffer layer 44 does not necessarily have to be p-type InP, and may be p-type InAlAs or a p-type InAlAs digital alloy structure.
  • an InAlGaAs/InAlAs graded layer with a thickness of 10 to 100 nm, which has an intermediate band gap value, such as InAlGaAs or InGaAsP, may be provided.
  • the InAlAs digital alloy structure multiplication layer 45 is crystal-grown as a multiplication layer on the p-type InP electric field relaxation layer 44.
  • the InAlAs digital alloy structure multiplication layer 45 is composed of semiconductor layers that are alternately stacked in the order of an AlAs layer (layer thickness of two atomic layers, approximately 0.6 nm) and an InAs layer (layer thickness of two atomic layers, approximately 0.6 nm) from the side of the Fe-doped semi-insulating InP substrate 1a.
  • the InAlAs digital alloy structure multiplication layer 45 may be formed in the order of an InAs layer and an AlAs layer.
  • the number of atomic layers in each layer of the InAlAs digital alloy structure multiplication layer 45 is preferably 2 to 4 atomic layers, with 2 atomic layers being optimal. The reason for this is that the thinner the atomic layer thickness of each layer, the greater the effect of reducing the ionization rate ratio k due to the digital alloy structure.
  • the InAlAs digital alloy structure multiplication layer 45 may have an i-type conductivity with a carrier concentration of 1 ⁇ 10 17 cm ⁇ 3 or less, but may also have a p-type or n-type conductivity with a carrier concentration of 5 ⁇ 10 18 cm ⁇ 3 or less.
  • the thickness of the InAlAs digital alloy structure multiplication layer 45 is preferably in the range of 40 nm to 170 nm. However, considering the typical variation of 20% in the layer thickness during the fabrication of the semiconductor light receiving element 190, the thickness of the InAlAs digital alloy structure multiplication layer 45 is preferably in the range of 50 nm to 140 nm.
  • the n-type InAlAs field adjustment layer 46 is crystal-grown to a thickness of 10 to 50 nm, and then the n-type InP window layer 47 is crystal-grown to a thickness of 0.1 to 2 ⁇ m.
  • the n-type InP window layer 47 also functions as a field adjustment layer and an electron transit layer, but is not necessarily required.
  • the n-type InAlAs field adjustment layer 46 and the n-type InP window layer 47 are layers for adjusting the electric field at the outermost surface, and preferably have a carrier concentration in the range of 1 to 500 ⁇ 10 16 cm -3 . Weakening the electric field at the outermost surface has the effect of suppressing local breakdown and improving reliability.
  • n-type InAlAs conductive layer 48 is grown as an n-type conductive layer, and an n-type InGaAs contact layer 49 is grown as an n-type contact layer, on the n-type InP window layer 47.
  • the n-type InAlAs conductive layer 48 and the n-type InGaAs contact layer 49 each have a thickness of 0.1 to 2 ⁇ m and a carrier concentration of 5 ⁇ 10 cm ⁇ 3 to 8 ⁇ 10 cm ⁇ 3 .
  • the InAlAs digital alloy structure multiplication layer 45 is held at a high temperature for a long time during epitaxial crystal growth, it may become disordered and become an InAlAs random alloy structure.
  • the total layer thickness of each semiconductor layer above the InAlAs digital alloy structure multiplication layer 45 is about one-third thinner than that of the semiconductor light receiving element 190 according to the seventh embodiment.
  • the crystal growth time required for epitaxially growing each remaining semiconductor layer after the InAlAs digital alloy structure multiplication layer 45 is crystal grown is about one-third shorter than that of the semiconductor light receiving element 190 according to the seventh embodiment, so that the InAlAs digital alloy structure multiplication layer 45 is less likely to become disordered.
  • the dead space length is increased, and the state in which the ionization rate ratio k is zero can be more reliably realized.
  • the upper electrode i.e., the n-type electrode 50
  • the n-type electrode 50 is in contact with an n-type semiconductor, so the ohmic resistance is reduced to one tenth compared to contact with a p-type semiconductor. This allows the area of the n-type electrode 50 to be reduced, which has the effect of reducing stress from the electrode and making disorder less likely to occur in the InAlAs digital alloy structure multiplication layer 45.
  • a state in which the ionization rate ratio k is zero can be more easily achieved, which has the effect of reducing the bandwidth compensation circuit in the PON system, doubling the number of branches, omitting the SOA, and reducing the operating current of the transmitter laser.
  • the crystal growth time required for epitaxial crystal growth of the remaining semiconductor layers after the InAlAs digital alloy structure multiplication layer is crystal grown is about one-third shorter than that of the semiconductor photodetector of the seventh embodiment, so that disordering of the InAlAs digital alloy structure multiplication layer is less likely to occur.
  • This makes it possible to more reliably realize a state in which the dead space length is longer and the ionization rate ratio k is zero, and also makes it possible to further reduce stress, thereby providing an advantageous effect of providing a semiconductor photodetector that is highly reliable and has excellent wideband and low noise characteristics.
  • FIG. 22 is a diagram showing a configuration of a multi-level intensity modulation transmitting/receiving apparatus 300 according to embodiment 9.
  • Fig. 23A and Fig. 23B are diagrams showing received waveforms of the multi-level intensity modulation transmitting/receiving apparatus 300 according to embodiment 9.
  • TDECQ Transmitter Dispersion and Eye Closure Quaternary
  • the optical modulation amplitude is the total amplitude from level 0 to level 3
  • Qt is a value dependent on the SER (Symbol Error Rate) defined by the IEEE (Institute of Electrical and Electronics Engineers)
  • R is the additional noise value required to achieve the SER value.
  • TDECQ (dB) is defined as, for example, 3 dB or less. In order to reduce TDECQ (dB), (1) The eye opening at each level must be uniform. (2) The noise at each level must be low.
  • the semiconductor light receiving element In order for the eye opening at each of the four levels, which have different optical signal strengths, to be uniform, the semiconductor light receiving element must have excellent linearity.
  • a semiconductor light receiving element has good linearity when the photocurrent Iph increases in proportion to the optical input power Pin. In other words, even if the optical input power Pin changes, if Iph/Pin is constant, it can be said to have good linearity.
  • PAM needs to receive signals with a wide range of strengths, from low to high, it needs to have an excellent dynamic range. In other words, even if the optical input power Pin increases, if the drop in Iph/Pin is small, the dynamic range can be said to be good. As in the received waveform in Figure 23B, if the linearity and dynamic range deteriorate, the eye opening formed between levels 2 and 3 deteriorates.
  • Rsc is the resistance due to the space charge effect
  • Rd is the element resistance
  • Rlo is the load resistance.
  • Rd and the load resistance are usually several tens of ohms, but Rsc can be several hundreds of ohms or more.
  • FIG. 25 is a diagram for explaining the operation of the APD at high light input.
  • the electric field in the multiplication layer of the APD changes, that is, the so-called space charge effect occurs. Due to the occurrence of this space charge effect, the multiplication factor of the APD decreases and the linearity deteriorates.
  • the residence time Td of the electrons and holes in the depletion layer since the deterioration of the linearity of the APD is caused by the series resistance Rsc, it is necessary to reduce the residence time Td of the electrons and holes in the depletion layer.
  • the residence time Tdm in the multiplication layer increases. Tdm is the same as the so-called multiplication time, and is expressed by the following formula (18).
  • N is the Emmons coefficient (which depends gently on the ionization rate ratio k)
  • M is the multiplication factor
  • ⁇ av is the time it takes for the carrier to travel through the multiplication layer.
  • the residence time Tdm excludes the one-way transit time it takes for the carrier to cross the multiplication layer.
  • Figure 26 shows the residence time Tdm of electrons and holes for each material that makes up the multiplication layer.
  • the residence time Tdm within the multiplication layer is dramatically reduced. In other words, electrons and holes are quickly discharged from the multiplication layer, suppressing the space charge effect in the multiplication layer, resulting in improved linearity and dynamic range in the InAlAs digital alloy structure multiplication layer.
  • the eye opening of PAM4 was non-uniform as shown in FIG. 23B, but with the DA-APD disclosed herein, the eye opening is uniform as shown in FIG. 23A, making it possible for TDECQ to satisfy the specified value. Therefore, when the DA-APD disclosed herein is used, an APD can be used in a PAM transceiver, which makes it possible to increase the transmission distance of optical signals and reduce the drive current of the transmitting laser.
  • the multi-level intensity modulation transmitting/receiving device uses the DA-APD of the present disclosure as the semiconductor light receiving element, and thus has the effect of providing a multi-level intensity modulation transmitting/receiving device that can increase the transmission distance of an optical signal and reduce power consumption.
  • Fig. 27 is a schematic diagram showing the configuration of a radio on fiber system 400 (Radio on fiber: RoF) according to a tenth embodiment.
  • Fig. 28 is a schematic diagram showing the configuration of a radio on fiber system 450, which is a comparative example.
  • the radio on fiber system 400 includes a light source 401, a transmission line 402 such as an optical fiber cable, a DA-APD 403 of the present disclosure, and an antenna 404.
  • an analog electrical amplitude signal is input to a light source 401 such as an LD and converted into an optical amplitude signal.
  • the converted optical amplitude signal is transmitted through an optical fiber cable, i.e., a transmission path 402.
  • the transmitted optical amplitude signal is multiplied and converted into an electrical amplitude signal using a DA-APD 403 of the present disclosure.
  • the converted electrical amplitude signal is transmitted to an antenna 404 and radiated as a radio wave signal.
  • the multiplication factor of the DA-APD403 disclosed herein can be in the range of 1.2 to 10 times. However, as the multiplication factor increases, the signal becomes distorted, so it is desirable to use a multiplication factor in the range of 1.2 to 5 times. Also, considering that the multiplication factor is about 80% and not 100% due to the loss of the optical fiber, it is optimal to use a multiplication factor of 2 to 3 times to compensate for such losses.
  • the DA-APD of the present disclosure is used to configure the radio-on-fiber system, which has the effect of making it possible to output a strong radio signal even if the optical transmission distance is long.
  • Embodiment 11 29 is a schematic diagram illustrating a configuration of a digital coherent receiving apparatus 500 according to an eleventh embodiment.
  • the digital coherent receiving apparatus 500 according to the eleventh embodiment is characterized in that it uses the DA-APD 505a of the present disclosure.
  • optical signals with both phase and intensity modulated are polarization multiplexed and transmitted through optical fiber.
  • digital coherent receiving device 500 the optical signal input from optical fiber cable 501 is first polarized and separated by polarization separator 502. After polarization separation, each polarized signal light is input to 90-degree hybrid device 503a and 90-degree hybrid device 503b, respectively. Meanwhile, the laser light locally emitted from semiconductor laser 504 is separated into two signals with a phase shift of 90 degrees from each other.
  • the DA-APD of the present disclosure is applied as a semiconductor photodetector for receiving an optical signal, and therefore it is possible to reduce the drive current of the local light (laser), that is, to reduce the power consumption of the digital coherent receiving device.
  • Embodiment 12. 31 is a schematic diagram showing the configuration of a SPAD sensor (Single Photon Avalanche Diode) system according to embodiment 12.
  • the SPAD sensor system 600 includes a photoelectron measurement circuit 601, a SPAD sensor 602 including the DA-APD of the present disclosure, and a quenching circuit 603.
  • the SPAD sensor system 600 uses the DA-APD of the present disclosure. Photons incident on the SPAD sensor system 600 are absorbed in the light absorption layer of the SPAD sensor 602, which is made of the DA-APD of the present disclosure, generating pairs of electrons and holes, and the electrons flow into the multiplication layer. An electric field about 10% higher than the avalanche breakdown electric field is applied to the multiplication layer.
  • This state is called the Geiger mode.
  • the electrons are multiplied by approximately 106.
  • the generated electrons flow as a current and flow into the photoelectron measurement circuit 601. If the current generated by one photon is known in advance, it is possible to count the number of photons incident on the SPAD sensor system 600.
  • the voltage is reduced from B: Geiger mode voltage to A: quenching voltage to stop the chain multiplication, and then the voltage is increased again from A: quenching voltage to B: Geiger mode voltage to make it possible to receive incident photons with high sensitivity.
  • the SPAD sensor system 600 according to the twelfth embodiment can be used not only for counting the number of photons but also as a highly sensitive semiconductor light receiving element. However, it is necessary to constantly repeat the voltage from B: Geiger mode voltage to A: quenching voltage. The repetition period is on the order of nanoseconds to microseconds. If the difference between A: quenching voltage and B: Geiger mode voltage can be reduced, the repetition period can be shortened and the response speed of the SPAD sensor system 600 can be increased.
  • the passive quenching circuit 603 it is possible to reduce the resistance value connected in series to the SPAD sensor 602, which increases the response speed of the SPAD sensor 602.
  • the voltage amplitude is reduced, which allows for simplification of the drive circuit and power saving, and also makes it possible to widen the response band.
  • the dead space length is long, so multiplication does not occur at low electric fields. However, as the electric field is increased, the dead space length becomes shorter, so the multiplication factor increases rapidly and leads to breakdown.
  • the APD of the InAlAs random alloy multiplication layer and the APD having the digital alloy InAlAs multiplication layer with a thick multiplication layer if the voltage at which the dark current exceeds 10 ⁇ A is set as the breakdown voltage, the multiplication factor at 90% of the breakdown voltage exceeds 10 times.
  • the multiplication factor at a voltage of 90% of the breakdown voltage is 10 times or less.
  • Figure 33 shows the calculated difference between the quenching electric field and the Geiger mode electric field for each material constituting the multiplication layer. It can be seen that in the InAlAs digital alloy structure multiplication layer disclosed herein, the difference between the quenching electric field and the Geiger mode electric field for each multiplication layer is 170 kV/cm, which is exceptionally low. The electric field is 120 kV/cm lower than that of an InAlAs digital alloy structure multiplication layer having a superlattice structure similar to the InAlAs digital alloy structure multiplication layer disclosed herein but a layer thickness of 200 nm or more that has not been thinned.
  • the DA-APD of the present disclosure is used in the SPAD sensor, and therefore the difference between the quenching electric field and the Geiger mode electric field, that is, the applied voltage difference, can be reduced, thereby achieving the effect of obtaining a SPAD sensor system that enables an improved response band, a simplified quenching circuit, and reduced power consumption.
  • Fig. 34 is a diagram showing the configuration of a LIDAR (Light Detection and Ranging: LiDAR) device according to embodiment 13.
  • Fig. 35A is a diagram showing the received waveform of the APD of the LIDAR device which is a comparative example, and
  • Fig. 35B is a diagram showing the received waveform of the APD of the LIDAR device according to embodiment 13.
  • the tunnel current does not increase, making it easy to identify weak light.
  • the residence time in the multiplication layer is short, and therefore, as shown in FIG. 35B, a current pulse with a large peak intensity is obtained, resulting in high identification sensitivity.
  • the light output of the light source can be reduced, thereby saving power and further improving safety for the eyes.
  • this includes modifying, adding, or omitting at least one component, and even extracting at least one component and combining it with a component of another embodiment.

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Abstract

Un élément de réception de lumière à semi-conducteur (100) selon la présente invention comprend : un substrat d'InP de type n (1) ; une couche semi-conductrice de type n (2) formée sur le substrat d'InP de type n (1) ; une couche de multiplication (3) formée sur la couche semi-conductrice de type n (2) et ayant une structure d'alliage numérique d'InAlAs dans laquelle des couches d'InAs ayant une épaisseur de couche de 40 à 170 nm et des couches d'AlAs sont stratifiées en alternance ; une couche de relaxation de champ de type p (4) formée sur la couche de multiplication (3) et composée d'InP ou d'InAlAs ; et une couche d'absorption de lumière d'InGaAs (5) formée sur la couche de relaxation de champ de type p (4).
PCT/JP2023/036960 2023-10-12 2023-10-12 Élément de réception de lumière à semi-conducteur, dispositif de terminaison de ligne optique, dispositif d'émission/réception à modulation d'intensité à valeurs multiples, dispositif de réception cohérente numérique, système de radio sur fibre, système de capteur spad et dispositif lidar Pending WO2025079193A1 (fr)

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PCT/JP2023/036960 WO2025079193A1 (fr) 2023-10-12 2023-10-12 Élément de réception de lumière à semi-conducteur, dispositif de terminaison de ligne optique, dispositif d'émission/réception à modulation d'intensité à valeurs multiples, dispositif de réception cohérente numérique, système de radio sur fibre, système de capteur spad et dispositif lidar
JP2024504501A JP7471550B1 (ja) 2023-10-12 2023-10-12 半導体受光素子、光回線終端装置、多値強度変調送受信装置、デジタルコヒーレント受信装置、光ファイバ無線システム、ｓｐａｄセンサーシステム、及びライダー装置

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PCT/JP2023/036960 WO2025079193A1 (fr) 2023-10-12 2023-10-12 Élément de réception de lumière à semi-conducteur, dispositif de terminaison de ligne optique, dispositif d'émission/réception à modulation d'intensité à valeurs multiples, dispositif de réception cohérente numérique, système de radio sur fibre, système de capteur spad et dispositif lidar

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