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WO2024075864A1 - Carte de circuit imprimé et procédé de brasage associé - Google Patents

Carte de circuit imprimé et procédé de brasage associé Download PDF

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Publication number
WO2024075864A1
WO2024075864A1 PCT/KR2022/014967 KR2022014967W WO2024075864A1 WO 2024075864 A1 WO2024075864 A1 WO 2024075864A1 KR 2022014967 W KR2022014967 W KR 2022014967W WO 2024075864 A1 WO2024075864 A1 WO 2024075864A1
Authority
WO
WIPO (PCT)
Prior art keywords
area
substrate
solder
thermal pad
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2022/014967
Other languages
English (en)
Korean (ko)
Inventor
권오범
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
Original Assignee
LG Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Electronics Inc filed Critical LG Electronics Inc
Priority to PCT/KR2022/014967 priority Critical patent/WO2024075864A1/fr
Priority to KR1020257010034A priority patent/KR20250084125A/ko
Priority to DE112022007725.5T priority patent/DE112022007725T5/de
Publication of WO2024075864A1 publication Critical patent/WO2024075864A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/066—Heatsink mounted on the surface of the printed circuit board [PCB]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste

Definitions

  • the present disclosure relates to a printed circuit board capable of improving heat dissipation performance and a soldering method thereof.
  • an integrated circuit has an operating temperature range within which it can maintain normal functions and perform normal operations according to set specifications, and its characteristics may change as the temperature varies.
  • the integrated circuit exceeds the maximum temperature range at which the semiconductor operates, a large number of electrons and holes are generated in the semiconductor crystal, which may result in the loss of its function.
  • a heat sink made of metal with good thermal conductivity is attached to a printed circuit board (PCB), or a heat transfer method is made by mixing a non-conductor with a material with good thermal conductivity.
  • PCB printed circuit board
  • a method of adding media was also used, but there were problems with additional costs and increasing the overall size of the system.
  • the present disclosure aims to solve the above-described problems and other problems.
  • the present disclosure uses a metal mask to form a thin solder with a minimum amount by arranging a plurality of solders to cross each other in a minimum amount on the substrate area where the thermal pad of the integrated circuit is attached, thereby forming the maximum solder at the minimum cost.
  • the purpose is to provide a printed circuit board that can improve heat dissipation performance.
  • a printed circuit board includes a substrate, solder formed in a predetermined area of the substrate, and a heat transfer metal layer formed between the substrate and the solder, and the solder is printed through a metal mask.
  • a plurality of solders are formed in the area of the substrate where the thermal pad of the integrated circuit (IC) is attached, and the plurality of solders formed in the thermal pad attachment area of the board are adjacent to each other in the X-axis direction and the Y-axis direction. They can be arranged to cross each other in at least one direction.
  • a method of soldering a printed circuit board includes preparing a substrate on which a plurality of via holes are formed, forming a heat transfer metal layer on the substrate, and having a plurality of open areas on the upper part of the substrate. Positioning a metal mask, forming solder on the substrate through an open area of the metal mask and arranging adjacent solders to stagger each other in at least one of the X-axis direction and the Y-axis direction, removing the metal mask. It may include the step of tenting a resin layer to block the inflow of external air at the lower entrance of the via hole of the substrate.
  • the printed circuit board uses a metal mask to arrange a plurality of solders in a minimal amount to cross each other in the area of the board where the thermal pad of the integrated circuit is attached, thereby minimizing the use of solder with low thermal conductivity.
  • a metal mask to arrange a plurality of solders in a minimal amount to cross each other in the area of the board where the thermal pad of the integrated circuit is attached, thereby minimizing the use of solder with low thermal conductivity.
  • the present disclosure can improve heat dissipation performance by tenting the via hole entrance of the substrate with a resin layer to block external air from flowing into the solder and creating voids in the solder.
  • FIG. 1 is a structural cross-sectional view for explaining a printed circuit board according to an embodiment of the present disclosure.
  • Figure 2 is a structural cross-sectional view for explaining a printed circuit board according to another embodiment of the present disclosure.
  • Figure 3 is a structural cross-sectional view for explaining a heat dissipation path of a printed circuit board according to an embodiment of the present disclosure.
  • Figure 4 is a structural cross-sectional view of a heat transfer metal layer of a printed circuit board according to an embodiment of the present disclosure.
  • FIG. 5 is a diagram for explaining tenting of a via hole of a printed circuit board according to an embodiment of the present disclosure.
  • Figure 6 is a diagram for explaining a tenting area of a printed circuit board according to an embodiment of the present disclosure.
  • Figure 7 is a diagram for explaining solder formation of a printed circuit board according to an embodiment of the present disclosure.
  • FIG. 8 is a diagram for explaining an open area pattern of a metal mask corresponding to a thermal pad of an integrated circuit according to an embodiment of the present disclosure.
  • 9 and 10 are diagrams for explaining the shape of an open area pattern of a metal mask according to an embodiment of the present disclosure.
  • 11 and 12 are diagrams for explaining a solder arrangement pattern formed in a thermal pad attachment area according to an embodiment of the present disclosure.
  • FIG. 13 is a diagram for explaining a void formed in solder of a printed circuit board according to an embodiment of the present disclosure.
  • Figure 14 is a table comparing the temperature of the integrated circuit corresponding to the open area ratio of the metal mask according to an embodiment of the present disclosure.
  • Figure 15 is a flowchart for explaining a method of soldering a printed circuit board according to an embodiment of the present disclosure.
  • FIG. 1 is a structural cross-sectional view for explaining a printed circuit board according to an embodiment of the present disclosure.
  • the printed circuit board of the present disclosure includes a substrate 100, solder 300 formed in a predetermined area of the substrate 100, and solder 300 formed between the substrate 100 and the solder 300. It may include a heat transfer metal layer 200.
  • the substrate 100 may be formed with a plurality of via holes 600 penetrating the upper part where the integrated circuit package 500 is attached and the lower part exposed to the outside.
  • a resin layer may be tented at the lower entrance of the via hole 600 to block the inflow of external air.
  • the reason for applying tenting is that when external air flows into the solder 300 through the via hole 600, voids are formed in the solder 300, which can be a factor in reducing heat dissipation performance. Therefore, the purpose is to block this.
  • a conductive metal may be formed on the inner surface of the via hole 600 of the substrate 100.
  • the conductive metal is connected to the heat transfer metal layer 200 formed between the substrate 100 and the solder 300, and can radiate the heat of the heat transfer metal layer 200 from the top to the bottom of the substrate 100. there is.
  • the conductive metal 300 may extend from the inner surface of the via hole 600 to a land region around the entrance of the via hole 600.
  • the conductive metal may be made of the same material as the heat transfer metal layer 200.
  • the conductive metal is made of the same material as the heat transfer metal layer 200, the heat of the heat transfer metal layer 200 can be quickly dissipated from the top to the bottom of the substrate 100.
  • the conductive metal may include copper, but this is only an example and is not limited thereto.
  • the thickness of the conductive metal may be thinner than the thermally conductive metal layer.
  • the reason is to create a space inside the via hole to expand the surface area in contact with air.
  • the via hole 600 formed in the thermal pad 400 attachment area of the substrate 100 may have a plurality of via holes 600 arranged in a matrix form.
  • the plurality of via holes 600 arranged in a matrix form may have the same diameter and be arranged at equal intervals.
  • a resin layer to block the inflow of external air may be formed at the lower entrance of the via hole 600, which is formed only in the thermal pad attachment area of the substrate 100 among the plurality of via holes 600.
  • the reason is to prevent voids from being formed in the solder 600 in the area of the substrate 100 where the thermal pad 400 of the integrated circuit is attached.
  • the heat transfer metal layer 200 includes a first heat transfer metal layer formed on the upper part of the substrate 100 to which the integrated circuit is attached and in contact with the solder 300, and a second heat transfer metal layer formed on the lower part exposed to the outside. may include.
  • the thickness of the first heat transfer metal layer may be the same as the thickness of the second heat transfer metal layer.
  • the thickness of the first heat transfer metal layer may be thinner than the thickness of the second heat transfer metal layer.
  • the reason is that if the thickness of the second heat transfer metal layer located below the substrate 100 is thicker than the thickness of the first heat transfer metal layer, the surface area is increased, so heat transfer from the top to the bottom of the substrate 100 is fast and fast. Because it can progress.
  • the solder 300 may be printed through a metal mask to form a plurality of solders in the area of the substrate 100 where the thermal pad 400 of the integrated circuit (IC) package 500 is attached. there is.
  • the plurality of solders 300 formed in the attachment area of the thermal pad 400 of the substrate 100 are arranged so that adjacent solders 300 are staggered in at least one of the X-axis direction and the Y-axis direction. You can.
  • the plurality of solders 300 formed in the attachment area of the thermal pad 400 of the substrate 100 include a plurality of first solders having a first length, and are disposed at a predetermined distance from the first solder to form a first solder 300. It may include a plurality of second solders having a second length longer than the length.
  • first solder and the second solder may be arranged alternately in the X-axis direction.
  • the first solders may be disposed in corner areas of the second solders.
  • first solders may be disposed in the Y-axis direction, and one second solder may be disposed in the Y-axis direction.
  • the total area of the plurality of solders disposed in the Y-axis direction may be equal to the area of one solder disposed in the Y-axis direction, but this is only an example and is not limited thereto.
  • a plurality of first solders may be arranged side by side along a line parallel to the Y-axis direction.
  • a plurality of first solders may be disposed in the Y-axis direction toward the center of the attachment area of the thermal pad 400 of the substrate 100.
  • the amount of solder 300 formed in the attachment area of the thermal pad 400 of the substrate 100 is penetrating the open area of the metal mask having an area of 5% to 24% of the total area of the thermal pad 400. It may be the amount of solder (300).
  • the open area of the metal mask having an area of 5% to 24% may be an area corresponding to the thermal pad 400.
  • the amount of solder 300 formed in the attachment area of the thermal pad 400 of the substrate 100 may be determined according to the open area area of the metal mask corresponding to the attachment area of the thermal pad 400 of the substrate 100. .
  • the open area of the metal mask with an area of 5% to 24% can be aligned to correspond to the thermal pad attachment area of the substrate 100 when the metal mask is placed on the substrate 100 to perform soldering. there is.
  • the open area of the metal mask having an area of 5% to 24% may be composed of a plurality of hole patterns.
  • the plurality of hole patterns may be arranged so that adjacent hole patterns are staggered in at least one of the X-axis direction and the Y-axis direction.
  • adjacent hole patterns may have the same width and different lengths.
  • the plurality of hole patterns may include a plurality of first hole patterns having a first length, and a plurality of second holes arranged at regular intervals from the first hole pattern and having a second length longer than the first length.
  • first hole pattern and the second hole pattern may be alternately arranged in the X-axis direction.
  • first hole patterns may be disposed in corner areas of the second hole patterns.
  • first hole patterns may be arranged in the Y-axis direction, and one second hole pattern may be arranged in the Y-axis direction.
  • the total area of the plurality of first hole patterns arranged in the Y-axis direction may be equal to the area of one second hole pattern arranged in the Y-axis direction.
  • a plurality of first hole patterns may be arranged side by side along a line parallel to the Y-axis direction.
  • a plurality of first hole patterns may be arranged in the Y-axis direction toward the center area of the metal mask.
  • the present disclosure uses a metal mask to form a minimum amount of solder with low thermal conductivity and a thin thickness by arranging a plurality of solders in a minimal amount to cross each other in the area of the substrate where the thermal pad of the integrated circuit is attached. Maximum heat dissipation performance can be improved at minimum cost and system stability can be improved.
  • the present disclosure can improve heat dissipation performance by tenting the via hole entrance of the substrate with a resin layer to block external air from flowing into the solder and creating voids in the solder.
  • Figure 2 is a structural cross-sectional view for explaining a printed circuit board according to another embodiment of the present disclosure.
  • the printed circuit board of the present disclosure includes a substrate 100, solder 300 formed in a predetermined area of the substrate 100, and formed between the substrate 100 and the solder 300. It may include a heat transfer metal layer 200.
  • the substrate 100 may include a multi-substrate in which a plurality of layers 110, 120, and 130 are stacked.
  • a conductive metal layer 102 may be disposed between the plurality of stacked layers 110, 120, and 130.
  • a plurality of via holes 600 may be formed in the substrate 100 penetrating the upper portion where the integrated circuit package 500 is attached and the lower portion exposed to the outside.
  • the printed circuit board of FIG. 2 has the same configuration as the printed circuit board of FIG. 1 except for applying a multi-board in which a plurality of layers 110, 120, and 130 are stacked, a detailed description thereof will be omitted.
  • Figure 3 is a structural cross-sectional view for explaining a heat dissipation path of a printed circuit board according to an embodiment of the present disclosure.
  • the printed circuit board of the present disclosure uses a metal mask with an open area of a specific pattern to arrange a plurality of solders in a minimal amount in an alternating manner in the area of the substrate where the thermal pad of the integrated circuit is attached.
  • the largest amount of heat is emitted through the path of the via hole 600, and heat can be emitted through all other paths.
  • Figure 4 is a structural cross-sectional view of a heat transfer metal layer of a printed circuit board according to an embodiment of the present disclosure.
  • the heat transfer metal layer 200 is formed on the upper part of the substrate 100 to which the integrated circuit is attached and in contact with the solder, and on the lower part exposed to the outside. It may include a second heat transfer metal layer 220.
  • the thickness t2 of the first heat transfer metal layer 210 may be equal to the thickness t3 of the second heat transfer metal layer 220.
  • the thickness t2 of the first heat transfer metal layer 210 may be thinner than the thickness t3 of the second heat transfer metal layer 220.
  • the thickness t3 of the second heat transfer metal layer 220 located under the substrate 100 is thicker than the thickness t2 of the first heat transfer metal layer 210, the surface area is expanded and the surface area is expanded from the top of the substrate 100 to the bottom. This is because heat transfer to the furnace can proceed quickly and quickly.
  • a conductive metal 230 may be formed on the inner surface of the via hole 600 of the substrate 100.
  • the conductive metal 230 is connected to the first heat transfer metal layer 210 formed on the top of the substrate 100 and the second heat transfer metal layer 220 formed on the top of the substrate 100, and is connected to the integrated circuit. Heat can be dissipated from the top to the bottom of the substrate 100.
  • the conductive metal 230 may extend from the inner surface of the via hole 600 to a land region around the entrance of the via hole 600.
  • the conductive metal 230 may be made of the same material as the heat transfer metal layer 200.
  • the conductive metal 230 is made of the same material as the heat transfer metal layer 200, the heat of the integrated circuit is transmitted between the first heat transfer metal layer 210 and the second heat transfer metal layer 220 to the substrate 100. ) This is because it can be released quickly from the top to the bottom.
  • the conductive metal may include copper, but this is only an example and is not limited thereto.
  • the thickness t1 of the conductive metal 230 may be thinner than the thickness t2 of the first thermally conductive metal layer 210 and the thickness t3 of the second thermally conductive metal layer 220.
  • the reason is to create a space inside the via hole to expand the surface area in contact with air.
  • FIG. 5 is a diagram for explaining tenting of a via hole of a printed circuit board according to an embodiment of the present disclosure, and is a diagram showing a cross section of the printed circuit board and a corresponding plane.
  • the substrate 100 may be formed with a plurality of via holes 600 penetrating the upper part where the integrated circuit package is attached and the lower part exposed to the outside.
  • a resin layer 700 may be tented at the lower entrance of the via hole 600 to block the inflow of external air.
  • the reason for tenting the resin layer 700 is that when external air flows into the solder formed on the upper part of the substrate 100 through the via hole 600, a void is formed in the solder, reducing the heat dissipation performance of the solder. This is to block it because it can be a factor in deteriorating it.
  • the present disclosure can improve heat dissipation performance by tenting the via hole entrance of the substrate with a resin layer to block external air from flowing into the solder and creating voids in the solder.
  • Figure 6 is a diagram for explaining a tenting area of a printed circuit board according to an embodiment of the present disclosure.
  • a plurality of via holes 600 may be arranged in a matrix form in the thermal pad 400 attachment area 105 of the integrated circuit package 500 of the substrate 100.
  • the plurality of via holes 600 arranged in a matrix form may have the same diameter and be arranged at equal intervals.
  • the resin layer 700 to block the inflow of external air may be formed in the entire via hole 600 of the substrate 100.
  • the resin layer 700 for blocking external air inflow is formed only in the thermal pad 400 attachment area 105 of the substrate 100 among the plurality of via holes 600 ( It may be formed at the lower entrance of 600).
  • the reason is that when external air flows in through the via hole 600 and a void is formed in the solder 600 in the area of the substrate 100 where the thermal pad 400 of the integrated circuit is attached, the void causes heat in the integrated circuit. This is because it may reduce emission performance.
  • a resin layer 700 to block the inflow of external air at the lower entrance of the via hole 600 formed only in the attachment area 105 of the thermal pad 400 of the substrate 100, integrated Voids are prevented from being formed in the solder 600 in the area of the substrate 100 where the thermal pad 400 of the circuit package 500 is attached, and voids are formed only in the thermal pad 400 attachment area 105 of the substrate 100. This can minimize costs.
  • the heat dissipation performance of the via holes 600 other than the thermal pad 400 attachment area 105 of the substrate 100 can be effectively improved by leaving them open without tenting them with the resin layer 700. .
  • Figure 7 is a diagram for explaining solder formation of a printed circuit board according to an embodiment of the present disclosure.
  • a plurality of solder 300 of the present disclosure may be printed through the open area 910 of the metal mask 900 to form a plurality of solders 300 on the substrate 100 .
  • the plurality of solders 300 formed in the thermal pad attachment area 350 of the substrate 100 are arranged so that adjacent solders 300 are staggered in at least one of the X-axis direction and the Y-axis direction. You can.
  • the plurality of solders 300 formed in the thermal pad attachment area 350 of the substrate 100 include a plurality of first solders having a first length, and are disposed at a predetermined distance from the first solder to form a first solder 300. It may include a plurality of second solders having a second length longer than the length.
  • first solder and the second solder may be arranged alternately in the X-axis direction.
  • the first solders may be disposed in corner areas of the second solders.
  • the amount of solder 300 formed in the thermal pad attachment area 350 of the substrate 100 is the open area 910 of the metal mask 900 having an area of 5% to 24% of the total area of the thermal pad. It may be the amount of solder 300 penetrating.
  • the open area 910 of the metal mask 900 having an area of 5% to 24% may be an area corresponding to the thermal pad of the integrated circuit.
  • the amount of solder 300 formed in the thermal pad attachment area 350 of the substrate 100 is the open area 910 of the metal mask 900 corresponding to the thermal pad attachment area 350 of the substrate 100. It can be determined depending on the area.
  • the present disclosure adjusts the area of the open area 910 of the metal mask 900 to minimize the amount of solder 300 printed through the metal mask 900, so that the solder 300 strengthens the integrated circuit. By connecting and at the same time minimizing the amount of solder 300 with low thermal conductivity, heat dissipation performance can be improved.
  • FIG. 8 is a diagram for explaining an open area pattern of a metal mask corresponding to a thermal pad of an integrated circuit according to an embodiment of the present disclosure, and is a diagram showing a plane of a thermal pad of an integrated circuit and a metal mask.
  • the open area 910 of the metal mask 900 is a first open area 912 corresponding to the thermal pad 400 of the integrated circuit package 500 and the integrated circuit package 500. It may include a second open area 914 corresponding to the pin lead 510 of .
  • the area of the open areas 912 located in the central area 920 corresponding to the thermal pad 400 is 5% to 24% of the total area of the thermal pad 400. It can be manufactured to have.
  • the reason is that by adjusting the area of the first open area 912 of the metal mask 900 to minimize the amount of solder in the attachment area of the thermal pad 400 printed through the metal mask 900, the thermal conductivity is low. This is because heat dissipation performance can be improved by minimizing the amount of solder.
  • the first open area 912 of the metal mask 900 which has an area of 5% to 24% of the total area of the thermal pad 400, is used to position the metal mask 900 on the substrate to perform soldering. When doing so, it may be aligned to correspond to the attachment area of the thermal pad 400 of the substrate.
  • the first open area 912 of the metal mask 900 which has an area of 5% to 24% of the total area of the thermal pad 400, may be composed of a plurality of hole patterns.
  • 9 and 10 are diagrams for explaining the shape of an open area pattern of a metal mask according to an embodiment of the present disclosure.
  • the open area 910 of the metal mask 900 has a first open area 912 corresponding to a thermal pad of the integrated circuit package and a pin lead of the integrated circuit package. It may include a second open area 914.
  • the first open areas 912 located in the central area 920 corresponding to the thermal pad may have an area of 5% to 24% of the total area of the thermal pad. there is.
  • the first open area 912 of the metal mask 900 may be composed of a plurality of hole patterns.
  • the plurality of hole patterns may be arranged so that adjacent hole patterns are staggered in at least one of the X-axis direction and the Y-axis direction.
  • adjacent hole patterns may have the same width and different lengths.
  • the plurality of hole patterns may include a plurality of first hole patterns 912a having a first length L1, and a plurality of second hole patterns 912a disposed at regular intervals from the first hole pattern 912a and longer than the first length L1. It may include a plurality of second hole patterns 912b having a length L2.
  • first width W1 of the first hole pattern 912a and the second width W2 of the second hole pattern 912b may be the same.
  • first hole patterns 912a and the second hole patterns 912b may be alternately arranged in the X-axis direction.
  • first hole patterns 912a may be disposed in corner areas of the second hole patterns 912b.
  • a plurality of first hole patterns 912a may be arranged in the Y-axis direction, and one second hole pattern 912b may be arranged in the Y-axis direction.
  • the total area of the plurality of first hole patterns 912a arranged in the Y-axis direction may be equal to the area of one second hole pattern 912b arranged in the Y-axis direction.
  • a plurality of first hole patterns 912a may be arranged side by side along a line parallel to the Y-axis direction.
  • a plurality of first hole patterns 912a may be arranged in the Y-axis direction toward the center area of the metal mask 900.
  • the present disclosure forms hole patterns of a metal mask such that adjacent hole patterns are arranged alternately in at least one of the If components are generated, they can easily escape through the staggered hole pattern, making it easy to perform stable soldering.
  • FIGS. 11 and 12 are diagrams for explaining a solder arrangement pattern formed in the thermal pad attachment area according to an embodiment of the present disclosure.
  • FIG. 11 is a diagram formed using a metal mask having the hole pattern of FIG. 9. This is a diagram showing a solder arrangement pattern
  • FIG. 12 is a diagram showing a solder arrangement pattern formed using a metal mask having the hole pattern of FIG. 10.
  • a plurality of solder 300 of the present disclosure may be printed through the open area of the metal mask to form a plurality of solders 300 on the substrate 100 .
  • the plurality of solders 300 formed in the thermal pad attachment area 350 of the substrate 100 are arranged so that adjacent solders 300 are staggered in at least one of the X-axis direction and the Y-axis direction. You can.
  • the plurality of solders 300 formed in the thermal pad attachment area 350 of the substrate 100 include a plurality of first solders 310 having a first length L1, and a first solder 310. It may include a plurality of second solders 320 disposed at regular intervals from and having a second length L2 that is longer than the first length L1.
  • first solder 310 and the second solder 320 may be alternately arranged in the X-axis direction.
  • the first solders 310 may be disposed in corner areas of the second solders 320 .
  • first solders 310 may be disposed in the Y-axis direction, and one second solder 320 may be disposed in the Y-axis direction.
  • the total area of the plurality of first solders 310 disposed in the Y-axis direction may be equal to the area of one second solder 320 disposed in the Y-axis direction, but this is only an example. , but is not limited to this.
  • a plurality of first solders 310 may be arranged side by side along a line parallel to the Y-axis direction.
  • a plurality of first solders 310 may be disposed in the Y-axis direction toward the center of the attachment area 350 of the thermal pad 400 of the substrate 100.
  • the amount of the first and second solders 310 and 320 formed in the attachment area 350 of the thermal pad 400 of the substrate 100 is 5% to 24% of the total area of the thermal pad 400. It may be the amount of solder penetrating the open area of the metal mask having .
  • the amount of the first and second solders 310 and 320 formed in the attachment area 350 of the thermal pad 400 of the substrate 100 is It may be determined according to the open area area of the corresponding metal mask.
  • FIG. 13 is a diagram for explaining a void formed in solder of a printed circuit board according to an embodiment of the present disclosure.
  • the solder 300 has lower heat dissipation performance due to its lower thermal conductivity than other metals, and the solder paste melts during the reflow process, causing damage to the integrated circuit (IC) and the printed circuit board.
  • the volatile components of the solvent or resin cannot escape and the solder solidifies, resulting in voids 370.
  • the present disclosure forms hole patterns of a metal mask such that adjacent hole patterns are arranged alternately in at least one of the If this occurs, it can easily escape through the staggered hole pattern, making it easy to stably perform soldering.
  • the present disclosure can improve heat dissipation performance by minimizing the amount of solder by performing soldering through the open area of the metal mask having an area of 5% to 24% of the total area of the thermal pad.
  • the present disclosure can improve heat dissipation performance by tenting the via hole entrance of the substrate with a resin layer to block external air from flowing into the solder and creating voids in the solder.
  • Figure 14 is a table comparing the temperature of the integrated circuit corresponding to the open area ratio of the metal mask according to an embodiment of the present disclosure.
  • the temperature of the integrated circuit is about 101.1 degrees
  • the total area of the thermal pad is When soldering is performed through the open area of the metal mask, which has an area of about 25%, it can be seen that the temperature of the integrated circuit is about 99.2 degrees.
  • the temperature of the integrated circuit when soldering is performed through the open area of the metal mask having an area of about 20% of the total area of the thermal pad, the temperature of the integrated circuit is about 98.3 degrees, and compared to the total area of the thermal pad, the temperature of the integrated circuit is about 98.3 degrees. It can be seen that when soldering is performed through the open area of the metal mask having an area of about 10%, the temperature of the integrated circuit is lowered to about 97.8 degrees.
  • the present disclosure can improve heat dissipation performance by minimizing the amount of solder by performing soldering through the open area of the metal mask having an area of 5% to 24% of the total area of the thermal pad.
  • Figure 15 is a flowchart for explaining a method of soldering a printed circuit board according to an embodiment of the present disclosure.
  • the present disclosure can prepare a substrate on which a plurality of via holes are formed.
  • a heat transfer metal layer can be formed on the substrate (S10).
  • a metal mask having a plurality of open areas can be placed on the upper part of the substrate (S20).
  • the present disclosure can position a metal mask in which the open area corresponding to the thermal pad attachment area of the substrate among the total open areas of the metal mask has an area of 5% to 24% of the total area of the thermal pad.
  • the open area of the metal mask corresponding to the thermal pad attachment area of the substrate is composed of a plurality of hole patterns, and the plurality of hole patterns have adjacent hole patterns in at least one of the X-axis direction and the Y-axis direction. They can be arranged in a staggered direction.
  • solder can be formed on the substrate through the open area of the metal mask, and adjacent solders can be arranged to stagger each other in at least one of the X-axis direction and the Y-axis direction (S30).
  • the present disclosure limits the amount of solder formed in the thermal pad attachment area of the substrate to the amount of solder penetrating the open area of the metal mask having an area of 5% to 24% of the total area of the thermal pad. can be formed.
  • the metal mask can be removed (S40).
  • a resin layer to block the inflow of external air can be tented at the lower entrance of the via hole of the substrate (S50).
  • the present disclosure uses a metal mask to form a minimum amount of solder with low thermal conductivity and a thin thickness by arranging a plurality of solders in a minimal amount to cross each other in the area of the substrate where the thermal pad of the integrated circuit is attached. Maximum heat dissipation performance can be improved at minimum cost and system stability can be improved.
  • the present disclosure can improve heat dissipation performance by tenting the via hole entrance of the substrate with a resin layer to block external air from flowing into the solder and creating voids in the solder.
  • the industrial applicability is remarkable because it has the effect of improving maximum heat dissipation performance at minimum cost by forming a thin solder with a minimum amount.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

La présente divulgation concerne une carte de circuit imprimé apte à améliorer une performance de dissipation de chaleur, comprenant : un substrat ; une brasure formée dans une zone prédéterminée du substrat ; et une couche métallique de transfert de chaleur formée entre le substrat et la brasure, la brasure étant imprimée à travers un masque métallique de manière à ce qu'une pluralité de brèches soient formées dans une zone du substrat sur laquelle est fixée une pastille thermique d'un circuit intégré (CI), la pluralité de brèches formées dans la zone du substrat sur laquelle est fixée la pastille thermique pouvant être disposées de manière à ce que les brèches adjacentes soient décalées dans une direction d'axe X et/ou d'axe Y.
PCT/KR2022/014967 2022-10-05 2022-10-05 Carte de circuit imprimé et procédé de brasage associé Ceased WO2024075864A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/KR2022/014967 WO2024075864A1 (fr) 2022-10-05 2022-10-05 Carte de circuit imprimé et procédé de brasage associé
KR1020257010034A KR20250084125A (ko) 2022-10-05 2022-10-05 인쇄회로기판 및 그의 솔더링 방법
DE112022007725.5T DE112022007725T5 (de) 2022-10-05 2022-10-05 Leiterplatte und Lötverfahren hierfür

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/KR2022/014967 WO2024075864A1 (fr) 2022-10-05 2022-10-05 Carte de circuit imprimé et procédé de brasage associé

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WO2024075864A1 true WO2024075864A1 (fr) 2024-04-11

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KR (1) KR20250084125A (fr)
DE (1) DE112022007725T5 (fr)
WO (1) WO2024075864A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010062723A (ko) * 1999-12-28 2001-07-07 나까무라 쇼오 프린트기판 및 그 전기부품설치방법
JP2002026468A (ja) * 2000-06-30 2002-01-25 Internatl Business Mach Corp <Ibm> プリント配線基板及び半導体装置
JP2014036085A (ja) * 2012-08-08 2014-02-24 Canon Inc プリント配線板、プリント回路板及びプリント回路板の製造方法
JP2015023108A (ja) * 2013-07-18 2015-02-02 キヤノン株式会社 プリント配線板、プリント回路板及びプリント回路板の製造方法
JP2021022718A (ja) * 2019-07-30 2021-02-18 力成科技股▲分▼有限公司 パッケージ構造及びその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010062723A (ko) * 1999-12-28 2001-07-07 나까무라 쇼오 프린트기판 및 그 전기부품설치방법
JP2002026468A (ja) * 2000-06-30 2002-01-25 Internatl Business Mach Corp <Ibm> プリント配線基板及び半導体装置
JP2014036085A (ja) * 2012-08-08 2014-02-24 Canon Inc プリント配線板、プリント回路板及びプリント回路板の製造方法
JP2015023108A (ja) * 2013-07-18 2015-02-02 キヤノン株式会社 プリント配線板、プリント回路板及びプリント回路板の製造方法
JP2021022718A (ja) * 2019-07-30 2021-02-18 力成科技股▲分▼有限公司 パッケージ構造及びその製造方法

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DE112022007725T5 (de) 2025-06-18

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