WO2024051126A1 - Battery and preparation method for battery - Google Patents

Abstract

The present application belongs to the technical field of battery manufacturing. Disclosed are a battery and a preparation method for a battery, which are used for improving the photoelectric conversion efficiency of the battery. The battery comprises: a battery substrate; electrodes; a tunneling layer, one face of which is connected to a back face of the battery substrate, wherein the tunneling layer is made of a tantalum pentoxide material; and a doped-silicon layer, one face of which is connected to the other face of the tunneling layer.

Description

Battery and battery preparation method Technical field

The present application belongs to the technical field of battery manufacturing, and specifically relates to a battery and a method for preparing the battery.

Background technique

With the continuous development of photovoltaic cell technology, industry researchers have been pursuing higher photoelectric conversion efficiency. TOPCon is a solar cell technology based on the selective carrier principle of tunneling oxide layer passivation contact. Its cell structure is N-type silicon substrate battery, TOPCon technology aims to prepare an ultra-thin tunneling layer on the back of the battery and form a passivation contact structure, thereby effectively reducing surface recombination and metal contact recombination of the battery. In existing battery manufacturing, the tunneling layer on the back of the battery usually uses silicon oxide material.

However, the tunnel layer formed of silicon oxide material has a low light refractive index and a narrow transmission spectrum, resulting in low photoelectric conversion efficiency of the battery.

Contents of the invention

Embodiments of the present application provide a battery and a method for manufacturing the battery, which can solve the problem of low photoelectric conversion efficiency of the battery.

In a first aspect, embodiments of the present application provide a battery. The battery includes: a battery base; an electrode; and a tunneling layer. One side of the tunneling layer is connected to the back side of the battery base, and the tunneling layer is five Tantalum oxide material; doped silicon layer, the other side of the tunnel layer is connected to one side of the doped silicon layer.

In a second aspect, embodiments of the present application provide a method for manufacturing a battery. The method includes: arranging a tunneling layer on the back of the battery base so that one side of the tunnel layer is connected to the back of the battery base, wherein, The tunneling layer is made of tantalum pentoxide material; a doped silicon layer is provided on the other side of the tunneling layer, so that the tunneling layer and the doped silicon layer form a tunneling oxide layer passivation contact structure ; The battery substrate is screen printed and sintered to form an electrode.

In a third aspect, embodiments of the present application provide a battery preparation device, which includes: a first A setting module for setting a tunneling layer on the back of the battery base so that one side of the tunneling layer is connected to the back of the battery base, wherein the tunneling layer is made of tantalum pentoxide material; the second setting module , used to set a passivation layer on the other side of the tunnel layer, so that the tunnel layer and the passivation layer form a tunnel oxide layer passivation contact structure; a third setting module, used to set the passivation layer on the other side of the tunnel layer. The battery substrate is screen printed and sintered to form the electrodes.

In a fourth aspect, embodiments of the present application provide an electronic device. The electronic device includes a processor, a memory, and a program or instructions stored on the memory and executable on the processor. The program or instructions are When executed by the processor, the steps of the method described in the second aspect are implemented.

In a fifth aspect, embodiments of the present application provide a readable storage medium. Programs or instructions are stored on the readable storage medium. When the programs or instructions are executed by a processor, the steps of the method described in the second aspect are implemented. .

A battery provided by an embodiment of the present application includes a battery base; an electrode; a tunneling layer, one side of the tunneling layer is connected to the back of the battery base, and the tunneling layer is made of tantalum pentoxide material; a doped silicon layer, the tunneling layer The other side is connected to the side of the doped silicon layer. The tantalum pentoxide material is a high dielectric constant material, has good chemical stability and thermal stability, and is easily compatible with the semiconductor process. At the same time, the tantalum pentoxide material has High refractive index, band gap and affinity can generate extremely high electric fields to improve carrier transport. The tantalum pentoxide material is used as a tunneling layer on the back of the battery substrate to form a passivating tunnel oxide layer with the doped silicon layer. The chemical contact structure can effectively reduce the surface recombination and metal contact recombination of the battery, and can make the tunnel oxide layer passivation contact structure have better passivation effect and photoelectric conversion efficiency, and can improve the photoelectric conversion efficiency in the battery.

Description of the drawings

Figure 1 is a schematic structural diagram of a battery provided by an embodiment of the present application;

Figure 2 is a schematic flow chart of a battery preparation method provided by an embodiment of the present application;

Figure 3 is a schematic structural diagram of a battery preparation device provided by an embodiment of the present application;

FIG. 4 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.

Reference signs:
100-battery, 110-battery matrix, 120-electrode, 130-tunneling layer, 140-doped silicon layer, 150-silicon nitride passivation layer, 160-emitter, 170-aluminum oxide passivation layer, 180- Anti-reflective coating.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects and are not used to describe a specific order or sequence. It is to be understood that the figures so used are interchangeable under appropriate circumstances so that the embodiments of the present application can be practiced in orders other than those illustrated or described herein, and that "first," "second," etc. are distinguished Objects are usually of one type, and the number of objects is not limited. For example, the first object can be one or multiple. In addition, "and/or" in the description and claims indicates at least one of the connected objects, and the character "/" generally indicates that the related objects are in an "or" relationship.

A battery and a battery preparation method provided by embodiments of the present application will be described in detail below with reference to the accompanying drawings through specific embodiments and application scenarios.

Figure 1 is a schematic structural diagram of a battery provided by an embodiment of the present invention. As shown in Figure 1, the battery 100 includes: a battery base 110; an electrode 120; and a tunneling layer 130. One side of the tunneling layer 130 is connected to the The back surface of the battery base 110 is connected, and the tunnel layer 130 is made of tantalum pentoxide material; the doped silicon layer 140 is connected, and the other side of the tunnel layer 130 is connected to one side of the doped silicon layer 140 .

Specifically, the battery 100 in the embodiment of the present application may be a solar cell based on the Tunnel Oxide Passivated Contact (TOPCon) technology based on the selective carrier principle. The battery base 110 of the battery 100 It can be an N-type silicon substrate. The battery 100 is provided with an electrode 120 and a tunneling layer 130 is provided on the back of the battery 100. One side of the tunneling layer 130 is in contact with the battery. The back side of the base body 110 is connected. The tunnel layer 130 is made of tantalum pentoxide (Ta ₂ O ₅ ) material. A doped silicon layer 140 is also provided on the back side of the battery base body 110. One side of the doped silicon layer 140 is connected to the tunnel layer. The other side of 130 is connected, the tunnel layer 130 provides passivation, and the doped silicon layer 1440 provides a contact, and together form a passivation contact, so that the tunnel layer 130 and the doped silicon layer 140 can form a tunnel oxide passivation layer. contact structure. In the embodiment of the present application, the doped silicon layer 140 may be polysilicon doped with phosphorus material (N+-poly-Si).

A battery 100 provided by an embodiment of the present application includes a battery base 110; an electrode 120; a tunneling layer 130. One side of the tunneling layer 130 is connected to the back side of the battery base 110; the tunneling layer 130 is made of tantalum pentoxide material; doped The other side of the mixed silicon layer 140 and the tunnel layer 130 is connected to one side of the doped silicon layer 130. The tantalum pentoxide material is a high dielectric constant material, has good chemical stability and thermal stability, and is easy to integrate with the semiconductor process. At the same time, the tantalum pentoxide material has high refractive index, band gap and affinity, and can generate extremely high electric fields to improve carrier transport. The tantalum pentoxide material is used as the tunneling layer 130 and is placed on the back of the battery matrix 110 The tunnel oxide passivation contact structure formed with the doped silicon layer 140 can effectively reduce the surface recombination and metal contact recombination of the battery 100, making the tunnel oxide passivation contact structure have better passivation effect and photoelectricity. The conversion efficiency can improve the photoelectric conversion efficiency in the battery 100 .

In one implementation, the battery 100 further includes: a silicon nitride passivation layer 150 , and the silicon nitride passivation layer 150 is connected to the other side of the doped silicon layer 140 .

Specifically, as shown in FIG. 1 , a silicon nitride passivation layer 150 may also be provided on the back of the battery base 110 , wherein one side of the doped silicon layer 140 is connected to the tunneling layer 130 , and the other side of the doped silicon layer 140 is connected to the tunneling layer 130 . One side may be connected to one side of the silicon nitride passivation layer 150 , where the silicon nitride passivation layer 150 is formed of silicon nitride (SiN _x ) material.

In this way, by disposing the silicon nitride passivation layer 150 on the back surface of the battery base 110, a passivation effect can be provided for the battery 100, and the photoelectric conversion efficiency of the battery 100 can be improved.

In one implementation, the battery 100 further includes:

Emitter 160, the emitter 160 is located on the front of the battery base 110; an aluminum oxide passivation layer 170, one side of the aluminum oxide passivation layer 170 is connected to the front of the battery base 110; an anti-reflection film layer 180 , the anti-reflection film layer 180 is connected to the other side of the aluminum oxide passivation layer 170, so The anti-reflection film layer 180 is a stack of silicon nitride material, silicon hydroxide material and silicon oxide material.

Specifically, as shown in Figure 1, an emitter 160 is provided on the front side of the battery base 110. The boron-doped emitter 160 can be obtained by performing boron diffusion on the front side of the battery base 110. One side of the aluminum oxide passivation layer 170 is in contact with the emitter. 160 connection, the other side of the aluminum oxide passivation layer 170 is connected to the anti-reflection film layer 180. The anti-reflection film layer 180 can be a stack of silicon nitride material, silicon hydroxide material and silicon oxide material. The silicon nitride material, hydrogen The silicon oxide material and the layer arrangement of the silicon oxide material in the anti-reflection film layer 180 can be set according to requirements and are not specifically limited here.

In this way, by arranging the emitter 160 on the front side of the battery base 110, the battery 100 has the ability to generate electricity. The aluminum oxide passivation layer 170 and the anti-reflection film 180 layer can improve the excellent passivation effect of the battery 100 and improve the battery performance. The light refractive index of 100 improves the photoelectric conversion efficiency of the battery 100 .

In one implementation, the thickness of the tunneling layer 130 is greater than or equal to 1 nanometer and less than or equal to 3 nanometers.

Specifically, the thickness of the tunneling layer 130 on the back side of the battery base 110 can be between 1 nanometer and 3 nanometers. In this way, the tunneling layer 130 will not occupy too much space of the battery 110 and can passivate the tunnel oxide layer of the battery 110. The chemical contact structure provides better passivation effect and photoelectric conversion efficiency, and can improve the photoelectric conversion efficiency in the battery 100 .

The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above-mentioned specific implementations. The above-mentioned specific implementations are only illustrative and not restrictive. Those of ordinary skill in the art will Inspired by this application, without departing from the purpose of this application and the scope of protection of the claims, many forms can be made, all of which fall within the protection of this application. The scope of protection required by this application should be based on the scope of the claims. The content shall prevail, and the embodiments in this application may be used to interpret the content of the claims.

Figure 2 shows a schematic flow chart of a battery preparation method provided by an embodiment of the present invention. The method can be executed by a battery preparation equipment. The method includes the following steps:

Step 202: Set a tunneling layer on the back side of the battery substrate so that one side of the tunneling layer is in contact with the The back connection of the battery base.

Specifically, the battery in the embodiment of the present application may be a solar cell based on Tunnel Oxide Passivated Contact (TOPCon) technology based on the selective carrier principle, and the battery matrix of the battery may be N After obtaining the battery substrate, a tunnel layer can be set on the back of the battery substrate so that one side of the tunnel layer is connected to the back of the battery substrate. The tunnel layer can be made of tantalum pentoxide (Ta ₂ O ₅ ) Material formation.

Step 204: Provide a doped silicon layer on the other side of the tunnel layer, so that the tunnel layer and the doped silicon layer form a tunnel oxide layer passivation contact structure.

Specifically, after the tunnel layer is provided on the back side of the battery base, a doped silicon layer can be provided on the other side of the tunnel layer, so that the other side of the tunnel layer is connected to the doped silicon layer to form a passivation tunnel oxide layer. chemical contact structure.

Step 206: Screen-print the battery substrate and sinter it to form an electrode.

Specifically, after a tunneling layer and a passivation layer are provided on the back of the battery base, the battery base is screen printed and sintered to form an electrode to form a battery.

In the battery preparation method provided by the embodiment of the present invention, a tunneling layer is provided on the back of the battery base so that one side of the tunneling layer is connected to the back of the battery base, where the tunneling layer is made of tantalum pentoxide material; in the tunneling A doped silicon layer is provided on the other side of the layer so that the tunnel layer and the doped silicon layer form a tunnel oxide layer passivation contact structure; the battery substrate is screen printed and sintered to form an electrode. The tunnel layer of the obtained battery is composed of Tantalum pentoxide material is formed. Tantalum pentoxide material is a high dielectric constant material, has good chemical stability and thermal stability, and is easily compatible with semiconductor processes. At the same time, tantalum pentoxide material has high refractive index, band The gap and affinity can generate an extremely high electric field to improve carrier transport. The tantalum pentoxide material is used as a tunneling layer on the back of the battery substrate to form a tunneling oxide layer passivation contact structure with the doped silicon layer, which can This makes the tunnel oxide layer passivation contact structure have better passivation effect and photoelectric conversion efficiency, and can improve the photoelectric conversion efficiency in the battery.

In one implementation, providing a tunneling layer on the back side of the battery substrate includes:

Using tantalum pentafluoride as the tantalum source, hydrogen as the reducing agent, and oxygen as the oxidizing agent, it is produced through chemical vapor deposition. The method is to provide the tunneling layer on the back side of the battery substrate, wherein the thickness of the tunneling layer is greater than or equal to 1 nanometer and less than or equal to 3 nanometers.

Specifically, a tantalum pentoxide layer (tunneling layer) can be prepared on the back of the battery substrate by chemical vapor deposition, using tantalum pentafluoride as the tantalum source, hydrogen as the reducing agent, and oxygen as the oxidant. , the thickness of the tunneling layer obtained is between 1-3 nanometers.

In this way, by using tantalum pentafluoride as the tantalum source, hydrogen as the reducing agent, and oxygen as the oxidizing agent, the tunneling layer is provided on the back side of the battery substrate by chemical vapor deposition, and the thickness of the tunneling layer is 1 Between nanometers and 3 nanometers, the tunneling layer will not take up too much space in the battery, and can passivate the contact structure of the tunnel oxide layer for the battery, with better passivation effect and photoelectric conversion efficiency, which can improve the photoelectric conversion in the battery. efficiency.

In one implementation, before arranging the tunneling layer on the back side of the battery substrate, the method further includes:

Boron diffusion is performed on the front side of the textured battery base to form an emitter; and etching is performed on the back side of the battery base.

Specifically, before setting the tunneling layer on the back of the battery base, boron needs to be diffused on the front of the battery base to form an emitter (PN junction), and then the back of the battery base is etched. In this way, by performing the front side of the battery base Boron diffusion forms a space charge area (emitter) on the battery substrate, making the battery capable of generating electricity. Since boron diffusion on the front of the battery substrate will form a conductive substance on the battery substrate, it is easy to short-circuit the battery. Therefore, Through the etching operation, additional conductive substances generated on the battery matrix can be removed to prevent battery short circuits.

In one implementation, providing a doped silicon layer on the other side of the tunnel layer includes:

A polysilicon layer is provided on the other side of the tunnel layer, wherein the polysilicon layer is deposited by low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition or atmospheric pressure chemical vapor deposition; the polysilicon layer is Phosphorus doping operation to obtain the doped silicon layer.

Specifically, a doped silicon layer can be provided on the other side of the tunnel layer, where the doped silicon layer is located on the other side of the tunnel layer and is connected to the tunnel layer. After the tunnel layer is installed on the battery substrate, it can be Low A polysilicon layer is deposited on the back of the battery substrate by pressure chemical vapor deposition, plasma enhanced chemical vapor deposition or atmospheric pressure chemical vapor deposition, and then a phosphorus doping operation is performed on the polysilicon layer to obtain a doped silicon layer. The tunnel layer and the doped silicon layer form a tunnel oxide layer passivation contact structure.

In this way, by arranging a tunnel layer and a doped silicon layer on the back side of the battery base to form a tunnel oxide layer passivation contact structure, the surface recombination and metal contact recombination of the battery can be effectively reduced, and the tunnel layer is made of tantalum pentoxide material. , the doped silicon layer is a polysilicon layer doped with phosphorus material, which can make the passivation contact structure of the tunnel oxide layer have better passivation effect and photoelectric conversion efficiency, and can improve the photoelectric conversion efficiency in the battery.

In one implementation, the method further includes:

The resulting borosilicate glass layer and phosphosilicate glass layer are removed using a wet process.

Specifically, the wet process is used to remove the borosilicate glass layer and phosphosilicate glass layer produced on the battery substrate, which can prevent the photogenerated electrons collected by the emitter from diffusing along the borosilicate glass layer and phosphosilicate glass layer to avoid short circuit of the battery. The problem.

In one implementation, the method further includes:

A silicon nitride passivation layer is provided on one side of the doped silicon layer, where the doped silicon layer is located between the tunneling layer and the silicon nitride passivation layer; on the front side of the battery base An aluminum oxide passivation layer is provided, wherein the aluminum oxide passivation layer is deposited by atomic layer deposition or plasma-enhanced chemical vapor deposition; an anti-reflection film layer is provided on the front side of the battery substrate, and the oxidation layer is The aluminum passivation layer is located between the front surface of the battery substrate and the anti-reflective film layer, wherein the anti-reflective film layer is deposited by plasma enhanced chemical vapor deposition, and the anti-reflective mold layer is A stack of silicon nitride materials, silicon hydroxide materials and silicon oxide materials.

Specifically, after depositing the doped silicon layer, a silicon nitride passivation layer can be obtained by depositing silicon nitride on one side of the doped silicon layer. In this way, a nitride layer can be obtained by depositing silicon nitride on one side of the doped silicon layer. The silicon passivation layer can provide a passivation effect for the battery and improve the photoelectric conversion efficiency in the battery. Aluminum oxide passivation can be obtained by depositing aluminum oxide on the front of the battery substrate through atomic layer deposition or plasma enhanced chemical vapor deposition. layer, deposited by plasma-enhanced chemical vapor deposition Anti-reflection film layer, aluminum oxide passivation layer is located between the front side of the battery base and the anti-reflection film layer, the anti-reflection mold layer is a stack of silicon nitride material, silicon hydroxide material and silicon oxide material, silicon nitride The layer arrangement of the material, silicon hydroxide material and silicon oxide material in the anti-reflection film layer can be set according to requirements and is not specifically limited here. In this way, by providing an aluminum oxide passivation layer and an anti-reflection film layer on the front side of the battery substrate, an excellent passivation effect can be improved for the battery, the light refraction in the battery can be improved, and the photoelectric conversion efficiency in the battery can be improved.

The preparation method of the battery according to the embodiment of the present application is described in detail below through an example. The method includes the following steps:

Step 1: Perform front-side boron diffusion on the textured battery matrix to form an emitter (PN junction).

Step 2: Etch the back of the battery substrate.

Step 3: Deposit a tantalum pentoxide tunneling layer on the back of the battery substrate. The thickness of the tunneling layer is 1-3 nanometers. The tunneling layer uses tantalum pentafluoride as the tantalum source, hydrogen as the reducing agent, and oxygen as the oxidizing agent. , prepared by chemical vapor deposition.

Step 4: Deposit a polysilicon layer on the back of the battery substrate through low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition or atmospheric pressure chemical vapor deposition, and perform a phosphorus doping operation on the polysilicon layer to obtain a doped silicon layer, so that The doped silicon layer and the tunneling layer constitute the TopCon structure.

Step 5: Use a wet process to remove the produced borosilicate glass layer and phosphosilicate glass layer.

Step 6: Deposit aluminum oxide on the front side of the battery substrate through atomic layer deposition or plasma-enhanced chemical vapor deposition to obtain an aluminum oxide passivation layer. The thickness of the aluminum oxide passivation layer is between 2 and 11 nanometers.

Step 7: Deposit an anti-reflective film layer through plasma-enhanced chemical vapor deposition. The anti-reflective film layer is a stack of silicon nitride material, silicon hydroxide material and silicon oxide material.

Step 8: Deposit silicon nitride on one side of the doped silicon layer to obtain a silicon nitride passivation layer.

Step 9: Screen-print the battery matrix and sinter it to form the electrodes.

In the battery obtained through the above steps 1-9, the tunneling layer of the battery is made of tantalum pentoxide material. The tantalum pentoxide material is a high dielectric constant material, has good chemical stability and thermal stability, and is easy to interact with semiconductors. The tantalum pentoxide material is compatible with the process. At the same time, the tantalum pentoxide material has high refractive index, band gap and affinity, and can generate an extremely high electric field to improve carrier transport. The tantalum pentoxide material is set as a tunneling layer on the back of the battery matrix to The tunnel oxide layer passivation contact structure formed with the doped silicon layer can make the tunnel oxide layer passivation contact structure have better passivation effect and photoelectric conversion efficiency, and can improve the photoelectric conversion efficiency in the battery.

It should be noted that, for the battery preparation method provided by the embodiments of the present application, the execution subject may be a battery preparation device, or a control module in the battery preparation device for executing the battery preparation method. In the embodiments of the present application, a battery preparation device performing a battery preparation method is used as an example to illustrate the battery preparation device provided by the embodiments of the present application.

Figure 3 is a schematic structural diagram of a battery preparation device according to an embodiment of the present invention. As shown in FIG. 3 , the battery preparation device 300 includes: a first setting module 310 , a second setting module 320 , and a third setting module 330 .

The first setting module 310 is used to set a tunnel layer on the back of the battery base so that one side of the tunnel layer is connected to the back of the battery base, where the tunnel layer is made of tantalum pentoxide material; The second setting module 320 is used to set a doped silicon layer on the other side of the tunnel layer, so that the tunnel layer and the doped silicon layer form a tunnel oxide layer passivation contact structure; the third setting module 330, for screen printing and sintering the battery matrix to form electrodes.

In one implementation, the first setting module 310 is used to use tantalum pentafluoride as the tantalum source, hydrogen as the reducing agent, and oxygen as the oxidizing agent, and set all the settings on the back side of the battery substrate through chemical vapor deposition. The tunneling layer, wherein the thickness of the tunneling layer is greater than or equal to 1 nanometer and less than or equal to 3 nanometers.

In one implementation, the first setting module 310 is also used to diffuse boron on the front of the texturized battery base to form an emitter; and to perform an etching operation on the back of the battery base.

In one implementation, the second setting module 320 is also used to set a polysilicon layer on the other side of the tunnel layer, wherein the polysilicon layer is formed by low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, or Deposited by atmospheric pressure chemical vapor deposition; perform a phosphorus doping operation on the polysilicon layer to obtain the doped silicon layer.

In one implementation, the first setting module 310 is also used to remove the generated borosilicate glass layer and phosphosilicate glass layer using a wet process.

In one implementation, the first setting module 310 is also used to set a silicon nitride passivation layer on one side of the doped silicon layer, wherein the doped silicon layer is located between the tunnel layer and Between the silicon nitride passivation layers; an aluminum oxide passivation layer is provided on the front side of the battery substrate, wherein the aluminum oxide passivation layer is deposited by atomic layer deposition or plasma enhanced chemical vapor deposition. Obtain; An anti-reflection film layer is provided on the front side of the battery base, and the aluminum oxide passivation layer is located between the front side of the battery base and the anti-reflection film layer, wherein the anti-reflection film layer is formed by plasma It is deposited by volume-enhanced chemical vapor deposition, and the anti-reflection pattern layer is a stack of silicon nitride material, silicon hydroxide material and silicon oxide material.

The battery preparation device in the embodiment of the present application may be a device electronic device, or may be a component in a terminal electronic device, such as an integrated circuit or a chip. The electronic device may be a terminal or other devices other than the terminal. The device may be a mobile electronic device or a non-mobile electronic device. For example, the mobile electronic device can be a mobile phone, a tablet computer, a notebook computer, a handheld computer, a vehicle-mounted electronic device, a mobile Internet device (Mobile Internet Device, MID), or an augmented reality (Augmented Reality, AR)/virtual reality (Virtual Reality, VR) equipment, robots, wearable devices, ultra-mobile personal computers (UMPC), netbooks or personal digital assistants (Personal Digital Assistant, PDA), etc. Non-mobile electronic devices can also be servers, network-attached storage (Network Attached Storage, NAS), Personal Computer (Personal Computer, PC), Television (Television, TV), teller machine or self-service machine, etc., are not specifically limited in the embodiments of this application.

The battery preparation device in the embodiment of the present application may be a device with an operating system. The operating system can be an Android operating system, an ios operating system, or other possible operating systems, which are not specifically limited in the embodiments of this application.

The battery preparation device provided by the embodiment of the present application can implement each process implemented by the method embodiment in Figure 3. To avoid repetition, the details will not be described here.

Optionally, as shown in Figure 4, this embodiment of the present application further provides an electronic device 400, including a processor 401 and a memory 402. The memory 402 stores programs or instructions that can be run on the processor 401. When the program or instructions are executed by the processor 401, the following is achieved: setting a tunneling layer on the back of the battery base so that one side of the tunneling layer is connected to the back of the battery base, wherein the tunneling layer is tantalum pentoxide. Materials; disposing a doped silicon layer on the other side of the tunnel layer so that the tunnel layer and the doped silicon layer form a tunnel oxide layer passivation contact structure; performing screen printing on the battery substrate and sintered to form electrodes.

In one implementation, tantalum pentafluoride is used as the tantalum source, hydrogen is used as the reducing agent, and oxygen is used as the oxidant, and the tunneling layer is provided on the back side of the battery substrate through chemical vapor deposition, wherein the tunneling layer The thickness of the through layer is greater than or equal to 1 nanometer and less than or equal to 3 nanometers.

In one implementation, before arranging the tunneling layer on the back side of the battery substrate, the method further includes: performing boron diffusion on the front of the textured battery substrate to form an emitter; The back side is etched.

In one implementation, a polysilicon layer is provided on the other side of the tunnel layer, wherein the polysilicon layer is deposited by low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, or atmospheric pressure chemical vapor deposition. ; Perform a phosphorus doping operation on the polysilicon layer to obtain the doped silicon layer.

In one implementation, the method further includes removing the generated borosilicate glass layer and phosphosilicate glass layer using a wet process.

In one implementation, the method further includes: arranging a silicon nitride passivation layer on one side of the doped silicon layer, wherein the doped silicon layer is located between the tunneling layer and the silicon nitride layer. between the passivation layers; an aluminum oxide passivation layer is provided on the front side of the battery substrate, wherein the aluminum oxide passivation layer is deposited by atomic layer deposition or plasma enhanced chemical vapor deposition; in the An anti-reflection film layer is provided on the front side of the battery base, and the aluminum oxide passivation layer is located between the front side of the battery base and the anti-reflection film layer, wherein the anti-reflection film layer is a gas phase that enhances chemistry through plasma. Deposited by deposition, the anti-reflection pattern layer is a stack of silicon nitride material, silicon hydroxide material and silicon oxide material.

For specific execution steps, please refer to each step of the above-mentioned battery preparation method embodiment, and can achieve the same technical effect. To avoid repetition, they will not be described again here.

It should be noted that the electronic devices in the embodiments of the present application include: servers, terminals, or other devices other than terminals.

The above structure of the electronic device does not constitute a limitation on the electronic device. The electronic device may include more or less components than shown in the figure, or a combination of certain components, or a different arrangement of components, such as an input unit, which may include a graphics processor. (Graphics Processing Unit, GPU) and microphone, the display unit can be configured with a display panel in the form of a liquid crystal display, an organic light-emitting diode, etc. The user input unit includes at least one of a touch panel and other input devices. Touch panels are also called touch screens. Other input devices may include but are not limited to physical keyboards, function keys (such as volume control keys, switch keys, etc.), trackballs, mice, and joysticks, which will not be described again here.

Memory can be used to store software programs as well as various data. The memory may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image play function, etc.) etc. Furthermore, memory may include volatile memory or non-volatile memory, or memory may include both volatile and non-volatile memory. Among them, the non-volatile memory can be read-only memory (Read-Only Memory, ROM), programmable read-only memory (Programmable ROM, PROM), erasable programmable read-only memory (Erasable PROM, EPROM), electrically removable memory. Erase programmable read-only memory (Electrically EPROM, EEPROM) or flash memory. Volatile memory can be random access memory (Random Access Memory, RAM), static random access memory (Static RAM, SRAM), dynamic random access memory (Dynamic RAM, DRAM), synchronous dynamic random access memory (Synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (Double Data Rate SDRAM, DDRSDRAM), enhanced synchronous dynamic random access memory (Enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (Synch link DRAM) , SLDRAM) and direct memory bus random access memory (Direct Rambus RAM, DRRAM).

The processor may include one or more processing units; optionally, the processor integrates an application processor and a modem processor, where the application processor mainly handles operations involving the operating system, user interface, application programs, etc., and the modem processor The modulation processor mainly processes wireless communication signals, such as baseband processors. It can be understood that the above modem processor may not be integrated into the processor.

Embodiments of the present application also provide a readable storage medium. Programs or instructions are stored on the readable storage medium. When the program or instructions are executed by a processor, each process of the battery preparation method embodiment is implemented, and can achieve The same technical effects are not repeated here to avoid repetition.

Wherein, the processor is the processor in the electronic device described in the above embodiment. The readable storage media includes computer-readable storage media, such as ROM, RAM, magnetic disks or optical disks.

It should be noted that, in this document, the terms "comprising", "comprises" or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or device that includes a series of elements not only includes those elements, It also includes other elements not expressly listed or inherent in the process, method, article or apparatus. Without further limitation, an element defined by the statement "comprises a..." does not exclude the presence of additional identical elements in a process, method, article or apparatus that includes that element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, but may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved. Functions may be performed, for example, the methods described may be performed in an order different from that described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus the necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is better. implementation. Based on this understanding, the technical solution of the present application can be embodied in the form of a computer software product that is essentially or contributes to the existing technology. The computer software product is stored in a storage medium (such as ROM/RAM, disk , optical disk), including several instructions to cause a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of this application.

The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above-mentioned specific implementations. The above-mentioned specific implementations are only illustrative and not restrictive. Those of ordinary skill in the art will Inspired by this application, many forms can be made without departing from the purpose of this application and the scope protected by the claims, all of which fall within the protection of this application.

Claims (10)

A battery, characterized by including: battery matrix; electrode; A tunneling layer, one side of which is connected to the back of the battery substrate, and the tunneling layer is made of tantalum pentoxide material; Doped silicon layer, the other side of the tunnel layer is connected to one side of the doped silicon layer. The battery according to claim 1, characterized in that the battery further includes: A silicon nitride passivation layer is connected to the other side of the doped silicon layer. The battery according to claim 1, characterized in that the battery further includes: An emitter, the emitter is located on the front side of the battery base; An aluminum oxide passivation layer, one side of the aluminum oxide passivation layer is connected to the emitter layer; Anti-reflection film layer, the anti-reflection film layer is connected to the other side of the aluminum oxide passivation layer, the anti-reflection film layer is a stack of silicon nitride, silicon hydroxide and silicon oxide. The battery according to claim 1, wherein the thickness of the tunneling layer is greater than or equal to 1 nanometer and less than or equal to 3 nanometers. A method for preparing a battery, which is characterized by including: A tunneling layer is provided on the back side of the battery base so that one side of the tunneling layer is connected to the back side of the battery base, wherein the tunneling layer is made of tantalum pentoxide material; A doped silicon layer is provided on the other side of the tunnel layer, so that the tunnel layer and the doped silicon layer form a tunnel oxide layer passivation contact structure; The battery substrate is screen printed and sintered to form electrodes. The preparation method according to claim 5, characterized in that said providing a tunneling layer on the back side of the battery substrate includes: Using tantalum pentafluoride as the tantalum source, hydrogen as the reducing agent, and oxygen as the oxidizing agent, the tunneling layer is provided on the back side of the battery substrate by chemical vapor deposition, wherein the thickness of the tunneling layer is greater than or Which is equal to 1 nanometer and less than or equal to 3 nanometers. The preparation method according to claim 6, characterized in that before arranging the tunneling layer on the back side of the battery substrate, the method further includes: Perform front-side boron diffusion on the textured battery substrate to form an emitter; An etching operation is performed on the back side of the battery substrate. The preparation method according to claim 5, characterized in that said providing a doped silicon layer on the other side of the tunnel layer includes: A polysilicon layer is provided on the other side of the tunnel layer, wherein the polysilicon layer is deposited by low-pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, or atmospheric pressure chemical vapor deposition; The polysilicon layer is subjected to a phosphorus doping operation to obtain the doped silicon layer. The preparation method according to claim 5, characterized in that the method further includes: The resulting borosilicate glass layer and phosphosilicate glass layer are removed using a wet process. The preparation method according to claim 5, characterized in that the method further includes: A silicon nitride passivation layer is provided on one side of the doped silicon layer, wherein the doped silicon layer is located between the tunneling layer and the silicon nitride passivation layer; An aluminum oxide passivation layer is provided on the front side of the battery substrate, wherein the aluminum oxide passivation layer is deposited by atomic layer deposition or plasma enhanced chemical vapor deposition, and the thickness of the aluminum oxide; An anti-reflection film layer is provided on the front side of the battery base, and the aluminum oxide passivation layer is located between the front side of the battery base and the anti-reflection film layer, wherein the anti-reflection film layer is enhanced by plasma. Deposited by chemical vapor deposition.