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WO2019000180A1 - Configuration de signal de référence de démodulation - Google Patents

Configuration de signal de référence de démodulation Download PDF

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Publication number
WO2019000180A1
WO2019000180A1 PCT/CN2017/090039 CN2017090039W WO2019000180A1 WO 2019000180 A1 WO2019000180 A1 WO 2019000180A1 CN 2017090039 W CN2017090039 W CN 2017090039W WO 2019000180 A1 WO2019000180 A1 WO 2019000180A1
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WO
WIPO (PCT)
Prior art keywords
control channel
reference signal
demodulation reference
channel demodulation
signal pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/090039
Other languages
English (en)
Inventor
Hongmei Liu
Chenxi Zhu
Zhennian SUN
Haiming Wang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Mobility LLC
Original Assignee
Motorola Mobility LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Mobility LLC filed Critical Motorola Mobility LLC
Priority to PCT/CN2017/090039 priority Critical patent/WO2019000180A1/fr
Publication of WO2019000180A1 publication Critical patent/WO2019000180A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver
    • H04L5/0051—Allocation of pilot signals, i.e. of signals known to the receiver of dedicated pilots, i.e. pilots destined for a single user or terminal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0044—Allocation of payload; Allocation of data channels, e.g. PDSCH or PUSCH

Definitions

  • the subject matter disclosed herein relates generally to wireless communications and more particularly relates to demodulation reference signal configuration.
  • HARQ-ACK may represent collectively the Positive Acknowledge ( “ACK” ) and the Negative Acknowledge ( “NACK” ) .
  • ACK means that a TB is correctly received while NACK (or NAK) means a TB is erroneously received.
  • a PDSCH demodulation reference signal ( “DMRS” ) may be used.
  • DMRS PDSCH demodulation reference signal
  • multiple different PDSCH DMRS configurations may be possible.
  • the apparatus includes a receiver that receives a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • control channel is a downlink control channel. In a further embodiment, the control channel is a physical downlink control channel. In certain embodiments, the control channel demodulation reference signal is received in a single symbol and in a single physical resource block. In various embodiments, the control channel demodulation reference signal pattern is determined based on frequency division multiplexing, frequency division orthogonal cover codes, or some combination thereof. In some embodiments, the control channel demodulation reference signal pattern is determined based on cyclic shift, comb, or some combination thereof. In one embodiment, the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block. In a further embodiment, the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block. In certain embodiments, the control channel demodulation reference signal is received in multiple symbols.
  • the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments, a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment, a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment, the control channel demodulation reference signal is received in multiple physical resource blocks. In certain embodiments, the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments, the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments, the control channel demodulation reference signal pattern is based on a full system bandwidth.
  • control channel demodulation reference signal pattern is based on a control channel element length.
  • control channel demodulation reference signal pattern is a predefined pattern known to both the apparatus and a base unit.
  • control channel demodulation reference signal pattern is signaled from a base unit to the apparatus by radio resource control signaling.
  • control channel demodulation reference signal pattern is signaled from a base unit to the apparatus by a master information block.
  • a method for demodulation reference signal configuration includes determining a control channel demodulation reference signal pattern. In some embodiments, the method includes receiving a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • an apparatus for demodulation reference signal configuration includes a processor that determines a control channel demodulation reference signal pattern. In some embodiments, the apparatus includes a transmitter that transmits a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • control channel is a downlink control channel. In a further embodiment, the control channel is a physical downlink control channel. In certain embodiments, the control channel demodulation reference signal is transmitted in a single symbol and in a single physical resource block. In various embodiments, the control channel demodulation reference signal pattern is determined based on frequency division multiplexing, frequency division orthogonal cover codes, or some combination thereof. In some embodiments, the control channel demodulation reference signal pattern is determined based on cyclic shift, comb, or some combination thereof. In one embodiment, the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block. In a further embodiment, the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block. In certain embodiments, the control channel demodulation reference signal is transmitted in multiple symbols.
  • the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments, a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment, a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment, the control channel demodulation reference signal is transmitted in multiple physical resource blocks. In certain embodiments, the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments, the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments, the control channel demodulation reference signal pattern is based on a full system bandwidth.
  • control channel demodulation reference signal pattern is based on a control channel element length.
  • control channel demodulation reference signal pattern is a predefined pattern known to both the apparatus and a remote unit.
  • control channel demodulation reference signal pattern is signaled from the apparatus to a remote unit by radio resource control signaling.
  • control channel demodulation reference signal pattern is signaled from the apparatus to a remote unit by a master information block.
  • a method for demodulation reference signal configuration includes determining a control channel demodulation reference signal pattern.
  • the method includes transmitting a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • Figure 1 is a schematic block diagram illustrating one embodiment of a wireless communication system for demodulation reference signal configuration
  • Figure 2 is a schematic block diagram illustrating one embodiment of an apparatus that may be used for demodulation reference signal configuration
  • Figure 3 is a schematic block diagram illustrating one embodiment of an apparatus that may be used for demodulation reference signal configuration
  • Figure 4 is a schematic block diagram illustrating one embodiment of localized CCE-REG mapping
  • Figure 5 is a schematic block diagram illustrating one embodiment of distributed CCE-REG mapping
  • Figure 6 is a schematic block diagram illustrating one embodiment of CCE-REG mapping in a time domain across 2 symbols
  • Figure 7 is a schematic block diagram illustrating one embodiment of CCE-REG mapping in a time domain across 3 symbols
  • Figure 8 is a schematic block diagram illustrating one embodiment of a DMRS pattern for a single symbol
  • Figure 9 is a schematic block diagram illustrating one embodiment of a DMRS pattern for two symbols
  • Figure 10 is a schematic block diagram illustrating one embodiment of a DMRS pattern in which different DMRS bearing PRBs may be used for different symbols;
  • Figure 11 is a schematic flow chart diagram illustrating one embodiment of a method for demodulation reference signal configuration.
  • Figure 12 is a schematic flow chart diagram illustrating another embodiment of a method for demodulation reference signal configuration.
  • embodiments may be embodied as a system, apparatus, method, or program product. Accordingly, embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc. ) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit, ” “module” or “system. ” Furthermore, embodiments may take the form of a program product embodied in one or more computer readable storage devices storing machine readable code, computer readable code, and/or program code, referred hereafter as code. The storage devices may be tangible, non-transitory, and/or non-transmission. The storage devices may not embody signals. In a certain embodiment, the storage devices only employ signals for accessing code.
  • modules may be implemented as a hardware circuit comprising custom very-large- scale integration ( “VLSI” ) circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components.
  • VLSI very-large- scale integration
  • a module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.
  • Modules may also be implemented in code and/or software for execution by various types of processors.
  • An identified module of code may, for instance, include one or more physical or logical blocks of executable code which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module need not be physically located together, but may include disparate instructions stored in different locations which, when joined logically together, include the module and achieve the stated purpose for the module.
  • a module of code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices.
  • operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different computer readable storage devices.
  • the software portions are stored on one or more computer readable storage devices.
  • the computer readable medium may be a computer readable storage medium.
  • the computer readable storage medium may be a storage device storing the code.
  • the storage device may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, holographic, micromechanical, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.
  • a storage device More specific examples (a non-exhaustive list) of the storage device would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory ( “RAM” ) , a read-only memory ( “ROM” ) , an erasable programmable read-only memory ( “EPROM” or Flash memory) , a portable compact disc read-only memory (CD-ROM” ) , an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
  • a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
  • Code for carrying out operations for embodiments may be any number of lines and may be written in any combination of one or more programming languages including an object oriented programming language such as Python, Ruby, Java, Smalltalk, C++, or the like, and conventional procedural programming languages, such as the ′′C′′ programming language, or the like, and/or machine languages such as assembly languages.
  • the code may execute entirely on the user′s computer, partly on the user′s computer, as a stand-alone software package, partly on the user′s computer and partly on a remote computer or entirely on the remote computer or server.
  • the remote computer may be connected to the user′s computer through any type of network, including a local area network ( “LAN” ) or a wide area network ( “WAN” ) , or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider) .
  • LAN local area network
  • WAN wide area network
  • the code may also be stored in a storage device that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the storage device produce an article of manufacture including instructions which implement the function/act specified in the schematic flowchart diagrams and/or schematic block diagrams block or blocks.
  • the code may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the code which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
  • each block in the schematic flowchart diagrams and/or schematic block diagrams may represent a module, segment, or portion of code, which includes one or more executable instructions of the code for implementing the specified logical function (s) .
  • Figure 1 depicts an embodiment of a wireless communication system 100 for demodulation reference signal configuration.
  • the wireless communication system 100 includes remote units 102 and base units 104. Even though a specific number of remote units 102 and base units 104 are depicted in Figure 1, one of skill in the art will recognize that any number of remote units 102 and base units 104 may be included in the wireless communication system 100.
  • the remote units 102 may include computing devices, such as desktop computers, laptop computers, personal digital assistants ( “PDAs” ) , tablet computers, smart phones, smart televisions (e.g., televisions connected to the Internet) , set-top boxes, game consoles, security systems (including security cameras) , vehicle on-board computers, network devices (e.g., routers, switches, modems) , or the like.
  • the remote units 102 include wearable devices, such as smart watches, fitness bands, optical head-mounted displays, or the like.
  • the remote units 102 may be referred to as subscriber units, mobiles, mobile stations, users, terminals, mobile terminals, fixed terminals, subscriber stations, UE, user terminals, a device, or by other terminology used in the art.
  • the remote units 102 may communicate directly with one or more of the base units 104 via UL communication signals.
  • the base units 104 may be distributed over a geographic region.
  • a base unit 104 may also be referred to as an access point, an access terminal, a base, a base station, a Node-B, an eNB, a gNB, a Home Node-B, a relay node, a device, or by any other terminology used in the art.
  • the base units 104 are generally part of a radio access network that includes one or more controllers communicably coupled to one or more corresponding base units 104.
  • the radio access network is generally communicably coupled to one or more core networks, which may be coupled to other networks, like the Internet and public switched telephone networks, among other networks. These and other elements of radio access and core networks are not illustrated but are well known generally by those having ordinary skill inthe art.
  • the wireless communication system 100 is compliant with the 3GPP protocol, wherein the base unit 104 transmits using an OFDM modulation scheme on the DL and the remote units 102 transmit on the UL using a SC-FDMA scheme or an OFDM scheme. More generally, however, the wireless communication system 100 may implement some other open or proprietary communication protocol, for example, WiMAX, among other protocols. The present disclosure is not intended to be limited to the implementation of any particular wireless communication system architecture or protocol.
  • the base units 104 may serve a number of remote units 102 within a serving area, for example, a cell or a cell sector via a wireless communication link.
  • the base units 104 transmit DL communication signals to serve the remote units 102 in the time, frequency, and/or spatial domain.
  • a remote unit 102 may determine a control channel demodulation reference signal pattern. In some embodiments, the remote unit 102 may receive a control channel demodulation reference signal based on the control channel demodulation reference signal pattern. Accordingly, a remote unit 102 may be used for demodulation reference signal configuration.
  • a base unit 104 may determine a control channel demodulation reference signal pattern. In various embodiments, the base unit 104 may transmit a control channel demodulation reference signal based on the control channel demodulation reference signal pattern. Accordingly, a base unit 104 may be used for demodulation reference signal configuration.
  • Figure 2 depicts one embodiment of an apparatus 200 that may be used for demodulation reference signal configuration.
  • the apparatus 200 includes one embodiment of the remote unit 102.
  • the remote unit 102 may include a processor 202, a memory 204, an input device 206, a display 208, a transmitter 210, and a receiver 212.
  • the input device 206 and the display 208 are combined into a single device, such as a touchscreen.
  • the remote unit 102 may not include any input device 206 and/or display 208.
  • the remote unit 102 may include one or more of the processor 202, the memory 204, the transmitter 210, and the receiver 212, and may not include the input device 206 and/or the display 208.
  • the processor 202 may include any known controller capable of executing computer-readable instructions and/or capable of performing logical operations.
  • the processor 202 may be a microcontroller, a microprocessor, a central processing unit ( “CPU” ) , a graphics processing unit ( “GPU” ) , an auxiliary processing unit, a field programmable gate array ( “FPGA” ) , or similar programmable controller.
  • the processor 202 executes instructions stored in the memory 204 to perform the methods and routines described herein.
  • the processor 202 may determine a control channel demodulation reference signal pattern.
  • the processor 202 is communicatively coupled to the memory 204, the input device 206, the display 208, the transmitter 210, and the receiver 212.
  • the memory 204 in one embodiment, is a computer readable storage medium.
  • the memory 204 includes volatile computer storage media.
  • the memory 204 may include a RAM, including dynamic RAM ( “DRAM” ) , synchronous dynamic RAM ( “SDRAM” ) , and/or static RAM ( “SRAM” ) .
  • the memory 204 includes non-volatile computer storage media.
  • the memory 204 may include a hard disk drive, a flash memory, or any other suitable non-volatile computer storage device.
  • the memory 204 includes both volatile and non-volatile computer storage media.
  • the memory 204 stores data relating to DMRS configurations.
  • the memory 204 also stores program code and related data, such as an operating system or other controller algorithms operating on the remote unit 102.
  • the input device 206 may include any known computer input device including a touch panel, a button, a keyboard, a stylus, a microphone, or the like.
  • the input device 206 may be integrated with the display 208, for example, as a touchscreen or similar touch-sensitive display.
  • the input device 206 includes a touchscreen such that text may be input using a virtual keyboard displayed on the touchscreen and/or by handwriting on the touchscreen.
  • the input device 206 includes two or more different devices, such as a keyboard and a touch panel.
  • the display 208 may include any known electronically controllable display or display device.
  • the display 208 may be designed to output visual, audible, and/or haptic signals.
  • the display 208 includes an electronic display capable of outputting visual data to a user.
  • the display 208 may include, but is not limited to, an LCD display, an LED display, an OLED display, a projector, or similar display device capable of outputting images, text, or the like to a user.
  • the display 208 may include a wearable display such as a smart watch, smart glasses, a heads-up display, or the like.
  • the display 208 may be a component of a smart phone, a personal digital assistant, a television, a table computer, a notebook (laptop) computer, a personal computer, a vehicle dashboard, or the like.
  • the display 208 includes one or more speakers for producing sound.
  • the display 208 may produce an audible alert or notification (e.g., a beep or chime) .
  • the display 208 includes one or more haptic devices for producing vibrations, motion, or other haptic feedback.
  • all or portions of the display 208 may be integrated with the input device 206.
  • the input device 206 and display 208 may form a touchscreen or similar touch-sensitive display.
  • the display 208 may be located near the input device 206.
  • the transmitter 210 is used to provide UL communication signals to the base unit 104 and the receiver 212 is used to receive DL communication signals from the base unit 104.
  • the receiver 212 may be used to receive a control channel demodulation reference signal based on a control channel demodulation reference signal pattern.
  • the remote unit 102 may have any suitable number of transmitters 210 and receivers 212.
  • the transmitter 210 and the receiver 212 may be any suitable type of transmitters and receivers.
  • the transmitter 210 and the receiver 212 may be part of a transceiver.
  • Figure 3 depicts one embodiment of an apparatus 300 that may be used for demodulation reference signal configuration.
  • the apparatus 300 includes one embodiment of the base unit 104.
  • the base unit 104 may include a processor 302, a memory 304, an input device 306, a display 308, a transmitter 310, and a receiver 312.
  • the processor 302, the memory 304, the input device 306, the display 308, the transmitter 310, and the receiver 312 may be substantially similar to the processor 202, the memory 204, the input device 206, the display 208, the transmitter 210, and the receiver 212 of the remote unit 102, respectively.
  • the processor 302 may determine a control channel demodulation reference signal pattern.
  • the transmitter 310 may transmit a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • the base unit 104 may have any suitable number of transmitters 310 and receivers 312.
  • the transmitter 310 and the receiver 312 may be any suitable type of transmitters and receivers.
  • the transmitter 310 and the receiver 312 may be part of a transceiver.
  • Various PDSCH DMRS embodiments may have a front-loaded DMRS.
  • a first front loaded PDSCH DMRS embodiment up to 8 ports may be supported.
  • Such embodiments may have an interleaved frequency division multiplexing ( “IFDM” ) based pattern with comb 2 and/or comb 4 with cyclic shifts ( “CS” ) .
  • the first front loaded PDSCH DMRS configuration may have one OFDM symbol.
  • the one OFDM symbol may, in various configurations, be comb 2 plus 2 CS for up to 4 ports.
  • the one OFDM symbol may be comb 4 plus 2 CS for up to 8 ports.
  • the first front loaded PDSCH DMRS configuration may have two OFDM symbols.
  • the two OFDM symbols may, in some configurations, be selected from: comb 2 plus 2 CS plus TD-OCC of ( ⁇ 1 1 ⁇ and ⁇ 1 -1 ⁇ ) for up to 8 ports; comb 2 plus 4 CS plus TD-OCC ( ⁇ 1 1 ⁇ ) for up to 8 ports; and comb 4 plus 2 CS plus TD-OCC ( ⁇ 1 1 ⁇ ) for up to 8 ports.
  • a second front loaded PDSCH DMRS embodiment up to 12 ports may be supported. Such embodiments may have an FD-OCC based pattern with adjacent REs in the frequency domain.
  • the second front loaded PDSCH DMRS configuration may have one OFDM symbol. The one OFDM symbol may, in various configurations, be selected from: 2 FD-OCC across adjacent REs in the frequency domain for up to 6 ports; 2 FD-OCC across adjacent REs in the frequency domain for up to 4 ports; and 2 FD-OCC across adjacent REs in the frequency domain for up to 2 ports.
  • the second front loaded PDSCH DMRS configuration may have two OFDM symbols.
  • the two OFDM symbols may, in some configurations, be selected from: 2 FD-OCC across adjacent REs in the frequency domain plus TDM for up to 12 ports; and 2 FD-OCC across adjacent REs in the frequency domain plus TD-OCC ( ⁇ 1 1 ⁇ and ⁇ 1 -1 ⁇ ) for up to 12 ports.
  • PDCCH may be carried by one or more control channel elements ( “CCEs” ) .
  • CCE may correspond to 6 resource element groups ( “REGs” ) .
  • REG may correspond to a PRB.
  • a CCE-REG mapping may be performed frequency first; while, in another embodiment a CCE-REG mapping may be performed time first.
  • the CCE-REG mapping may be distributed or localized in a frequency domain.
  • 1 to 3 symbols may be shared by different remote unit’s 102 PDCCH.
  • PDCCH demodulation may be based on DMRS to provide beamforming gain.
  • PDCCH DMRS ports may be at most 2.
  • multiplexing methods may be FDM, FD-OCC, TDM, TD-OCC, CS, comb, and any combination thereof.
  • frequency domain CCE-REG mapping either localized or distributed mapping may be used.
  • a “symbol” may be an OFDM symbol.
  • FIG. 4 is a schematic block diagram illustrating one embodiment of localized CCE-REG mapping 400.
  • the localized CCE-REG mapping 400 is performed over one symbol 402 and uses adjacent PRBs 404. Specifically, a first REG 406 occupies the symbol 402 in a PRB 404, a second REG 408 occupies the symbol 402 in an adjacent PRB 404, a third REG 410 occupies the symbol 402 in an adjacent PRB 404, a fourth REG 412 occupies the symbol 402 in an adjacent PRB 404, a fifth REG 414 occupies the symbol 402 in an adjacent PRB 404, and a sixth REG 416 occupies the symbol 402 in an adjacent PRB 404.
  • each of the 6 REGs are mapped in adjacent PRBs 404 in one symbol.
  • FIG. 5 is a schematic block diagram illustrating one embodiment of distributed CCE-REG mapping 500.
  • the distributed CCE-REG mapping 500 is performed over one symbol 502 and uses non-adjacent PRBs 504. Specifically, a first REG 506 occupies the symbol 502 in a PRB 504, a second REG 508 occupies the symbol 502 in a non-adjacent PRB 504, a third REG 510 occupies the symbol 502 in a non-adjacent PRB 504, a fourth REG 512 occupies the symbol 502 in a non-adjacent PRB 504, a fifth REG 514 occupies the symbol 502 in a non-adjacent PRB 504, and a sixth REG 516 occupies the symbol 502 in a non-adjacent PRB 504.
  • each of the 6 REGs are mapped in non-adjacent PRB 504 in one symbol.
  • Figure 6 is a schematic block diagram illustrating one embodiment of CCE-REG mapping 600 in a time domain across 2 symbols.
  • either time first or frequency first mapping may be used in response to there being more than 1 symbol for PDCCH.
  • time first mapping is used in response to there being more than 1 symbol for PDCCH.
  • a first REG 606 is mapped; in a second symbol 608 and the first PRB 604, a second REG 610 is mapped; in the first symbol 602 and a second PRB 612, a third REG 614 is mapped; in the second symbol 608 and the second PRB 612, a fourth REG 616 is mapped; in the first symbol 602 and a third PRB 618, a fifth REG 620 is mapped; and in the second symbol 608 and the third PRB 618, a sixth REG 622 is mapped.
  • frequency first mapping may be constructed by the following: mapping the first REG 606 to the first symbol 602 and the first PRB 604; mapping the second REG 610 to the first symbol 602 and the second PRB 604; mapping the third REG 614 to the first symbol 602 and the third PRB 618; mapping the fourth REG 616 to the second symbol 608 and the first PRB 604; mapping the fifth REG 620 to the second symbol 608 and the second PRB 612; and mapping the sixth REG 622 to the second symbol 608 and the third PRB 618.
  • Figure 7 is a schematic block diagram illustrating one embodiment of CCE-REG mapping 700 in a time domain across 3 symbols.
  • either time first or frequency first mapping may be used in response to there being more than 1 symbol for PDCCH.
  • time first mapping is used in response to there being more than 1 symbol for PDCCH.
  • a first REG 706 is mapped; in a second symbol 708 and the first PRB 704, a second REG 710 is mapped; in a third symbol 712 and the first PRB 704, a third REG 714 is mapped; in the first symbol 702 and a second PRB 716, a fourth REG 718 is mapped; in the second symbol 708 and the second PRB 716, a fifth REG 720 is mapped; and in the third symbol 712 and the second PRB 716, a sixth REG 722 is mapped.
  • frequency domain first mapping can also be constructed in a similar manner.
  • Figure 8 is a schematic block diagram illustrating one embodiment of a DMRS pattern 800 for a single symbol and a single PRB.
  • a PDCCH DMRS pattern design may be based on a CCE structure.
  • a basis DMRS pattern for 1-symbol single PRB may be used, and the basis DMRS pattern may be extended in the frequency domain and time domain to match a specific PDCCH resource occupation.
  • the DMRS pattern 800 may be for a single PRB and a single symbol 802 and may be distributed over subcarriers 804.
  • the DMRS pattern 800 includes a first RE 806 (in subcarrier 0) , a second RE 808 (in subcarrier 1) , a third RE 810 (in subcarrier 6) , and a fourth RE 812 (in subcarrier 7) .
  • FDM and/or FD-OCC may be used in the frequency domain. In one embodiment, only antenna ports 0 and 1 may be used. If FDM is used, with 4 REs used for DMRS, a first and third RE may be used by antenna port 0, and a second and fourth RE may be used by antenna port 1.
  • a first RE may be used by antenna port 0, and a second RE may be used by antenna port 1.
  • a first and second RE may be used by antenna port 0 with OCC sequence (+1, +1)
  • a first and second RE may also be used by antenna port 1 with OCC sequence (+1, -1) .
  • a third and fourth RE may be used by antenna port 0 with OCC sequence (+1, +1)
  • a third and fourth RE may be used by antenna port 1 with OCC sequence (+1, -1) .
  • only antenna 0 may be used.
  • a first RE may be used for antenna 0. If FDM and 2 RE occupation are used, a first and third RE may be used for antenna 0. If FD-OCC and 2 RE occupation are used, a first and second RE may be used with OCC sequence (+1, +1) . If FD-OCC and 4 RE occupation are used, a first and second RE may be used with OCC sequence (+1, +1) , and a third and fourth RE may be used with OCC sequence (+1, +1) .
  • the antenna port number may dynamically change from 1 to 2
  • FD-OCC of both antenna ports may be used to keep a common structure of two cases.
  • the third RE 810 and the fourth RE 812 e.g., two subcarriers 6 and 7
  • the first RE 806 and the second RE 808 e.g., two subcarriers 0 and 1.
  • frequency PRB and RE level domain density of PDCCH DMRS may consider a tradeoff between overhead consumption and channel estimation accuracy.
  • the DMRS beating REs within a PRB may be any suitable number (e.g., 1, 2, 3, 4, 6, etc. ) .
  • the DMRS bearing PRBs may be 2 within a CCE, and the DMRS bearing PRBs may be subject to a CCE-REG mapping structure.
  • REG 3 and/or REG 4 of Figure 4 may be selected as the DMRS bearing PRB, or REG 2 and/or REG 5 of Figure 5 may be selected as the DMRS beating PRB.
  • CS and/or comb may also be used in the frequency domain within a PRB to multiplex different DMRS ports.
  • Figure 9 is a schematic block diagram illustrating one embodiment of a DMRS pattern 900 for two symbols.
  • a PDCCH DMRS pattern for multiple symbols may be constructed by a time domain repetition of a single symbol case (e.g., repetition of the DMRS pattern 800 of Figure 8.
  • the DMRS pattern 900 may be for a single PRB, a first symbol 902, and a second symbol 903, and may be distributed over subcarriers 904.
  • the DMRS pattern 900 includes in the first symbol 902, a first RE 906 (in subcarrier 0) , a second RE 908 (in subcarrier 1) , a third RE 910 (in subcarrier 6) , and a fourth RE 912 (in subcarrier 7) .
  • the DMRS pattern 900 includes in the second symbol 903, a fifth RE 914 (in subcarrier 0) , a sixth RE 916 (in subcarrier 1) , a seventh RE 918 (in subcarrier 6) , and an eighth RE 920 (in subcarrier 7) .
  • a DMRS beating PRB in a frequency domain may be a part of the PRBs.
  • DMRS bearing PRBs may be the same for both symbols.
  • REG 3 and/or REG 4 of Figure 6 may be selected as the DMRS bearing PRB for both symbols, or REG 1 and/or REG 2 of Figure 7 may be selected as the DMRS bearing PRB for both symbols.
  • FIG 10 is a schematic block diagram illustrating one embodiment of a DMRS pattern 1000 in which different DMRS bearing PRBs may be used for different symbols.
  • the DMRS pattern 1000 may be for multiple PRBs, a first symbol 1002, and a second symbol 1003, and may be distributed over subcarriers 1004.
  • the DMRS pattern 1000 includes in the first symbol 1002, a first RE 1006 (in subcarrier 0) , a second RE 1008 (in subcarrier 1) , a third RE 1010 (in subcarrier 6) , and a fourth RE 1012 (in subcarrier 7) .
  • the DMRS pattern 1000 includes in the second symbol 1003, a fifth RE 1014 (in subcarrier 0) , a sixth RE 1016 (in subcarrier 1) , a seventh RE 1018 (in subcarrier 6) , and an eighth RE 1020 (in subcarrier 7) .
  • DMRS bearing PRBs may be different for both symbols.
  • REG 2 and REG 4 may be the DMRS bearing PRBs for the first symbol
  • REG 3 and REG 5 may be the DMRS bearing PRBs for the second symbol.
  • both localized and distributed CCE-REG mapping may be used.
  • DMRS sequence length N_total_PRB *DMRS_PRB_Ratio *DMRS_Subcarrier_Ratio.
  • DMRS_PRB_Ratio may be the ratio of DMRS bearing PRBs for the system bandwidth.
  • DMRS_Subcarrier_Ratio may be the ratio of DMRS bearing subcarriers within a PRB. For example, the ratio is 1/3 in Figure 9.
  • the DMRS sequence may be mapped to the DMRS bearing subcarriers of DMRS bearing PRB in frequency increasing order. For PDCCH of a specific remote unit 102, a DMRS sequence may correspond to the PDCCH frequency domain occupation.
  • an index e.g., 0, 1, 2, 3, 4, 5, 6, 7, 8, etc.
  • the sequence design may be per CCE.
  • DMRS_PRB_Ratio and DMRS_Subcarrier_Ratio may have the same meaning as in the first embodiment.
  • DMRS RE mapping may correspond to the PDCCH CCE-REG mapping. For frequency first, the DMRS sequence may be mapped to the DMRS bearing PRBs with increasing PRB index and then via the time domain. For time first, the DMRS sequence may be mapped to the DMRS bearing PRBs with increasing symbol index and then via the frequency domain.
  • other channels sharing the same characteristics of PDCCH may also reuse the PDCCH DMRS pattern and sequence design.
  • Figure 11 is a schematic flow chart diagram illustrating one embodiment of a method 1100 for demodulation reference signal configuration.
  • the method 1100 is performed by an apparatus, such as the remote unit 102.
  • the method 1100 may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like.
  • the method 1100 may include determining 1102 a control channel demodulation reference signal pattern. In some embodiments, the method 1100 includes receiving 1104 a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • control channel is a downlink control channel. In a further embodiment, the control channel is a physical downlink control channel. In certain embodiments, the control channel demodulation reference signal is received in a single symbol and in a single physical resource block. In various embodiments, the control channel demodulation reference signal pattern is determined based on frequency division multiplexing, frequency division orthogonal cover codes, or some combination thereof. In some embodiments, the control channel demodulation reference signal pattern is determined based on cyclic shift, comb, or some combination thereof. In one embodiment, the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block. In a further embodiment, the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block. In certain embodiments, the control channel demodulation reference signal is received in multiple symbols.
  • the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments, a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment, a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment, the control channel demodulation reference signal is received in multiple physical resource blocks. In certain embodiments, the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments, the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments, the control channel demodulation reference signal pattern is based on a full system bandwidth.
  • control channel demodulation reference signal pattern is based on a control channel element length.
  • control channel demodulation reference signal pattern is a predefined pattern known to both a base unit and a remote unit.
  • control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by radio resource control signaling.
  • control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by a master information block.
  • Figure 12 is a schematic flow chart diagram illustrating another embodiment of a method 1200 for demodulation reference signal configuration.
  • the method 1200 is performed by an apparatus, such as the base unit 104.
  • the method 1200 may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like.
  • the method 1200 may include determining 1202 a control channel demodulation reference signal pattern.
  • the method 1200 includes transmitting 1204 a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.
  • control channel is a downlink control channel. In a further embodiment, the control channel is a physical downlink control channel. In certain embodiments, the control channel demodulation reference signal is transmitted in a single symbol and in a single physical resource block. In various embodiments, the control channel demodulation reference signal pattern is determined based on frequency division multiplexing, frequency division orthogonal cover codes, or some combination thereof. In some embodiments, the control channel demodulation reference signal pattern is determined based on cyclic shift, comb, or some combination thereof. In one embodiment, the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block. In a further embodiment, the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block. In certain embodiments, the control channel demodulation reference signal is transmitted in multiple symbols.
  • the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments, a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment, a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment, the control channel demodulation reference signal is transmitted in multiple physical resource blocks. In certain embodiments, the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments, the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments, the control channel demodulation reference signal pattern is based on a full system bandwidth.
  • control channel demodulation reference signal pattern is based on a control channel element length.
  • control channel demodulation reference signal pattern is a predefined pattern known to both a base unit and a remote unit.
  • control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by radio resource control signaling.
  • control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by a master information block.

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

L'invention concerne des appareils, des procédés et des systèmes de configuration de signal de référence de démodulation. Un appareil (200) comprend au moins un processeur (202) configuré pour déterminer (1102) un modèle de signal de référence de démodulation de canal de commande. L'appareil (200) comprend un récepteur (212) configuré pour recevoir (1104) un signal de référence de démodulation de canal de commande sur la base du modèle de signal de référence de démodulation de canal de commande.
PCT/CN2017/090039 2017-06-26 2017-06-26 Configuration de signal de référence de démodulation Ceased WO2019000180A1 (fr)

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US11496990B2 (en) 2017-07-31 2022-11-08 Qualcomm Incorporated Systems and methods to facilitate location determination by beamforming of a positioning reference signal
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