WO2019000180A1

WO2019000180A1 - Demodulation reference signal configuration

Info

Publication number: WO2019000180A1
Application number: PCT/CN2017/090039
Authority: WO
Inventors: Hongmei Liu; Chenxi Zhu; Zhennian SUN; Haiming Wang
Original assignee: Motorola Mobility LLC
Current assignee: Motorola Mobility LLC
Priority date: 2017-06-26
Filing date: 2017-06-26
Publication date: 2019-01-03
Anticipated expiration: 2019-12-26

Abstract

Apparatuses， methods， and systems are disclosed for demodulation reference signal configuration. One apparatus (200) includes at least one processor (202) configured to determine (1102) a control channel demodulation reference signal pattern. The apparatus (200) includes a receiver (212) configured to receive (1104) a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

Description

DEMODULATION REFERENCE SIGNAL CONFIGURATION

FIELD

The subject matter disclosed herein relates generally to wireless communications and more particularly relates to demodulation reference signal configuration.

BACKGROUND

The following abbreviations are herewith defined， at least some of which are referred to within the following description： Third Generation Partnership Project ( “3GPP” ) ， Positive-Acknowledgment ( “ACK” ) ， Binary Phase Shift Keying ( “BPSK” ) ， Clear Channel Assessment ( “CCA” ) ， Cyclic Prefix ( “CP” ) ， Cyclical Redundancy Check ( “CRC” ) ， Channel State Information ( “CSI” ) ， Common Search Space ( “CSS” ) ， Discrete Fourier Transform Spread ( “DFTS” ) ， Downlink Control Information ( “DCI” ) ， Downlink ( “DL” ) ， Downlink Pilot Time Slot ( “DwPTS” ) ， Enhanced Clear Channel Assessment ( “eCCA” ) ， Enhanced Mobile Broadband ( “eMBB” ) ， Evolved Node B ( “eNB” ) ， European Telecommunications Standards Institute ( “ETSI” ) ， Frame Based Equipment ( “FBE” ) ， Frequency Division Duplex ( “FDD” ) ， Frequency Division Multiple Access ( “FDMA” ) ， Frequency Division Orthogonal Cover Code ( “FD-OCC” ) ， Guard Period ( “GP” ) ， Hybrid Automatic Repeat Request ( “HARQ” ) ， Internet-of-Things ( “IoT” ) ， Licensed Assisted Access ( “LAA” ) ， Load Based Equipment ( “LBE” ) ， Listen-Before-Talk ( “LBT” ) ， Long Term Evolution ( “LTE” ) ， Multiple Access ( “MA” ) ， Modulation Coding Scheme ( “MCS” ) ， Master Information Block ( “MIB” ) ， Machine Type Communication ( “MTC” ) ， Multiple Input Multiple Output ( “MIMO” ) ， Multi User Shared Access ( “MUSA” ) ， Narrowband ( “NB” ) ， Negative-Acknowledgment ( “NACK” ) or ( “NAK” ) ， Next Generation Node B ( “gNB” ) ， Non-Orthogonal Multiple Access ( “NOMA” ) ， Orthogonal Frequency Division Multiplexing ( “OFDM” ) ， Primary Cell ( “PCell” ) ， Physical Broadcast Channel ( “PBCH” ) ， Physical Downlink Control Channel ( “PDCCH” ) ， Physical Downlink Shared Channel ( “PDSCH” ) ， Pattern Division Multiple Access ( “PDMA” ) ， Physical Hybrid ARQ Indicator Channel ( “PHICH” ) ， Physical Random Access Channel ( “PRACH” ) ， Physical Resource Block ( “PRB” ) ， Physical Uplink Control Channel ( “PUCCH” ) ， Physical Uplink Shared Channel ( “PUSCH” ) ， Quality of Service ( “QoS” ) ， Quadrature Phase Shift Keying ( “QPSK” ) ， Radio Resource Control ( “RRC” ) ， Random Access Procedure ( “RACH” ) ， Random Access Response ( “RAR” ) ， Radio Network Temporary Identifier ( “RNTI” ) ， Reference Signal ( “RS” ) ， Remaining Minimum System Information ( “RMSI” ) ， Resource Spread Multiple Access ( “RSMA” ) ， Round Trip Time ( “RTT” ) ， Receive ( “RX” ) ， Sparse Code Multiple Access ( “SCMA” ) ， Scheduling Request ( “SR” ) ， Single Carrier Frequency Division Multiple Access ( “SC-FDMA” ) ， Secondary Cell ( “SCell” ) ， Shared Channel ( “SCH” ) ， Signal-to-Interference-Plus-Noise Ratio ( “SINR” ) ， System Information Block ( “SIB” ) ， Synchronization Signal ( “SS” ) ， Transport Block ( “TB” ) ， Transport Block Size ( “TBS” ) ， Time-Division Duplex ( “TDD” ) ， Time Division Multiplex ( “TDM” ) ， Time Division Orthogonal Cover Code ( “TD-OCC” ) ， Transmission Time Interval ( “TTI” ) ， Transmit ( “TX” ) ， Uplink Control Information ( “UCI” ) ， User Entity/Equipment (Mobile Terminal) ( “UE” ) ， Uplink ( “UL” ) ， Universal Mobile Telecommunications System ( “UMTS” ) ， Uplink Pilot Time Slot ( “UpPTS” ) ， Ultra-reliability and Low-latency Communications ( “URLLC” ) ， and Worldwide Interoperability for Microwave Access ( “WiMAX” ) . As used herein， “HARQ-ACK” may represent collectively the Positive Acknowledge ( “ACK” ) and the Negative Acknowledge ( “NACK” ) . ACK means that a TB is correctly received while NACK (or NAK) means a TB is erroneously received.

In certain wireless communications networks， a PDSCH demodulation reference signal ( “DMRS” ) may be used. In such networks， multiple different PDSCH DMRS configurations may be possible.

BRIEF SUMMARY

Apparatuses for demodulation reference signal configuration are disclosed. Methods and systems also perform the functions of the apparatus. In one embodiment， the apparatus includes a receiver that receives a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

In one embodiment， the control channel is a downlink control channel. In a further embodiment， the control channel is a physical downlink control channel. In certain embodiments， the control channel demodulation reference signal is received in a single symbol and in a single physical resource block. In various embodiments， the control channel demodulation reference signal pattern is determined based on frequency division multiplexing， frequency division orthogonal cover codes， or some combination thereof. In some embodiments， the control channel demodulation reference signal pattern is determined based on cyclic shift， comb， or some combination thereof. In one embodiment， the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block. In a further embodiment， the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block. In certain embodiments， the control channel demodulation reference signal is received in multiple symbols.

In various embodiments， the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments， a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment， a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment， the control channel demodulation reference signal is received in multiple physical resource blocks. In certain embodiments， the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments， the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments， the control channel demodulation reference signal pattern is based on a full system bandwidth. In one embodiment， the control channel demodulation reference signal pattern is based on a control channel element length. In certain embodiment， the control channel demodulation reference signal pattern is a predefined pattern known to both the apparatus and a base unit. In various embodiment， the control channel demodulation reference signal pattern is signaled from a base unit to the apparatus by radio resource control signaling. In some embodiments， the control channel demodulation reference signal pattern is signaled from a base unit to the apparatus by a master information block.

A method for demodulation reference signal configuration， in one embodiment， includes determining a control channel demodulation reference signal pattern. In some embodiments， the method includes receiving a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

In one embodiment， an apparatus for demodulation reference signal configuration includes a processor that determines a control channel demodulation reference signal pattern. In some embodiments， the apparatus includes a transmitter that transmits a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

In one embodiment， the control channel is a downlink control channel. In a further embodiment， the control channel is a physical downlink control channel. In certain embodiments， the control channel demodulation reference signal is transmitted in a single symbol and in a single physical resource block. In various embodiments， the control channel demodulation reference signal pattern is determined based on frequency division multiplexing， frequency division orthogonal cover codes， or some combination thereof. In some embodiments， the control channel demodulation reference signal pattern is determined based on cyclic shift， comb， or some combination thereof. In one embodiment， the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block. In a further embodiment， the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block. In certain embodiments， the control channel demodulation reference signal is transmitted in multiple symbols.

In various embodiments， the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments， a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment， a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment， the control channel demodulation reference signal is transmitted in multiple physical resource blocks. In certain embodiments， the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments， the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments， the control channel demodulation reference signal pattern is based on a full system bandwidth. In one embodiment， the control channel demodulation reference signal pattern is based on a control channel element length. In certain embodiment， the control channel demodulation reference signal pattern is a predefined pattern known to both the apparatus and a remote unit. In various embodiment， the control channel demodulation reference signal pattern is signaled from the apparatus to a remote unit by radio resource control signaling. In some embodiments， the control channel demodulation reference signal pattern is signaled from the apparatus to a remote unit by a master information block.

A method for demodulation reference signal configuration， in one embodiment， includes determining a control channel demodulation reference signal pattern. The method， in certain embodiments， includes transmitting a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

BRIEF DESCRIPTION OF THE DRAWINGS

A more particular description of the embodiments briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Understanding that these drawings depict only some embodiments and are not therefore to be considered to be limiting of scope， the embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings， in which：

Figure 1 is a schematic block diagram illustrating one embodiment of a wireless communication system for demodulation reference signal configuration；

Figure 2 is a schematic block diagram illustrating one embodiment of an apparatus that may be used for demodulation reference signal configuration；

Figure 3 is a schematic block diagram illustrating one embodiment of an apparatus that may be used for demodulation reference signal configuration；

Figure 4 is a schematic block diagram illustrating one embodiment of localized CCE-REG mapping；

Figure 5 is a schematic block diagram illustrating one embodiment of distributed CCE-REG mapping；

Figure 6 is a schematic block diagram illustrating one embodiment of CCE-REG mapping in a time domain across 2 symbols；

Figure 7 is a schematic block diagram illustrating one embodiment of CCE-REG mapping in a time domain across 3 symbols；

Figure 8 is a schematic block diagram illustrating one embodiment of a DMRS pattern for a single symbol；

Figure 9 is a schematic block diagram illustrating one embodiment of a DMRS pattern for two symbols；

Figure 10 is a schematic block diagram illustrating one embodiment of a DMRS pattern in which different DMRS bearing PRBs may be used for different symbols；

Figure 11 is a schematic flow chart diagram illustrating one embodiment of a method for demodulation reference signal configuration； and

Figure 12 is a schematic flow chart diagram illustrating another embodiment of a method for demodulation reference signal configuration.

DETAILED DESCRIPTION

As will be appreciated by one skilled in the art， aspects of the embodiments may be embodied as a system， apparatus， method， or program product. Accordingly， embodiments may take the form of an entirely hardware embodiment， an entirely software embodiment (including firmware， resident software， micro-code， etc. ) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit， ” “module” or “system. ” Furthermore， embodiments may take the form of a program product embodied in one or more computer readable storage devices storing machine readable code， computer readable code， and/or program code， referred hereafter as code. The storage devices may be tangible， non-transitory， and/or non-transmission. The storage devices may not embody signals. In a certain embodiment， the storage devices only employ signals for accessing code.

Certain of the functional units described in this specification may be labeled as modules， in order to more particularly emphasize their implementation independence. For example， a module may be implemented as a hardware circuit comprising custom very-large- scale integration ( “VLSI” ) circuits or gate arrays， off-the-shelf semiconductors such as logic chips， transistors， or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays， programmable array logic， programmable logic devices or the like.

Modules may also be implemented in code and/or software for execution by various types of processors. An identified module of code may， for instance， include one or more physical or logical blocks of executable code which may， for instance， be organized as an object， procedure， or function. Nevertheless， the executables of an identified module need not be physically located together， but may include disparate instructions stored in different locations which， when joined logically together， include the module and achieve the stated purpose for the module.

Indeed， a module of code may be a single instruction， or many instructions， and may even be distributed over several different code segments， among different programs， and across several memory devices. Similarly， operational data may be identified and illustrated herein within modules， and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set， or may be distributed over different locations including over different computer readable storage devices. Where a module or portions of a module are implemented in software， the software portions are stored on one or more computer readable storage devices.

Any combination of one or more computer readable medium may be utilized. The computer readable medium may be a computer readable storage medium. The computer readable storage medium may be a storage device storing the code. The storage device may be， for example， but not limited to， an electronic， magnetic， optical， electromagnetic， infrared， holographic， micromechanical， or semiconductor system， apparatus， or device， or any suitable combination of the foregoing.

More specific examples (a non-exhaustive list) of the storage device would include the following： an electrical connection having one or more wires， a portable computer diskette， a hard disk， a random access memory ( “RAM” ) ， a read-only memory ( “ROM” ) ， an erasable programmable read-only memory ( “EPROM” or Flash memory) ， a portable compact disc read-only memory ( “CD-ROM” ) ， an optical storage device， a magnetic storage device， or any suitable combination of the foregoing. In the context of this document， a computer readable storage medium may be any tangible medium that can contain， or store a program for use by or in connection with an instruction execution system， apparatus， or device.

Code for carrying out operations for embodiments may be any number of lines and may be written in any combination of one or more programming languages including an object oriented programming language such as Python， Ruby， Java， Smalltalk， C++， or the like， and conventional procedural programming languages， such as the ″C″ programming language， or the like， and/or machine languages such as assembly languages. The code may execute entirely on the user′s computer， partly on the user′s computer， as a stand-alone software package， partly on the user′s computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario， the remote computer may be connected to the user′s computer through any type of network， including a local area network ( “LAN” ) or a wide area network ( “WAN” ) ， or the connection may be made to an external computer (for example， through the Internet using an Internet Service Provider) .

Reference throughout this specification to “one embodiment， ” “an embodiment， ” or similar language means that a particular feature， structure， or characteristic described in connection with the embodiment is included in at least one embodiment. Thus， appearances of the phrases “in one embodiment， ” “in an embodiment， ” and similar language throughout this specification may， but do not necessarily， all refer to the same embodiment， but mean “one or more but not all embodiments” unless expressly specified otherwise. The terms “including， ” “comprising， ” “having， ” and variations thereof mean “including but not limited to， ” unless expressly specified otherwise. An enumerated listing of items does not imply that any or all of the items are mutually exclusive， unless expressly specified otherwise. The terms “a， ” “an， ” and “the” also refer to “one or more” unless expressly specified otherwise.

Furthermore， the described features， structures， or characteristics of the embodiments may be combined in any suitable manner. In the following description， numerous specific details are provided， such as examples of programming， software modules， user selections， network transactions， database queries， database structures， hardware modules， hardware circuits， hardware chips， etc.， to provide a thorough understanding of embodiments. One skilled in the relevant art will recognize， however， that embodiments may be practiced without one or more of the specific details， or with other methods， components， materials， and so forth. In other instances， well-known structures， materials， or operations are not shown or described in detail to avoid obscuring aspects of an embodiment.

Aspects of the embodiments are described below with reference to schematic flowchart diagrams and/or schematic block diagrams of methods， apparatuses， systems， and program products according to embodiments. It will be understood that each block of the schematic flowchart diagrams and/or schematic block diagrams， and combinations of blocks in the schematic flowchart diagrams and/or schematic block diagrams， can be implemented by code. The code may be provided to a processor of a general purpose computer， special purpose computer， or other programmable data processing apparatus to produce a machine， such that the instructions， which execute via the processor of the computer or other programmable data processing apparatus， create means for implementing the functions/acts specified in the schematic flowchart diagrams and/or schematic block diagrams block or blocks.

The code may also be stored in a storage device that can direct a computer， other programmable data processing apparatus， or other devices to function in a particular manner， such that the instructions stored in the storage device produce an article of manufacture including instructions which implement the function/act specified in the schematic flowchart diagrams and/or schematic block diagrams block or blocks.

The code may also be loaded onto a computer， other programmable data processing apparatus， or other devices to cause a series of operational steps to be performed on the computer， other programmable apparatus or other devices to produce a computer implemented process such that the code which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.

The schematic flowchart diagrams and/or schematic block diagrams in the Figures illustrate the architecture， functionality， and operation of possible implementations of apparatuses， systems， methods and program products according to various embodiments. In this regard， each block in the schematic flowchart diagrams and/or schematic block diagrams may represent a module， segment， or portion of code， which includes one or more executable instructions of the code for implementing the specified logical function (s) .

It should also be noted that， in some alternative implementations， the functions noted in the block may occur out of the order noted in the Figures. For example， two blocks shown in succession may， in fact， be executed substantially concurrently， or the blocks may sometimes be executed in the reverse order， depending upon the functionality involved. Other steps and methods may be conceived that are equivalent in function， logic， or effect to one or more blocks， or portions thereof， of the illustrated Figures.

Although various arrow types and line types may be employed in the flowchart and/or block diagrams， they are understood not to limit the scope of the corresponding embodiments. Indeed， some arrows or other connectors may be used to indicate only the logical flow of the depicted embodiment. For instance， an arrow may indicate a waiting or monitoring period of unspecified duration between enumerated steps of the depicted embodiment. It will also be noted that each block of the block diagrams and/or flowchart diagrams， and combinations of blocks in the block diagrams and/or flowchart diagrams， can be implemented by special purpose hardware-based systems that perform the specified functions or acts， or combinations of special purpose hardware and code.

The description of elements in each figure may refer to elements of proceeding figures. Like numbers refer to like elements in all figures， including alternate embodiments of like elements.

Figure 1 depicts an embodiment of a wireless communication system 100 for demodulation reference signal configuration. In one embodiment， the wireless communication system 100 includes remote units 102 and base units 104. Even though a specific number of remote units 102 and base units 104 are depicted in Figure 1， one of skill in the art will recognize that any number of remote units 102 and base units 104 may be included in the wireless communication system 100.

In one embodiment， the remote units 102 may include computing devices， such as desktop computers， laptop computers， personal digital assistants ( “PDAs” ) ， tablet computers， smart phones， smart televisions (e.g.， televisions connected to the Internet) ， set-top boxes， game consoles， security systems (including security cameras) ， vehicle on-board computers， network devices (e.g.， routers， switches， modems) ， or the like. In some embodiments， the remote units 102 include wearable devices， such as smart watches， fitness bands， optical head-mounted displays， or the like. Moreover， the remote units 102 may be referred to as subscriber units， mobiles， mobile stations， users， terminals， mobile terminals， fixed terminals， subscriber stations， UE， user terminals， a device， or by other terminology used in the art. The remote units 102 may communicate directly with one or more of the base units 104 via UL communication signals.

The base units 104 may be distributed over a geographic region. In certain embodiments， a base unit 104 may also be referred to as an access point， an access terminal， a base， a base station， a Node-B， an eNB， a gNB， a Home Node-B， a relay node， a device， or by any other terminology used in the art. The base units 104 are generally part of a radio access network that includes one or more controllers communicably coupled to one or more corresponding base units 104. The radio access network is generally communicably coupled to one or more core networks， which may be coupled to other networks， like the Internet and public switched telephone networks， among other networks. These and other elements of radio access and core networks are not illustrated but are well known generally by those having ordinary skill inthe art.

In one implementation， the wireless communication system 100 is compliant with the 3GPP protocol， wherein the base unit 104 transmits using an OFDM modulation scheme on the DL and the remote units 102 transmit on the UL using a SC-FDMA scheme or an OFDM scheme. More generally， however， the wireless communication system 100 may implement some other open or proprietary communication protocol， for example， WiMAX， among other protocols. The present disclosure is not intended to be limited to the implementation of any particular wireless communication system architecture or protocol.

The base units 104 may serve a number of remote units 102 within a serving area， for example， a cell or a cell sector via a wireless communication link. The base units 104 transmit DL communication signals to serve the remote units 102 in the time， frequency， and/or spatial domain.

In one embodiment， a remote unit 102 may determine a control channel demodulation reference signal pattern. In some embodiments， the remote unit 102 may receive a control channel demodulation reference signal based on the control channel demodulation reference signal pattern. Accordingly， a remote unit 102 may be used for demodulation reference signal configuration.

In certain embodiments， a base unit 104 may determine a control channel demodulation reference signal pattern. In various embodiments， the base unit 104 may transmit a control channel demodulation reference signal based on the control channel demodulation reference signal pattern. Accordingly， a base unit 104 may be used for demodulation reference signal configuration.

Figure 2 depicts one embodiment of an apparatus 200 that may be used for demodulation reference signal configuration. The apparatus 200 includes one embodiment of the remote unit 102. Furthermore， the remote unit 102 may include a processor 202， a memory 204， an input device 206， a display 208， a transmitter 210， and a receiver 212. In some embodiments， the input device 206 and the display 208 are combined into a single device， such as a touchscreen. In certain embodiments， the remote unit 102 may not include any input device 206 and/or display 208. In various embodiments， the remote unit 102 may include one or more of the processor 202， the memory 204， the transmitter 210， and the receiver 212， and may not include the input device 206 and/or the display 208.

The processor 202， in one embodiment， may include any known controller capable of executing computer-readable instructions and/or capable of performing logical operations. For example， the processor 202 may be a microcontroller， a microprocessor， a central processing unit ( “CPU” ) ， a graphics processing unit ( “GPU” ) ， an auxiliary processing unit， a field programmable gate array ( “FPGA” ) ， or similar programmable controller. In some embodiments， the processor 202 executes instructions stored in the memory 204 to perform the methods and routines described herein. In various embodiments， the processor 202 may determine a control channel demodulation reference signal pattern. The processor 202 is communicatively coupled to the memory 204， the input device 206， the display 208， the transmitter 210， and the receiver 212.

The memory 204， in one embodiment， is a computer readable storage medium. In some embodiments， the memory 204 includes volatile computer storage media. For example， the memory 204 may include a RAM， including dynamic RAM ( “DRAM” ) ， synchronous dynamic RAM ( “SDRAM” ) ， and/or static RAM ( “SRAM” ) . In some embodiments， the memory 204 includes non-volatile computer storage media. For example， the memory 204 may include a hard disk drive， a flash memory， or any other suitable non-volatile computer storage device. In some embodiments， the memory 204 includes both volatile and non-volatile computer storage media. In some embodiments， the memory 204 stores data relating to DMRS configurations. In some embodiments， the memory 204 also stores program code and related data， such as an operating system or other controller algorithms operating on the remote unit 102.

The input device 206， in one embodiment， may include any known computer input device including a touch panel， a button， a keyboard， a stylus， a microphone， or the like. In some embodiments， the input device 206 may be integrated with the display 208， for example， as a touchscreen or similar touch-sensitive display. In some embodiments， the input device 206 includes a touchscreen such that text may be input using a virtual keyboard displayed on the touchscreen and/or by handwriting on the touchscreen. In some embodiments， the input device 206 includes two or more different devices， such as a keyboard and a touch panel.

The display 208， in one embodiment， may include any known electronically controllable display or display device. The display 208 may be designed to output visual， audible， and/or haptic signals. In some embodiments， the display 208 includes an electronic display capable of outputting visual data to a user. For example， the display 208 may include， but is not limited to， an LCD display， an LED display， an OLED display， a projector， or similar display device capable of outputting images， text， or the like to a user. As another， non-limiting， example， the display 208 may include a wearable display such as a smart watch， smart glasses， a heads-up display， or the like. Further， the display 208 may be a component of a smart phone， a personal digital assistant， a television， a table computer， a notebook (laptop) computer， a personal computer， a vehicle dashboard， or the like.

In certain embodiments， the display 208 includes one or more speakers for producing sound. For example， the display 208 may produce an audible alert or notification (e.g.， a beep or chime) . In some embodiments， the display 208 includes one or more haptic devices for producing vibrations， motion， or other haptic feedback. In some embodiments， all or portions of the display 208 may be integrated with the input device 206. For example， the input device 206 and display 208 may form a touchscreen or similar touch-sensitive display. In other embodiments， the display 208 may be located near the input device 206.

The transmitter 210 is used to provide UL communication signals to the base unit 104 and the receiver 212 is used to receive DL communication signals from the base unit 104. In some embodiments， the receiver 212 may be used to receive a control channel demodulation reference signal based on a control channel demodulation reference signal pattern. Although only one transmitter 210 and one receiver 212 are illustrated， the remote unit 102 may have any suitable number of transmitters 210 and receivers 212. The transmitter 210 and the receiver 212 may be any suitable type of transmitters and receivers. In one embodiment， the transmitter 210 and the receiver 212 may be part of a transceiver.

Figure 3 depicts one embodiment of an apparatus 300 that may be used for demodulation reference signal configuration. The apparatus 300 includes one embodiment of the base unit 104. Furthermore， the base unit 104 may include a processor 302， a memory 304， an input device 306， a display 308， a transmitter 310， and a receiver 312. As may be appreciated， the processor 302， the memory 304， the input device 306， the display 308， the transmitter 310， and the receiver 312 may be substantially similar to the processor 202， the memory 204， the input device 206， the display 208， the transmitter 210， and the receiver 212 of the remote unit 102， respectively.

In some embodiments， the processor 302 may determine a control channel demodulation reference signal pattern. In certain embodiments， the transmitter 310 may transmit a control channel demodulation reference signal based on the control channel demodulation reference signal pattern. Although only one transmitter 310 and one receiver 312 are illustrated， the base unit 104 may have any suitable number of transmitters 310 and receivers 312. The transmitter 310 and the receiver 312 may be any suitable type of transmitters and receivers. In one embodiment， the transmitter 310 and the receiver 312 may be part of a transceiver.

Various PDSCH DMRS embodiments may have a front-loaded DMRS. In a first front loaded PDSCH DMRS embodiment， up to 8 ports may be supported. Such embodiments may have an interleaved frequency division multiplexing ( “IFDM” ) based pattern with comb 2 and/or comb 4 with cyclic shifts ( “CS” ) . In certain embodiments， the first front loaded PDSCH DMRS configuration may have one OFDM symbol. The one OFDM symbol may， in various configurations， be comb 2 plus 2 CS for up to 4 ports. In other embodiments， the one OFDM symbol may be comb 4 plus 2 CS for up to 8 ports. In various embodiments， the first front loaded PDSCH DMRS configuration may have two OFDM symbols. The two OFDM symbols may， in some configurations， be selected from： comb 2 plus 2 CS plus TD-OCC of ( {1 1} and {1 -1} ) for up to 8 ports； comb 2 plus 4 CS plus TD-OCC ( {1 1} ) for up to 8 ports； and comb 4 plus 2 CS plus TD-OCC ( {1 1} ) for up to 8 ports.

In a second front loaded PDSCH DMRS embodiment， up to 12 ports may be supported. Such embodiments may have an FD-OCC based pattern with adjacent REs in the frequency domain. In certain embodiments， the second front loaded PDSCH DMRS configuration may have one OFDM symbol. The one OFDM symbol may， in various configurations， be selected from： 2 FD-OCC across adjacent REs in the frequency domain for up to 6 ports； 2 FD-OCC across adjacent REs in the frequency domain for up to 4 ports； and 2 FD-OCC across adjacent REs in the frequency domain for up to 2 ports. In various embodiments， the second front loaded PDSCH DMRS configuration may have two OFDM symbols. The two OFDM symbols may， in some configurations， be selected from： 2 FD-OCC across adjacent REs in the frequency domain plus TDM for up to 12 ports； and 2 FD-OCC across adjacent REs in the frequency domain plus TD-OCC ( {1 1} and {1 -1} ) for up to 12 ports.

In certain embodiments， PDCCH may be carried by one or more control channel elements ( “CCEs” ) . In some embodiments， a CCE may correspond to 6 resource element groups ( “REGs” ) . In various embodiments， a REG may correspond to a PRB. In one embodiment， a CCE-REG mapping may be performed frequency first； while， in another embodiment a CCE-REG mapping may be performed time first. Moreover， the CCE-REG mapping may be distributed or localized in a frequency domain. In certain embodiments， from a resource allocation perspective， 1 to 3 symbols may be shared by different remote unit’s 102 PDCCH. In some embodiments， PDCCH demodulation may be based on DMRS to provide beamforming gain. In various embodiments， PDCCH DMRS ports may be at most 2. In various embodiments， multiplexing methods may be FDM， FD-OCC， TDM， TD-OCC， CS， comb， and any combination thereof. In certain embodiments， for frequency domain CCE-REG mapping， either localized or distributed mapping may be used. As used herein， a “symbol” may be an OFDM symbol.

Figure 4 is a schematic block diagram illustrating one embodiment of localized CCE-REG mapping 400. The localized CCE-REG mapping 400 is performed over one symbol 402 and uses adjacent PRBs 404. Specifically， a first REG 406 occupies the symbol 402 in a PRB 404， a second REG 408 occupies the symbol 402 in an adjacent PRB 404， a third REG 410 occupies the symbol 402 in an adjacent PRB 404， a fourth REG 412 occupies the symbol 402 in an adjacent PRB 404， a fifth REG 414 occupies the symbol 402 in an adjacent PRB 404， and a sixth REG 416 occupies the symbol 402 in an adjacent PRB 404. Thus， in one embodiment， each of the 6 REGs are mapped in adjacent PRBs 404 in one symbol.

Figure 5 is a schematic block diagram illustrating one embodiment of distributed CCE-REG mapping 500. The distributed CCE-REG mapping 500 is performed over one symbol 502 and uses non-adjacent PRBs 504. Specifically， a first REG 506 occupies the symbol 502 in a PRB 504， a second REG 508 occupies the symbol 502 in a non-adjacent PRB 504， a third REG 510 occupies the symbol 502 in a non-adjacent PRB 504， a fourth REG 512 occupies the symbol 502 in a non-adjacent PRB 504， a fifth REG 514 occupies the symbol 502 in a non-adjacent PRB 504， and a sixth REG 516 occupies the symbol 502 in a non-adjacent PRB 504. Thus， in one embodiment， each of the 6 REGs are mapped in non-adjacent PRB 504 in one symbol.

Figure 6 is a schematic block diagram illustrating one embodiment of CCE-REG mapping 600 in a time domain across 2 symbols. In certain embodiments， in response to there being more than 1 symbol for PDCCH， either time first or frequency first mapping may be used. As illustrated in the CCE-REG mapping 600， time first mapping is used. Specifically， in a first symbol 602 and a first PRB 604， a first REG 606 is mapped； in a second symbol 608 and the first PRB 604， a second REG 610 is mapped； in the first symbol 602 and a second PRB 612， a third REG 614 is mapped； in the second symbol 608 and the second PRB 612， a fourth REG 616 is mapped； in the first symbol 602 and a third PRB 618， a fifth REG 620 is mapped； and in the second symbol 608 and the third PRB 618， a sixth REG 622 is mapped. In another embodiment， frequency first mapping may be constructed by the following： mapping the first REG 606 to the first symbol 602 and the first PRB 604； mapping the second REG 610 to the first symbol 602 and the second PRB 604； mapping the third REG 614 to the first symbol 602 and the third PRB 618； mapping the fourth REG 616 to the second symbol 608 and the first PRB 604； mapping the fifth REG 620 to the second symbol 608 and the second PRB 612； and mapping the sixth REG 622 to the second symbol 608 and the third PRB 618.

Figure 7 is a schematic block diagram illustrating one embodiment of CCE-REG mapping 700 in a time domain across 3 symbols. In certain embodiments， in response to there being more than 1 symbol for PDCCH， either time first or frequency first mapping may be used. As illustrated in the CCE-REG mapping 700， time first mapping is used. Specifically， in a first symbol 702 and a first PRB 704， a first REG 706 is mapped； in a second symbol 708 and the first PRB 704， a second REG 710 is mapped； in a third symbol 712 and the first PRB 704， a third REG 714 is mapped； in the first symbol 702 and a second PRB 716， a fourth REG 718 is mapped； in the second symbol 708 and the second PRB 716， a fifth REG 720 is mapped； and in the third symbol 712 and the second PRB 716， a sixth REG 722 is mapped. In another embodiment， frequency domain first mapping can also be constructed in a similar manner.

Figure 8 is a schematic block diagram illustrating one embodiment of a DMRS pattern 800 for a single symbol and a single PRB. In certain embodiments， a PDCCH DMRS pattern design may be based on a CCE structure. In some embodiments， due to various CCE-REG mapping and different time domain symbols， a basis DMRS pattern for 1-symbol single PRB may be used， and the basis DMRS pattern may be extended in the frequency domain and time domain to match a specific PDCCH resource occupation.

As illustrated， the DMRS pattern 800 may be for a single PRB and a single symbol 802 and may be distributed over subcarriers 804. The DMRS pattern 800 includes a first RE 806 (in subcarrier 0) ， a second RE 808 (in subcarrier 1) ， a third RE 810 (in subcarrier 6) ， and a fourth RE 812 (in subcarrier 7) . In some embodiments， FDM and/or FD-OCC may be used in the frequency domain. In one embodiment， only antenna ports 0 and 1 may be used. If FDM is used， with 4 REs used for DMRS， a first and third RE may be used by antenna port 0， and a second and fourth RE may be used by antenna port 1. If 2 REs are used for DMRS with FDM， a first RE may be used by antenna port 0， and a second RE may be used by antenna port 1. If FD-OCC is used， a first and second RE may be used by antenna port 0 with OCC sequence (+1， +1) ， and a first and second RE may also be used by antenna port 1 with OCC sequence (+1， -1) . If there are more REs for DMRS for FD-OCC， a third and fourth RE may be used by antenna port 0 with OCC sequence (+1， +1) ， and a third and fourth RE may be used by antenna port 1 with OCC sequence (+1， -1) . In another embodiment， only antenna 0 may be used. IfFDM and 1 RE occupation are used， a first RE may be used for antenna 0. If FDM and 2 RE occupation are used， a first and third RE may be used for antenna 0. If FD-OCC and 2 RE occupation are used， a first and second RE may be used with OCC sequence (+1， +1) . If FD-OCC and 4 RE occupation are used， a first and second RE may be used with OCC sequence (+1， +1) ， and a third and fourth RE may be used with OCC sequence (+1， +1) .

In certain embodiments， because the antenna port number may dynamically change from 1 to 2， FD-OCC of both antenna ports may be used to keep a common structure of two cases. As illustrated， to provide more frequency domain samples in the frequency domain， the third RE 810 and the fourth RE 812 (e.g.， two subcarriers 6 and 7) may be used to carry DMRS in addition to the first RE 806 and the second RE 808 (e.g.， two subcarriers 0 and 1) . In various embodiments， frequency PRB and RE level domain density of PDCCH DMRS may consider a tradeoff between overhead consumption and channel estimation accuracy. For example， the DMRS beating REs within a PRB may be any suitable number (e.g.， 1， 2， 3， 4， 6， etc. ) . As another example， the DMRS bearing PRBs may be 2 within a CCE， and the DMRS bearing PRBs may be subject to a CCE-REG mapping structure. In some embodiments， REG 3 and/or REG 4 of Figure 4 may be selected as the DMRS bearing PRB， or REG 2 and/or REG 5 of Figure 5 may be selected as the DMRS beating PRB. In some embodiments， there may be any suitable number (e.g.， 1， 3， 4， 6， etc. ) DMRS bearing PRBs within a CCE.

In another embodiment， CS and/or comb may also be used in the frequency domain within a PRB to multiplex different DMRS ports. As an example， comb＝2 may be used for antenna port 0 with offset 0. That is， for a single symbol and single PRB， ifthe 12 subcarriers are indexed from 0 to 11， then subcarriers 0， 2， 4， 6， 8， and 10 may be used for antenna port 0. As another example， if comb＝4 and offset 0 and 2 are used for antenna ports 0 and 1， respectively， then subcarriers 0， 4， and 8 may be used for antenna port 0， and subcarriers 2， 6， and 10 may be used for antenna port 1.

Figure 9 is a schematic block diagram illustrating one embodiment of a DMRS pattern 900 for two symbols. In some embodiments， a PDCCH DMRS pattern for multiple symbols may be constructed by a time domain repetition of a single symbol case (e.g.， repetition of the DMRS pattern 800 of Figure 8. As illustrated， the DMRS pattern 900 may be for a single PRB， a first symbol 902， and a second symbol 903， and may be distributed over subcarriers 904. The DMRS pattern 900 includes in the first symbol 902， a first RE 906 (in subcarrier 0) ， a second RE 908 (in subcarrier 1) ， a third RE 910 (in subcarrier 6) ， and a fourth RE 912 (in subcarrier 7) . The DMRS pattern 900 includes in the second symbol 903， a fifth RE 914 (in subcarrier 0) ， a sixth RE 916 (in subcarrier 1) ， a seventh RE 918 (in subcarrier 6) ， and an eighth RE 920 (in subcarrier 7) . In certain embodiments， a DMRS beating PRB in a frequency domain may be a part of the PRBs. In certain embodiment， DMRS bearing PRBs may be the same for both symbols. For example， in some embodiments， REG 3 and/or REG 4 of Figure 6 may be selected as the DMRS bearing PRB for both symbols， or REG 1 and/or REG 2 of Figure 7 may be selected as the DMRS bearing PRB for both symbols.

Figure 10 is a schematic block diagram illustrating one embodiment of a DMRS pattern 1000 in which different DMRS bearing PRBs may be used for different symbols. The DMRS pattern 1000 may be for multiple PRBs， a first symbol 1002， and a second symbol 1003， and may be distributed over subcarriers 1004. The DMRS pattern 1000 includes in the first symbol 1002， a first RE 1006 (in subcarrier 0) ， a second RE 1008 (in subcarrier 1) ， a third RE 1010 (in subcarrier 6) ， and a fourth RE 1012 (in subcarrier 7) . The DMRS pattern 1000 includes in the second symbol 1003， a fifth RE 1014 (in subcarrier 0) ， a sixth RE 1016 (in subcarrier 1) ， a seventh RE 1018 (in subcarrier 6) ， and an eighth RE 1020 (in subcarrier 7) . In certain embodiments， DMRS bearing PRBs may be different for both symbols. For example， REG 2 and REG 4 may be the DMRS bearing PRBs for the first symbol， and REG 3 and REG 5 may be the DMRS bearing PRBs for the second symbol. In certain embodiments， both localized and distributed CCE-REG mapping may be used.

There may be a variety of embodiments for PDCCH DMRS sequence design. In a first embodiment， a full bandwidth may be used per symbol. In such an embodiment， the DMRS sequence length may be expressed by the following formula： DMRS sequence length ＝ N_total_PRB *DMRS_PRB_Ratio *DMRS_Subcarrier_Ratio. N_total PRB may be decided by a system bandwidth and a CCE structure. For example， for a system bandwidth of 100 PRBs， if a control region is one symbol， N_total_PRB is floor (100/6) *6＝96； while ifthe control region contains two symbols， N_total_PRB is floor (100/3) *3＝99. DMRS_PRB_Ratio may be the ratio of DMRS bearing PRBs for the system bandwidth. DMRS_Subcarrier_Ratio may be the ratio of DMRS bearing subcarriers within a PRB. For example， the ratio is 1/3 in Figure 9. The DMRS sequence may be mapped to the DMRS bearing subcarriers of DMRS bearing PRB in frequency increasing order. For PDCCH of a specific remote unit 102， a DMRS sequence may correspond to the PDCCH frequency domain occupation. Suppose the total system bandwidth is 100 PRBs indexed from 0 to 99， and PDCCH control region occupies 1 symbol， the total DMRS sequence length may be 96*1/3*4＝128 with 1/3 DMRS bearing PRB ratio and 4 DMRS bearing REs per PRB and the PDCCH PRB indexed from 0 to 95. If the PDCCH for a specific remote unit 102 or a group of remote units 102 occupies PRB index 0 to 5， then the DMRS sequence for these one or more remote units 102 may be part of the total DMRS sequence， and the DMRS sequence for these one or more remote units 102 may be corresponding to an index (e.g.， 0， 1， 2， 3， 4， 5， 6， 7， 8， etc. ) of the total full bandwidth DMRS sequence.

In a second embodiment， the sequence design may be per CCE. In such an embodiment， the DMRS sequence length may be expressed by the following formula： DMRS sequence length ＝ 6 *DMRS_PRB_Ratio *DMRS_Subcarrier_Ratio. DMRS_PRB_Ratio and DMRS_Subcarrier_Ratio may have the same meaning as in the first embodiment. DMRS RE mapping may correspond to the PDCCH CCE-REG mapping. For frequency first， the DMRS sequence may be mapped to the DMRS bearing PRBs with increasing PRB index and then via the time domain. For time first， the DMRS sequence may be mapped to the DMRS bearing PRBs with increasing symbol index and then via the frequency domain. In addition to PDCCH， other channels sharing the same characteristics of PDCCH may also reuse the PDCCH DMRS pattern and sequence design.

Figure 11 is a schematic flow chart diagram illustrating one embodiment of a method 1100 for demodulation reference signal configuration. In some embodiments， the method 1100 is performed by an apparatus， such as the remote unit 102. In certain embodiments， the method 1100 may be performed by a processor executing program code， for example， a microcontroller， a microprocessor， a CPU， a GPU， an auxiliary processing unit， a FPGA， or the like.

The method 1100 may include determining 1102 a control channel demodulation reference signal pattern. In some embodiments， the method 1100 includes receiving 1104 a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

In various embodiments， the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments， a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment， a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment， the control channel demodulation reference signal is received in multiple physical resource blocks. In certain embodiments， the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments， the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments， the control channel demodulation reference signal pattern is based on a full system bandwidth. In one embodiment， the control channel demodulation reference signal pattern is based on a control channel element length. In certain embodiment， the control channel demodulation reference signal pattern is a predefined pattern known to both a base unit and a remote unit. In various embodiment， the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by radio resource control signaling. In some embodiments， the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by a master information block.

Figure 12 is a schematic flow chart diagram illustrating another embodiment of a method 1200 for demodulation reference signal configuration. In some embodiments， the method 1200 is performed by an apparatus， such as the base unit 104. In certain embodiments， the method 1200 may be performed by a processor executing program code， for example， a microcontroller， a microprocessor， a CPU， a GPU， an auxiliary processing unit， a FPGA， or the like.

The method 1200 may include determining 1202 a control channel demodulation reference signal pattern. The method 1200， in certain embodiments， includes transmitting 1204 a control channel demodulation reference signal based on the control channel demodulation reference signal pattern.

In various embodiments， the control channel demodulation reference signal pattern includes a time domain repetition of a first symbol of the multiple symbols that is repeated in a second symbol of the multiple symbols. In some embodiments， a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol. In one embodiment， a first frequency domain of the first symbol is different from a second frequency domain of the second symbol. In a further embodiment， the control channel demodulation reference signal is transmitted in multiple physical resource blocks. In certain embodiments， the multiple physical resource blocks include a portion of physical resource blocks of the control channel. In various embodiments， the multiple physical resource blocks include all physical resource blocks of the control channel. In some embodiments， the control channel demodulation reference signal pattern is based on a full system bandwidth. In one embodiment， the control channel demodulation reference signal pattern is based on a control channel element length. In certain embodiment， the control channel demodulation reference signal pattern is a predefined pattern known to both a base unit and a remote unit. In various embodiment， the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by radio resource control signaling. In some embodiments， the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by a master information block.

Embodiments may be practiced in other specific forms. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is， therefore， indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims

An apparatus comprising：

a receiver that receives a control channel demodulation reference signal based on a control channel demodulation reference signal pattern.
The apparatus of claim 1， wherein the control channel is a physical downlink control channel.
The apparatus of claim 1， wherein the control channel demodulation reference signal is received in a single symbol and in a single physical resource block.
The apparatus of claim 3， wherein the control channel demodulation reference signal pattern is determined based on frequency division multiplexing， frequency division orthogonal cover codes， or some combination thereof.
The apparatus of claim 3， wherein the control channel demodulation reference signal pattern is determined based on cyclic shift， comb， or some combination thereof.
The apparatus of claim 3， wherein the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block.
The apparatus of claim 3， wherein the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block.
The apparatus of claim 1， wherein the control channel demodulation reference signal is received in a plurality of symbols.
The apparatus of claim 8， wherein the control channel demodulation reference signal pattern comprises a time domain repetition of a first symbol of the plurality of symbols that is repeated in a second symbol of the plurality of symbols.
The apparatus of claim 9， wherein a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol.
The apparatus of claim 9， wherein a first frequency domain of the first symbol is different from a second frequency domain of the second symbol.
The apparatus of claim 1， wherein the control channel demodulation reference signal is received in a plurality of physical resource blocks.
The apparatus of claim 12， wherein the plurality of physical resource blocks comprises a portion of physical resource blocks of the control channel.
The apparatus of claim 12， wherein the plurality of physical resource blocks comprises all physical resource blocks of the control channel.
The apparatus of claim 1， wherein the control channel demodulation reference signal pattern is based on a full system bandwidth.
The apparatus of claim 1， wherein the control channel demodulation reference signal pattern is based on a control channel element length.
The apparatus of claim 1， wherein the control channel demodulation reference signal pattern is a predefined pattern known to both the apparatus and a base unit.
The apparatus of claim 1， wherein the control channel demodulation reference signal pattern is signaled from a base trait to the apparatus by radio resource control signaling.
The apparatus of claim 1， wherein the control channel demodulation reference signal pattern is signaled from a base unit to the apparatus by a master information block.
A method comprising：

receiving a control channel demodulation reference signal based on a control channel demodulation reference signal pattern.
The method of claim 20， wherein the control channel is a physical downlink control channel.
The method of claim 20， wherein the control channel demodulation reference signal is received in a single symbol and in a single physical resource block.
The method of claim 22， wherein the control channel demodulation reference signal pattern is determined based on frequency division multiplexing， frequency division orthogonal cover codes， or some combination thereof.
The method of claim 22， wherein the control channel demodulation reference signal pattern is determined based on cyclic shift， comb， or some combination thereof.
The method of claim 22， wherein the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block.
The method of claim 22， wherein the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block.
The method of claim 20， wherein the control channel demodulation reference signal is received in a plurality of symbols.
The method of claim 27， wherein the control channel demodulation reference signal pattern comprises a time domain repetition of a first symbol of the plurality of symbols that is repeated in a second symbol of the plurality of symbols.
The method of claim 28， wherein a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol.
The method of claim 28， wherein a first frequency domain of the first symbol is different from a second frequency domain of the second symbol.
The method of claim 20， wherein the control channel demodulation reference signal is received in a plurality of physical resource blocks.
The method of claim 31， wherein the plurality of physical resource blocks comprises a portion of physical resource blocks of the control channel.
The method of claim 31， wherein the plurality of physical resource blocks comprises all physical resource blocks of the control channel.
The method of claim 20， wherein the control channel demodulation reference signal pattern is based on a full system bandwidth.
The method of claim 20， wherein the control channel demodulation reference signal pattern is based on a control channel element length.
The method of claim 20， wherein the control channel demodulation reference signal pattern is a predefined pattern known to both a remote unit and a base unit.
The method of claim 20， wherein the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by radio resource control signaling.
The method of claim 20， wherein the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by a master information block.
An apparatus comprising：

a transmitter that transmits a control channel demodulation reference signal based on a control channel demodulation reference signal pattern.
The apparatus of claim 39， wherein the control channel is a physical downlink control channel.
The apparatus of claim 39， wherein the control channel demodulation reference signal is transmitted in a single symbol and in a single physical resource block.
The apparatus of claim 41， wherein the control channel demodulation reference signal pattern is determined based on frequency division multiplexing， frequency division orthogonal cover codes， or some combination thereof.
The apparatus of claim 41， wherein the control channel demodulation reference signal pattern is determined based on cyclic shift， comb， or some combination thereof.
The apparatus of claim 41， wherein the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block.
The apparatus of claim 41， wherein the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block.
The apparatus of claim 39， wherein the control channel demodulation reference signal is transmitted in a plurality of symbols.
The apparatus of claim 46， wherein the control channel demodulation reference signal pattern comprises a time domain repetition of a first symbol of the plurality of symbols that is repeated in a second symbol of the plurality of symbols.
The apparatus of claim 47， wherein a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol.
The apparatus of claim 47， wherein a first frequency domain of the first symbol is different from a second frequency domain of the second symbol.
The apparatus of claim 39， wherein the control channel demodulation reference signal is transmitted in a plurality of physical resource blocks.
The apparatus of claim 50， wherein the plurality of physical resource blocks comprises a portion of physical resource blocks of the control channel.
The apparatus of claim 50， wherein the plurality of physical resource blocks comprises all physical resource blocks of the control channel.
The apparatus of claim 39， wherein the control channel demodulation reference signal pattern is based on a full system bandwidth.
The apparatus of claim 39， wherein the control channel demodulation reference signal pattern is based on a control channel element length.
The apparatus of claim 39， wherein the control channel demodulation reference signal pattern is a predefined pattern known to both the apparatus and a remote unit.
The apparatus of claim 39， wherein the control channel demodulation reference signal pattern is signaled from the apparatus to a remote unit by radio resource control signaling.
The apparatus of claim 39， wherein the control channel demodulation reference signal pattern is signaled from the apparatus to a remote unit by a master information block.
A method comprising：

transmitting a control channel demodulation reference signal based on a control channel demodulation reference signal pattern.
The method of claim 58， wherein the control channel is a physical downlink control channel.
The method of claim 58， wherein the control channel demodulation reference signal is transmitted in a single symbol and in a single physical resource block.
The method of claim 60， wherein the control channel demodulation reference signal pattern is determined based on frequency division multiplexing， frequency division orthogonal cover codes， or some combination thereof.
The method of claim 60， wherein the control channel demodulation reference signal pattern is determined based on cyclic shift， comb， or some combination thereof.
The method of claim 60， wherein the control channel demodulation reference signal pattern occupies at least two subcarriers of the single physical resource block.
The method of claim 60， wherein the control channel demodulation reference signal pattern occupies all subcarriers of the single physical resource block.
The method of claim 58， wherein the control channel demodulation reference signal is transmitted in a plurality of symbols.
The method of claim 65， wherein the control channel demodulation reference signal pattern comprises a time domain repetition of a first symbol of the plurality of symbols that is repeated in a second symbol of the plurality of symbols.
The method of claim 66， wherein a first frequency domain of the first symbol is the same as a second frequency domain of the second symbol.
The method of claim 66， wherein a first frequency domain of the first symbol is different from a second frequency domain of the second symbol.
The method of claim 58， wherein the control channel demodulation reference signal is transmitted in a plurality of physical resource blocks.
The method of claim 69， wherein the plurality of physical resource blocks comprises a portion of physical resource blocks of the control channel.
The method of claim 69， wherein the plurality of physical resource blocks comprises all physical resource blocks of the control channel.
The method of claim 58， wherein the control channel demodulation reference signal pattern is based on a full system bandwidth.
The method of claim 58， wherein the control channel demodulation reference signal pattern is based on a control channel element length.
The method of claim 58， wherein the control channel demodulation reference signal pattern is a predefined pattern known to both a base unit and a remote unit.
The method of claim 58， wherein the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by radio resource control signaling.
The method of claim 58， wherein the control channel demodulation reference signal pattern is signaled from a base unit to a remote unit by a master information block.