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WO2018133319A1 - Dispositif à puce integrée - Google Patents

Dispositif à puce integrée Download PDF

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Publication number
WO2018133319A1
WO2018133319A1 PCT/CN2017/089029 CN2017089029W WO2018133319A1 WO 2018133319 A1 WO2018133319 A1 WO 2018133319A1 CN 2017089029 W CN2017089029 W CN 2017089029W WO 2018133319 A1 WO2018133319 A1 WO 2018133319A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
embedding device
heat dissipating
component
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/089029
Other languages
English (en)
Chinese (zh)
Inventor
李福茂
黄杰凡
黄源浩
肖振中
刘龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Orbbec Co Ltd
Original Assignee
Shenzhen Orbbec Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Orbbec Co Ltd filed Critical Shenzhen Orbbec Co Ltd
Publication of WO2018133319A1 publication Critical patent/WO2018133319A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to the field of electronic and optical component manufacturing, and more particularly to a chip embedding device.
  • the depth camera can acquire the depth information of the target to achieve 3D scanning, scene modeling, and gesture interaction.
  • the depth camera is gradually receiving attention from various industries.
  • a depth camera can be combined with a television, a computer, or the like to realize a somatosensory game to achieve the game fitness two-in-one effect.
  • Google's tango project is dedicated to bringing depth cameras to mobile devices, such as tablets and mobile phones, to bring a completely subversive experience, such as a very realistic AR gaming experience, which can be used for indoor map creation and navigation. And other functions.
  • the core component in the depth camera is the laser projection module.
  • the optical projection module is composed of a circuit board, a light source and the like.
  • a wafer-level vertical cavity surface emitting laser (VCSEL) array light source can reduce the volume of the optical projection module to be embedded in a miniature electronic device such as a mobile phone.
  • a VSCEL is fabricated on a semiconductor substrate, and the semiconductor substrate is connected to a flexible circuit board (FPC).
  • FPC flexible circuit board
  • TEC semiconductor cooler
  • TEC can also be introduced. TEC can control the heat of the light source very well, but due to its high power consumption and large volume, the volume and power consumption of this type of optical projection module are still not ideal.
  • the object of the present invention is to solve the problem of volume and heat dissipation when a chip is combined with a circuit board in the prior art, and a chip embedding device is proposed, which can simultaneously consider the problems of volume and heat dissipation.
  • the chip embedding device of the present invention comprises: a supporting member for carrying a chip; a heat dissipating member for dissipating heat generated by the chip; and a control member for controlling chip operation; wherein the control member has a hole formed therein The chip is embedded in the hole and is in contact with the heat dissipating component. At this time, the heat dissipating component functions as a supporting component, so that the device realizes small volume and high heat dissipation.
  • the heat dissipating member is recessed, and the chip is embedded in a hole of the control member and placed in the groove to be in contact with the heat dissipating member.
  • the heat dissipating member is coupled to the control member and covers a hole in the control member.
  • control component is a circuit board, and the chip is powered or controlled by an access electrode.
  • the circuit board is one or a combination of a flexible circuit board, a hard circuit board, and a hard and soft combined circuit board.
  • the heat dissipating component further has an electrical conductivity
  • the chip is electrically and thermally connected to the heat dissipating component; the chip is electrically connected to the control component; and the heat dissipating component is electrically connected to the control component.
  • control member is provided with a plurality of pads around the holes, and the pads are connected to the chips and/or the heat dissipating members by conductive wires.
  • the size of the chip is smaller than the size of the hole, and there is a gap between the chip and the control member.
  • the chip is located at the center of the hole.
  • the chip comprises: a semiconductor substrate; at least one VCSEL light source arranged in an array on the semiconductor substrate.
  • the array of VCSEL light sources comprises a regular array or an irregular array.
  • the chip embedding device of the invention can fully reduce the overall volume of the device by opening a hole in the control component and embedding the chip therein, and the chip is directly in contact with the heat dissipating component, and the heat dissipating component simultaneously functions as a supporting chip to ensure Provide maximum heat dissipation to the chip.
  • the chip embedding device of the present invention can realize small volume, high heat dissipation and low power consumption, so that it can be integrated into a micro-computing device.
  • FIG. 1 is a side elevational view of a depth camera system in accordance with an embodiment of the present invention.
  • FIG. 2 is a side elevational view of an optical projection module in accordance with an embodiment of the present invention.
  • FIG 3 is a schematic structural view of a vertical cavity surface laser emitter in an embodiment of the present invention.
  • FIG. 4 is a front elevational view of a VCSEL chip in accordance with an embodiment of the present invention.
  • Figure 5 is a schematic diagram of a chip embedding device in accordance with Embodiment 1 of the present invention.
  • Figure 6 is a front elevational view of the chip embedding device of Embodiment 2 and Embodiment 3 of the present invention.
  • Fig. 7 is a side view of the chip embedding device of the fourth embodiment of the present invention.
  • Figure 8 is a side view of a chip embedding device in accordance with a fifth embodiment of the present invention.
  • the invention provides a chip embedding device with good heat dissipation performance and small volume.
  • the projection module of the depth camera will be taken as an example, but it does not mean that this scheme can only be applied to the depth camera. Any other device that uses the scheme directly or indirectly should be included in the scheme. Within the scope of protection of the present invention.
  • FIG. 10 A schematic side view of a structured light based depth camera shown in FIG.
  • the main components of the depth camera 10 include a laser projection module 13, an acquisition module 14, a main board 12, and a processor 11, and an RGB camera 16 is also provided in some depth cameras.
  • the laser projection module 13, the acquisition module 14 and the RGB camera 16 are generally mounted on the same depth camera plane and at the same baseline, each module or camera corresponding to an incoming window 17.
  • the processor 11 is integrated on the main board 12, and the laser projection module 13 and the acquisition model 14 are connected to the main board through the interface 15.
  • the interface is an FPC interface.
  • the laser projection module is configured to project the encoded structured light pattern into the target space, and the acquisition model collects the structured light image and processes the image through the processor to obtain a depth image of the target space.
  • the structured light image is an infrared speckle pattern having a relatively uniform particle distribution but a high local irrelevance, where local irrelevance refers to each sub-region of the pattern having a higher Uniqueness.
  • the corresponding acquisition module 14 is a corresponding infrared camera.
  • the main component of the depth camera based on the principle of time flight method is also the projection module and the acquisition module.
  • the projection module is used to transmit the light pulse of the recording time, and the acquisition module After the light pulse is collected, the flight time of the light in the space can be obtained, and the distance of the corresponding spatial point is calculated by the processor.
  • a single depth camera is mostly used as an independent peripheral device, and is connected to other devices such as a computer or a mobile phone through a data interface such as USB, and transmits the acquired depth information to other devices for further processing.
  • a data interface such as USB
  • integrating and integrating depth cameras with other devices will be the future direction.
  • the motherboard, the processor of the depth camera, the motherboard and the processor of the computer mobile phone and the like can be integrated; in the acquisition module
  • large-scale devices such as computers currently have related solutions.
  • only small-sized laser projection modules can meet the requirements, and the power consumption due to laser projection is large and hot.
  • the focus of the present invention will be to provide a chip embedding device that can be used in a depth camera projection module with high heat dissipation and small volume, but is not limited to a depth camera.
  • the laser projection module will be described in detail according to an embodiment of the present invention.
  • the projection module 13 includes a base 131, a light source 132, upper and lower mirror mounts 133 and 134, a lens 135, and a diffractive optical element (DOE) 136.
  • the beam emitted by source 132 is collimated by lens 135 and emitted by space from DOE 136.
  • lens 135 is positioned between source 132 and diffractive optical element 136.
  • the distance between lens 135 and source 132 is preferably equal to the focal length of the lens.
  • the lens and DOE can also be integrated into one optical component.
  • the upper and lower mirror mounts can be connected by screw connection or direct contact.
  • the former method is convenient for adjusting the focal length, and the latter method is more troublesome to adjust, but the optical axis can be adjusted in addition to the focal length.
  • the base 131 on the one hand requires sufficient hardness to support the light source, and on the other hand, requires high heat dissipation.
  • the volume of the laser projection module affects the size of the entire depth camera, and the size of the light source 132 and the base 131 is an important factor affecting the volume of the laser projection module.
  • the vertical cavity surface laser emitter VCSEL
  • the advantages of small volume, small light source emission angle, good stability, etc. which can be used as a light source of the projection module to reduce the overall volume.
  • FIG. 3 is a schematic diagram of the structure of a single VCSEL.
  • 301 is a single VCSEL.
  • the active layer 305 of the VCSEL is in the middle, and the active layer is connected to a limiting layer 306.
  • the limiting layer functions to control the light field and current to achieve the laser shape.
  • the control layer has P-type and N-type semiconductor mirrors 304 and 307 at both ends of the active layer, and the other side of the mirror 307 is a top electrode 308 (P pole, positive electrode), and one side of the mirror 304 is The semiconductor substrate 303 and the bottom electrode 302 (N pole, negative electrode).
  • Figure 4 shows a schematic of a VCSEL array.
  • the light source power can be increased by arranging a plurality of VCSELs 403 on the same semiconductor substrate 402 in an array, and simultaneously manufacturing a plurality of VCSELs on the same semiconductor substrate.
  • Light source is also available to greatly improve manufacturing efficiency.
  • the VCSEL array chip 401 is currently at the wafer level scale, i.e., hundreds of VCSEL sources can be placed on a 1 mm2 chip.
  • the control of the light source can have different modes, all VCSEL light sources on the chip are controlled to be turned on and off synchronously, or the VCSELs on the chip are controlled independently or in groups to produce different illumination densities.
  • the first mode is employed, ie all VCSEL light sources on the chip are synchronously controlled to turn on and off.
  • a second mode may be employed in which the VCSELs on the chip are controlled independently or in groups to produce different illumination densities.
  • the form and arrangement of the VCSEL 403 can be various according to specific application requirements, such as uniformly or regularly arranged or irregularly arranged in a certain irrelevant pattern.
  • the shape and area of a single VCSEL may also be different. Formal irregularities can lead to a reduction in manufacturing efficiency.
  • the VCSELs 403 are uniformly and regularly arranged on the semiconductor substrate 402.
  • the VCSELs 403 are irregularly arranged on the semiconductor substrate 402 in a certain uncorrelated pattern, depending on the particular application requirements.
  • the VCSEL chip can also be packaged for special purposes, similar to a computer such as a CPU, and the positive and negative electrodes are connected to the outside on the same side by connecting to the pins.
  • a preferred processing method is to directly place the unpackaged VCSEL semiconductor chip chip on the base 131.
  • the bottom of the chip is connected to the negative electrode and the top is connected to the positive electrode.
  • a VCSEL chip chip will be described as an example, but it should be understood that a package chip is also included in the scope of the present invention.
  • Chips need to have a load and connection mechanism to ensure the normal function of the chip.
  • the computer CPU has a card-type connection and fixing mechanism independently designed for it; for some special chips with little heat, it is directly connected to the main board through the pin; and for the chip of the present invention, generally High heat generation and a need for a secure fixture.
  • VCSEL array chips are used to emit light beams, require large power, generate large amounts of heat, and need to be integrated into smaller micro-devices. The heat dissipation problem needs to be solved.
  • the relative positional requirements of the laser projection module are very robust to ensure a stable, accurate depth image output. Therefore, the carrying and connecting mechanism of the VCSEL array chip requires a small volume for integration, and requires better heat dissipation performance and a stable connection.
  • the chip embedding device of the invention comprises a supporting component for carrying the chip; a heat dissipating component for dissipating heat generated by the chip; and a control component for controlling the working of the chip, wherein the base 131 of FIG. 2 is used
  • the base 131 is provided as a chip embedding device 501 as shown in FIGS. 5-8.
  • the chip is specifically a VCSEL chip 506;
  • the control component is specifically a circuit board 503 through which an electrode is connected to power or control the VCSEL chip 506;
  • the support member and the heat dissipating component are specifically the same component. That is, the substrate 502.
  • the chip embedding device of the present invention will be described in detail below with reference to the accompanying drawings in order to better understand the present invention, but the following embodiments do not limit the scope of the invention.
  • the base 131 is provided as a chip embedding device 501 as shown in FIG.
  • the chip is specifically a VCSEL chip 506;
  • the control component is specifically a circuit board 503, and an electrode is connected through the interface 504 to supply or control the VCSEL chip 506;
  • the supporting component and the heat dissipating component are specifically the same component, that is, the substrate 502, for placing and carrying the chip, and connecting with the chip to function as a heat dissipation and/or electrode connection, commonly used materials are copper gold plating, ceramics and the like.
  • the device can be conveniently connected to other control units such as a motherboard, and can stably support the chip.
  • a hole is formed in the middle of the circuit board 503.
  • the substrate 502 is glued to the circuit board 503 and covers the hole (generally, the center of the hole and the circuit board 502 are intermediate Coincident), then place the chip in the hole and connect to the substrate.
  • the advantage of this arrangement is that both the connection between the board and the chip and the overall thickness control can be achieved.
  • the circuit board 503 is a flexible circuit board (FPC)
  • the substrate 502 is a copper-plated material
  • the VCSEL chip is located at the center of the hole, and is connected to the substrate 502 through the conductive silver paste.
  • the substrate 502 is glued to the circuit board 503.
  • a number of pads 505 are disposed around the holes of the FPC, and the pads 505 are connected to the interface 504 by wires.
  • the positive electrode pad is connected to the VCSEL chip top electrode 506 through the gold wire 507, and the negative electrode pad is directly connected to the substrate 502 through the gold wire 508.
  • the realization is also realized.
  • the VCSEL chip is connected to the substrate 502 and the substrate has good thermal conductivity, the heat dissipation problem of the VCSEL chip is also solved.
  • the circuit board 503 and the substrate 502 are physically connected, such as bolts or the like.
  • the glue is used for connection, the advantage is that it does not occupy space and is convenient to operate, but the disadvantage is that the resistance of the glue is large, Therefore, it is not conducive to heat dissipation and will increase power consumption.
  • the specific connection method is not limited herein.
  • the circuit board 503 is a combination of a printed circuit board (PCB) and a flexible circuit board (FPC), that is, a soft and hard combined circuit board.
  • PCB printed circuit board
  • FPC flexible circuit board
  • the circuit board 503 can all utilize a printed circuit board (PCB).
  • the circuit board 503 is connected to the chip 506 and the substrate 502 via gold wires 507 and 508, respectively.
  • the hole size of the circuit board should be larger than the size of the chip 506.
  • the shape of the hole is generally circular or square, and is not limited herein.
  • the gold wire for connection may also be any other material that can achieve an electrically conductive connection.
  • the chip in order to further reduce the volume, may be grooved on the substrate, as shown in Fig. 8, in such a manner that the overall thickness can be further reduced. It should be noted that it is not recommended to open the groove when the thickness of the substrate itself is thin to avoid deformation of the substrate material when the chip is heated.
  • the substrate can also be other thermally conductive materials such as ceramics.
  • the VCSEL chip is only thermally connected to the substrate, and is electrically connected to the positive and negative electrodes of the circuit board, and the connection manner may adopt any other manner in which the conductive connection can be realized, which is not limited herein.
  • the substrate may also be designed to be suitable for heat dissipation, such as adding fan blades or the like to increase the heat dissipation area and the like.
  • the substrate can also be connected to other heat dissipating materials during integration with devices such as mobile phones to improve thermal performance.
  • the chip embedding device of the invention can fully reduce the overall volume of the device by opening a hole in the control component and embedding the chip therein, and the chip is directly in contact with the heat dissipating component, and the heat dissipating component simultaneously functions as a supporting chip to ensure Provide maximum heat dissipation to the chip.
  • the chip embedding device of the present invention can realize small volume, high heat dissipation and low power consumption, so that it can be integrated into a micro-computing device.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Lasers (AREA)

Abstract

L'invention concerne un dispositif à puce intégrée (501) comprenant : un composant de support (502) utilisé pour porter une puce (506) et servant de composant de dissipation de chaleur pour dissiper la chaleur générée par la puce ; et un composant de commande (503) utilisé pour commander le fonctionnement de la puce. Un trou est disposé au niveau du composant de commande. La puce est incorporée dans le trou et en liaison de contact avec le composant de support servant de composant de dissipation de chaleur, de telle sorte que le dispositif a une taille compacte et une performance de dissipation de chaleur élevée. Le dispositif à puce intégrée a une taille compacte, une performance de dissipation de chaleur élevée et une faible consommation d'énergie, et peut être intégré dans un dispositif de microinformatique.
PCT/CN2017/089029 2017-01-19 2017-06-19 Dispositif à puce integrée Ceased WO2018133319A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710044666.0 2017-01-19
CN201710044666.0A CN108336040A (zh) 2017-01-19 2017-01-19 芯片嵌入装置

Publications (1)

Publication Number Publication Date
WO2018133319A1 true WO2018133319A1 (fr) 2018-07-26

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Application Number Title Priority Date Filing Date
PCT/CN2017/089029 Ceased WO2018133319A1 (fr) 2017-01-19 2017-06-19 Dispositif à puce integrée

Country Status (2)

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CN (1) CN108336040A (fr)
WO (1) WO2018133319A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020124955A1 (en) * 2001-03-08 2002-09-12 I-Chung Tung Attachment of a heat spreader for fabricating a cavity down plastic chip carrier
CN101770995A (zh) * 2009-01-04 2010-07-07 台湾沛晶股份有限公司 芯片模块结构总成
CN102082220A (zh) * 2009-11-27 2011-06-01 李学富 一种led发光二极管及其制作工艺
CN104969426A (zh) * 2013-02-04 2015-10-07 微软技术许可有限责任公司 激光二极管设备中的热管理
CN206412341U (zh) * 2017-01-19 2017-08-15 深圳奥比中光科技有限公司 芯片嵌入装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200709471A (en) * 2005-08-29 2007-03-01 Shane Harrah Bendable high flux LED array
CN104730825B (zh) * 2012-03-15 2019-04-02 苹果公司 光电投影设备
US9038883B2 (en) * 2013-09-11 2015-05-26 Princeton Optronics Inc. VCSEL packaging
CN205213227U (zh) * 2015-10-30 2016-05-04 武汉电信器件有限公司 一种cob的散热结构

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020124955A1 (en) * 2001-03-08 2002-09-12 I-Chung Tung Attachment of a heat spreader for fabricating a cavity down plastic chip carrier
CN101770995A (zh) * 2009-01-04 2010-07-07 台湾沛晶股份有限公司 芯片模块结构总成
CN102082220A (zh) * 2009-11-27 2011-06-01 李学富 一种led发光二极管及其制作工艺
CN104969426A (zh) * 2013-02-04 2015-10-07 微软技术许可有限责任公司 激光二极管设备中的热管理
CN206412341U (zh) * 2017-01-19 2017-08-15 深圳奥比中光科技有限公司 芯片嵌入装置

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