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WO2018133319A1 - Chip embedded device - Google Patents

Chip embedded device Download PDF

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Publication number
WO2018133319A1
WO2018133319A1 PCT/CN2017/089029 CN2017089029W WO2018133319A1 WO 2018133319 A1 WO2018133319 A1 WO 2018133319A1 CN 2017089029 W CN2017089029 W CN 2017089029W WO 2018133319 A1 WO2018133319 A1 WO 2018133319A1
Authority
WO
WIPO (PCT)
Prior art keywords
chip
embedding device
heat dissipating
component
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/089029
Other languages
French (fr)
Chinese (zh)
Inventor
李福茂
黄杰凡
黄源浩
肖振中
刘龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Orbbec Co Ltd
Original Assignee
Shenzhen Orbbec Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Orbbec Co Ltd filed Critical Shenzhen Orbbec Co Ltd
Publication of WO2018133319A1 publication Critical patent/WO2018133319A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to the field of electronic and optical component manufacturing, and more particularly to a chip embedding device.
  • the depth camera can acquire the depth information of the target to achieve 3D scanning, scene modeling, and gesture interaction.
  • the depth camera is gradually receiving attention from various industries.
  • a depth camera can be combined with a television, a computer, or the like to realize a somatosensory game to achieve the game fitness two-in-one effect.
  • Google's tango project is dedicated to bringing depth cameras to mobile devices, such as tablets and mobile phones, to bring a completely subversive experience, such as a very realistic AR gaming experience, which can be used for indoor map creation and navigation. And other functions.
  • the core component in the depth camera is the laser projection module.
  • the optical projection module is composed of a circuit board, a light source and the like.
  • a wafer-level vertical cavity surface emitting laser (VCSEL) array light source can reduce the volume of the optical projection module to be embedded in a miniature electronic device such as a mobile phone.
  • a VSCEL is fabricated on a semiconductor substrate, and the semiconductor substrate is connected to a flexible circuit board (FPC).
  • FPC flexible circuit board
  • TEC semiconductor cooler
  • TEC can also be introduced. TEC can control the heat of the light source very well, but due to its high power consumption and large volume, the volume and power consumption of this type of optical projection module are still not ideal.
  • the object of the present invention is to solve the problem of volume and heat dissipation when a chip is combined with a circuit board in the prior art, and a chip embedding device is proposed, which can simultaneously consider the problems of volume and heat dissipation.
  • the chip embedding device of the present invention comprises: a supporting member for carrying a chip; a heat dissipating member for dissipating heat generated by the chip; and a control member for controlling chip operation; wherein the control member has a hole formed therein The chip is embedded in the hole and is in contact with the heat dissipating component. At this time, the heat dissipating component functions as a supporting component, so that the device realizes small volume and high heat dissipation.
  • the heat dissipating member is recessed, and the chip is embedded in a hole of the control member and placed in the groove to be in contact with the heat dissipating member.
  • the heat dissipating member is coupled to the control member and covers a hole in the control member.
  • control component is a circuit board, and the chip is powered or controlled by an access electrode.
  • the circuit board is one or a combination of a flexible circuit board, a hard circuit board, and a hard and soft combined circuit board.
  • the heat dissipating component further has an electrical conductivity
  • the chip is electrically and thermally connected to the heat dissipating component; the chip is electrically connected to the control component; and the heat dissipating component is electrically connected to the control component.
  • control member is provided with a plurality of pads around the holes, and the pads are connected to the chips and/or the heat dissipating members by conductive wires.
  • the size of the chip is smaller than the size of the hole, and there is a gap between the chip and the control member.
  • the chip is located at the center of the hole.
  • the chip comprises: a semiconductor substrate; at least one VCSEL light source arranged in an array on the semiconductor substrate.
  • the array of VCSEL light sources comprises a regular array or an irregular array.
  • the chip embedding device of the invention can fully reduce the overall volume of the device by opening a hole in the control component and embedding the chip therein, and the chip is directly in contact with the heat dissipating component, and the heat dissipating component simultaneously functions as a supporting chip to ensure Provide maximum heat dissipation to the chip.
  • the chip embedding device of the present invention can realize small volume, high heat dissipation and low power consumption, so that it can be integrated into a micro-computing device.
  • FIG. 1 is a side elevational view of a depth camera system in accordance with an embodiment of the present invention.
  • FIG. 2 is a side elevational view of an optical projection module in accordance with an embodiment of the present invention.
  • FIG 3 is a schematic structural view of a vertical cavity surface laser emitter in an embodiment of the present invention.
  • FIG. 4 is a front elevational view of a VCSEL chip in accordance with an embodiment of the present invention.
  • Figure 5 is a schematic diagram of a chip embedding device in accordance with Embodiment 1 of the present invention.
  • Figure 6 is a front elevational view of the chip embedding device of Embodiment 2 and Embodiment 3 of the present invention.
  • Fig. 7 is a side view of the chip embedding device of the fourth embodiment of the present invention.
  • Figure 8 is a side view of a chip embedding device in accordance with a fifth embodiment of the present invention.
  • the invention provides a chip embedding device with good heat dissipation performance and small volume.
  • the projection module of the depth camera will be taken as an example, but it does not mean that this scheme can only be applied to the depth camera. Any other device that uses the scheme directly or indirectly should be included in the scheme. Within the scope of protection of the present invention.
  • FIG. 10 A schematic side view of a structured light based depth camera shown in FIG.
  • the main components of the depth camera 10 include a laser projection module 13, an acquisition module 14, a main board 12, and a processor 11, and an RGB camera 16 is also provided in some depth cameras.
  • the laser projection module 13, the acquisition module 14 and the RGB camera 16 are generally mounted on the same depth camera plane and at the same baseline, each module or camera corresponding to an incoming window 17.
  • the processor 11 is integrated on the main board 12, and the laser projection module 13 and the acquisition model 14 are connected to the main board through the interface 15.
  • the interface is an FPC interface.
  • the laser projection module is configured to project the encoded structured light pattern into the target space, and the acquisition model collects the structured light image and processes the image through the processor to obtain a depth image of the target space.
  • the structured light image is an infrared speckle pattern having a relatively uniform particle distribution but a high local irrelevance, where local irrelevance refers to each sub-region of the pattern having a higher Uniqueness.
  • the corresponding acquisition module 14 is a corresponding infrared camera.
  • the main component of the depth camera based on the principle of time flight method is also the projection module and the acquisition module.
  • the projection module is used to transmit the light pulse of the recording time, and the acquisition module After the light pulse is collected, the flight time of the light in the space can be obtained, and the distance of the corresponding spatial point is calculated by the processor.
  • a single depth camera is mostly used as an independent peripheral device, and is connected to other devices such as a computer or a mobile phone through a data interface such as USB, and transmits the acquired depth information to other devices for further processing.
  • a data interface such as USB
  • integrating and integrating depth cameras with other devices will be the future direction.
  • the motherboard, the processor of the depth camera, the motherboard and the processor of the computer mobile phone and the like can be integrated; in the acquisition module
  • large-scale devices such as computers currently have related solutions.
  • only small-sized laser projection modules can meet the requirements, and the power consumption due to laser projection is large and hot.
  • the focus of the present invention will be to provide a chip embedding device that can be used in a depth camera projection module with high heat dissipation and small volume, but is not limited to a depth camera.
  • the laser projection module will be described in detail according to an embodiment of the present invention.
  • the projection module 13 includes a base 131, a light source 132, upper and lower mirror mounts 133 and 134, a lens 135, and a diffractive optical element (DOE) 136.
  • the beam emitted by source 132 is collimated by lens 135 and emitted by space from DOE 136.
  • lens 135 is positioned between source 132 and diffractive optical element 136.
  • the distance between lens 135 and source 132 is preferably equal to the focal length of the lens.
  • the lens and DOE can also be integrated into one optical component.
  • the upper and lower mirror mounts can be connected by screw connection or direct contact.
  • the former method is convenient for adjusting the focal length, and the latter method is more troublesome to adjust, but the optical axis can be adjusted in addition to the focal length.
  • the base 131 on the one hand requires sufficient hardness to support the light source, and on the other hand, requires high heat dissipation.
  • the volume of the laser projection module affects the size of the entire depth camera, and the size of the light source 132 and the base 131 is an important factor affecting the volume of the laser projection module.
  • the vertical cavity surface laser emitter VCSEL
  • the advantages of small volume, small light source emission angle, good stability, etc. which can be used as a light source of the projection module to reduce the overall volume.
  • FIG. 3 is a schematic diagram of the structure of a single VCSEL.
  • 301 is a single VCSEL.
  • the active layer 305 of the VCSEL is in the middle, and the active layer is connected to a limiting layer 306.
  • the limiting layer functions to control the light field and current to achieve the laser shape.
  • the control layer has P-type and N-type semiconductor mirrors 304 and 307 at both ends of the active layer, and the other side of the mirror 307 is a top electrode 308 (P pole, positive electrode), and one side of the mirror 304 is The semiconductor substrate 303 and the bottom electrode 302 (N pole, negative electrode).
  • Figure 4 shows a schematic of a VCSEL array.
  • the light source power can be increased by arranging a plurality of VCSELs 403 on the same semiconductor substrate 402 in an array, and simultaneously manufacturing a plurality of VCSELs on the same semiconductor substrate.
  • Light source is also available to greatly improve manufacturing efficiency.
  • the VCSEL array chip 401 is currently at the wafer level scale, i.e., hundreds of VCSEL sources can be placed on a 1 mm2 chip.
  • the control of the light source can have different modes, all VCSEL light sources on the chip are controlled to be turned on and off synchronously, or the VCSELs on the chip are controlled independently or in groups to produce different illumination densities.
  • the first mode is employed, ie all VCSEL light sources on the chip are synchronously controlled to turn on and off.
  • a second mode may be employed in which the VCSELs on the chip are controlled independently or in groups to produce different illumination densities.
  • the form and arrangement of the VCSEL 403 can be various according to specific application requirements, such as uniformly or regularly arranged or irregularly arranged in a certain irrelevant pattern.
  • the shape and area of a single VCSEL may also be different. Formal irregularities can lead to a reduction in manufacturing efficiency.
  • the VCSELs 403 are uniformly and regularly arranged on the semiconductor substrate 402.
  • the VCSELs 403 are irregularly arranged on the semiconductor substrate 402 in a certain uncorrelated pattern, depending on the particular application requirements.
  • the VCSEL chip can also be packaged for special purposes, similar to a computer such as a CPU, and the positive and negative electrodes are connected to the outside on the same side by connecting to the pins.
  • a preferred processing method is to directly place the unpackaged VCSEL semiconductor chip chip on the base 131.
  • the bottom of the chip is connected to the negative electrode and the top is connected to the positive electrode.
  • a VCSEL chip chip will be described as an example, but it should be understood that a package chip is also included in the scope of the present invention.
  • Chips need to have a load and connection mechanism to ensure the normal function of the chip.
  • the computer CPU has a card-type connection and fixing mechanism independently designed for it; for some special chips with little heat, it is directly connected to the main board through the pin; and for the chip of the present invention, generally High heat generation and a need for a secure fixture.
  • VCSEL array chips are used to emit light beams, require large power, generate large amounts of heat, and need to be integrated into smaller micro-devices. The heat dissipation problem needs to be solved.
  • the relative positional requirements of the laser projection module are very robust to ensure a stable, accurate depth image output. Therefore, the carrying and connecting mechanism of the VCSEL array chip requires a small volume for integration, and requires better heat dissipation performance and a stable connection.
  • the chip embedding device of the invention comprises a supporting component for carrying the chip; a heat dissipating component for dissipating heat generated by the chip; and a control component for controlling the working of the chip, wherein the base 131 of FIG. 2 is used
  • the base 131 is provided as a chip embedding device 501 as shown in FIGS. 5-8.
  • the chip is specifically a VCSEL chip 506;
  • the control component is specifically a circuit board 503 through which an electrode is connected to power or control the VCSEL chip 506;
  • the support member and the heat dissipating component are specifically the same component. That is, the substrate 502.
  • the chip embedding device of the present invention will be described in detail below with reference to the accompanying drawings in order to better understand the present invention, but the following embodiments do not limit the scope of the invention.
  • the base 131 is provided as a chip embedding device 501 as shown in FIG.
  • the chip is specifically a VCSEL chip 506;
  • the control component is specifically a circuit board 503, and an electrode is connected through the interface 504 to supply or control the VCSEL chip 506;
  • the supporting component and the heat dissipating component are specifically the same component, that is, the substrate 502, for placing and carrying the chip, and connecting with the chip to function as a heat dissipation and/or electrode connection, commonly used materials are copper gold plating, ceramics and the like.
  • the device can be conveniently connected to other control units such as a motherboard, and can stably support the chip.
  • a hole is formed in the middle of the circuit board 503.
  • the substrate 502 is glued to the circuit board 503 and covers the hole (generally, the center of the hole and the circuit board 502 are intermediate Coincident), then place the chip in the hole and connect to the substrate.
  • the advantage of this arrangement is that both the connection between the board and the chip and the overall thickness control can be achieved.
  • the circuit board 503 is a flexible circuit board (FPC)
  • the substrate 502 is a copper-plated material
  • the VCSEL chip is located at the center of the hole, and is connected to the substrate 502 through the conductive silver paste.
  • the substrate 502 is glued to the circuit board 503.
  • a number of pads 505 are disposed around the holes of the FPC, and the pads 505 are connected to the interface 504 by wires.
  • the positive electrode pad is connected to the VCSEL chip top electrode 506 through the gold wire 507, and the negative electrode pad is directly connected to the substrate 502 through the gold wire 508.
  • the realization is also realized.
  • the VCSEL chip is connected to the substrate 502 and the substrate has good thermal conductivity, the heat dissipation problem of the VCSEL chip is also solved.
  • the circuit board 503 and the substrate 502 are physically connected, such as bolts or the like.
  • the glue is used for connection, the advantage is that it does not occupy space and is convenient to operate, but the disadvantage is that the resistance of the glue is large, Therefore, it is not conducive to heat dissipation and will increase power consumption.
  • the specific connection method is not limited herein.
  • the circuit board 503 is a combination of a printed circuit board (PCB) and a flexible circuit board (FPC), that is, a soft and hard combined circuit board.
  • PCB printed circuit board
  • FPC flexible circuit board
  • the circuit board 503 can all utilize a printed circuit board (PCB).
  • the circuit board 503 is connected to the chip 506 and the substrate 502 via gold wires 507 and 508, respectively.
  • the hole size of the circuit board should be larger than the size of the chip 506.
  • the shape of the hole is generally circular or square, and is not limited herein.
  • the gold wire for connection may also be any other material that can achieve an electrically conductive connection.
  • the chip in order to further reduce the volume, may be grooved on the substrate, as shown in Fig. 8, in such a manner that the overall thickness can be further reduced. It should be noted that it is not recommended to open the groove when the thickness of the substrate itself is thin to avoid deformation of the substrate material when the chip is heated.
  • the substrate can also be other thermally conductive materials such as ceramics.
  • the VCSEL chip is only thermally connected to the substrate, and is electrically connected to the positive and negative electrodes of the circuit board, and the connection manner may adopt any other manner in which the conductive connection can be realized, which is not limited herein.
  • the substrate may also be designed to be suitable for heat dissipation, such as adding fan blades or the like to increase the heat dissipation area and the like.
  • the substrate can also be connected to other heat dissipating materials during integration with devices such as mobile phones to improve thermal performance.
  • the chip embedding device of the invention can fully reduce the overall volume of the device by opening a hole in the control component and embedding the chip therein, and the chip is directly in contact with the heat dissipating component, and the heat dissipating component simultaneously functions as a supporting chip to ensure Provide maximum heat dissipation to the chip.
  • the chip embedding device of the present invention can realize small volume, high heat dissipation and low power consumption, so that it can be integrated into a micro-computing device.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

A chip embedded device (501) comprises: a supporting component (502) used to carry a chip (506) and serving as a heat dissipation component to dissipate heat generated by the chip; and a control component (503) used to control operation of the chip. A hole is arranged at the control component. The chip is embedded in the hole and in contact connection with the supporting component serving as a heat dissipation component, such that the device has a compact size and high heat dissipation performance. The chip embedded device has a compact size, high heat dissipation performance and low power consumption, and can be integrated into a microcomputing device.

Description

芯片嵌入装置Chip embedding device 技术领域Technical field

本发明涉及电子及光学元器件制造领域,尤其涉及一种芯片嵌入装置。The present invention relates to the field of electronic and optical component manufacturing, and more particularly to a chip embedding device.

背景技术Background technique

深度相机可以获取目标的深度信息借此实现3D扫描、场景建模、手势交互,与目前被广泛使用的RGB相机相比,深度相机正逐步受到各行各业的重视。例如利用深度相机与电视、电脑等结合可以实现体感游戏以达到游戏健身二合一的效果。另外,谷歌的tango项目致力于将深度相机带入移动设备,如平板、手机,以此带来完全颠覆的使用体验,比如可以实现非常真实的AR游戏体验,可以使用其进行室内地图创建、导航等功能。The depth camera can acquire the depth information of the target to achieve 3D scanning, scene modeling, and gesture interaction. Compared with the currently widely used RGB cameras, the depth camera is gradually receiving attention from various industries. For example, a depth camera can be combined with a television, a computer, or the like to realize a somatosensory game to achieve the game fitness two-in-one effect. In addition, Google's tango project is dedicated to bringing depth cameras to mobile devices, such as tablets and mobile phones, to bring a completely subversive experience, such as a very realistic AR gaming experience, which can be used for indoor map creation and navigation. And other functions.

深度相机中的核心部件是激光投影模组,随着应用的不断扩展,光学投影模组将向越来越小的体积以及越来越高的性能上不断进化。一般地,光学投影模组由电路板、光源等部件组成,目前晶圆级大小的垂直腔面发射激光器(VCSEL)阵列光源使得光学投影模组的体积可以减小到被嵌入到手机等微型电子设备中。一般地,将VSCEL制作在半导体衬底上,并将半导体衬底与柔性电路板(FPC)进行连接,为了解决散热问题,还可以引入半导体致冷器(TEC)。TEC可以很好的对光源发热进行控制,但由于本身的功耗较高,且占用较大的体积,使得这种形式的光学投影模组的体积以及功耗仍不理想。The core component in the depth camera is the laser projection module. As the application continues to expand, the optical projection module will evolve to smaller and smaller volumes and higher and higher performance. Generally, the optical projection module is composed of a circuit board, a light source and the like. At present, a wafer-level vertical cavity surface emitting laser (VCSEL) array light source can reduce the volume of the optical projection module to be embedded in a miniature electronic device such as a mobile phone. In the device. Generally, a VSCEL is fabricated on a semiconductor substrate, and the semiconductor substrate is connected to a flexible circuit board (FPC). To solve the heat dissipation problem, a semiconductor cooler (TEC) can also be introduced. TEC can control the heat of the light source very well, but due to its high power consumption and large volume, the volume and power consumption of this type of optical projection module are still not ideal.

除了深度相机中的激光投影模组,在其他的芯片与电路板结合的领域,也同样面临着体积与散热的问题。In addition to the laser projection module in the depth camera, in the field of combining other chips with the circuit board, it also faces the problem of volume and heat dissipation.

发明内容Summary of the invention

本发明的目的是为了解决现有技术中芯片与电路板结合时的体积与散热的问题,提出一种芯片嵌入装置,能够同时兼顾体积与散热的问题。The object of the present invention is to solve the problem of volume and heat dissipation when a chip is combined with a circuit board in the prior art, and a chip embedding device is proposed, which can simultaneously consider the problems of volume and heat dissipation.

本发明的芯片嵌入装置,包括:支撑部件,用来承载芯片;散热部件,用来将芯片产生的热量散失;控制部件,用来控制芯片工作;其特征在于,所述控制部件中开有孔洞,芯片嵌入到所述孔洞中并与散热部件接触连接,此时散热部件起到支撑部件的作用,从而来使装置实现体积小和高散热。The chip embedding device of the present invention comprises: a supporting member for carrying a chip; a heat dissipating member for dissipating heat generated by the chip; and a control member for controlling chip operation; wherein the control member has a hole formed therein The chip is embedded in the hole and is in contact with the heat dissipating component. At this time, the heat dissipating component functions as a supporting component, so that the device realizes small volume and high heat dissipation.

优选地,所述散热部件开有凹槽,所述芯片嵌入到所述控制部件的孔洞中并放置在所述凹槽中,与散热部件接触连接。 Preferably, the heat dissipating member is recessed, and the chip is embedded in a hole of the control member and placed in the groove to be in contact with the heat dissipating member.

优选地,所述散热部件与所述控制部件连接,且覆盖所述控制部件中的孔洞。Preferably, the heat dissipating member is coupled to the control member and covers a hole in the control member.

优选地,所述控制部件为电路板,通过接入电极给所述芯片供电或控制所述芯片。Preferably, the control component is a circuit board, and the chip is powered or controlled by an access electrode.

优选地,所述电路板为柔性电路板、硬质电路板以及软硬结合电路板的一种或组合。Preferably, the circuit board is one or a combination of a flexible circuit board, a hard circuit board, and a hard and soft combined circuit board.

优选地,所述散热部件还具有导电性能,所述芯片与散热部件导电导热连接;所述芯片与所述控制部件导电连接;所述散热部件与控制部件导电连接。Preferably, the heat dissipating component further has an electrical conductivity, the chip is electrically and thermally connected to the heat dissipating component; the chip is electrically connected to the control component; and the heat dissipating component is electrically connected to the control component.

优选地,所述控制部件在孔洞周围设有多个焊盘,利用导电线将所述焊盘与所述芯片和/或所述散热部件进行连接。Preferably, the control member is provided with a plurality of pads around the holes, and the pads are connected to the chips and/or the heat dissipating members by conductive wires.

优选地,所述芯片的尺寸小于孔洞的尺寸,所述芯片与所述控制部件之间有间隙。Preferably, the size of the chip is smaller than the size of the hole, and there is a gap between the chip and the control member.

优选地,所述芯片位于所述孔洞的中心。Preferably, the chip is located at the center of the hole.

优选地,所述芯片包括:半导体衬底;至少一个VCSEL光源,其以阵列的形式布置在所述半导体衬底上。Preferably, the chip comprises: a semiconductor substrate; at least one VCSEL light source arranged in an array on the semiconductor substrate.

优选地,所述VCSEL光源阵列包括规则阵列或不规则阵列。Preferably, the array of VCSEL light sources comprises a regular array or an irregular array.

与现有技术相比,本发明的有益效果有:Compared with the prior art, the beneficial effects of the present invention are:

本发明提芯片嵌入装置,通过在控制部件上开设孔洞,并将芯片嵌入其中,可以充分减小装置的整体体积,同时芯片与散热部件直接接触连接,散热部件同时起到支撑芯片的作用,保证给芯片提供最大限度的散热。与现有技术相比,本发明的芯片嵌入装置可以实现小体积、高散热以及低功耗,从而可以被集成到微型的计算设备中。The chip embedding device of the invention can fully reduce the overall volume of the device by opening a hole in the control component and embedding the chip therein, and the chip is directly in contact with the heat dissipating component, and the heat dissipating component simultaneously functions as a supporting chip to ensure Provide maximum heat dissipation to the chip. Compared with the prior art, the chip embedding device of the present invention can realize small volume, high heat dissipation and low power consumption, so that it can be integrated into a micro-computing device.

附图说明DRAWINGS

图1是本发明具体实施方式中的深度相机系统的侧视图。1 is a side elevational view of a depth camera system in accordance with an embodiment of the present invention.

图2是本发明具体实施方式中的光学投影模组的侧视图。2 is a side elevational view of an optical projection module in accordance with an embodiment of the present invention.

图3是本发明具体实施方式中的垂直腔面激光发射器的结构示意图。3 is a schematic structural view of a vertical cavity surface laser emitter in an embodiment of the present invention.

图4是本发明具体实施方式中的VCSEL芯片正视图。4 is a front elevational view of a VCSEL chip in accordance with an embodiment of the present invention.

图5是本发明实施例1的芯片嵌入装置示意图。Figure 5 is a schematic diagram of a chip embedding device in accordance with Embodiment 1 of the present invention.

图6是本发明实施例2和实施例3的芯片嵌入装置正视图。Figure 6 is a front elevational view of the chip embedding device of Embodiment 2 and Embodiment 3 of the present invention.

图7是本发明实施例4的芯片嵌入装置侧视图。 Fig. 7 is a side view of the chip embedding device of the fourth embodiment of the present invention.

图8是本发明实施例5的芯片嵌入装置侧视图。Figure 8 is a side view of a chip embedding device in accordance with a fifth embodiment of the present invention.

具体实施方式detailed description

下面结合附图通过具体实施例对本发明进行详细的介绍,以使更好的理解本发明,但下述实施例并不限制本发明范围。The present invention will be described in detail with reference to the accompanying drawings, in order to provide a better understanding of the invention.

本发明提出一种散热性能好以及体积小的芯片嵌入装置。在后面的说明中将以深度相机的投影模组为例进行说明,但并不意味着这种方案仅能应用在深度相机中,任何其他装置中凡是直接或间接利用该方案都应被包含在本发明的保护范围中。The invention provides a chip embedding device with good heat dissipation performance and small volume. In the following description, the projection module of the depth camera will be taken as an example, but it does not mean that this scheme can only be applied to the depth camera. Any other device that uses the scheme directly or indirectly should be included in the scheme. Within the scope of protection of the present invention.

深度相机Depth camera

图1所示的基于结构光的深度相机侧面示意图。深度相机10主要组成部件有激光投影模组13、采集模组14、主板12以及处理器11,在一些深度相机中还配备了RGB相机16。激光投影模组13、采集模组14以及RGB相机16一般被安装在同一个深度相机平面上,且处于同一条基线,每个模组或相机都对应一个进光窗口17。一般地,处理器11被集成在主板12上,而激光投影模组13与采集模型14通过接口15与主板连接,在一种实施例中所述的接口为FPC接口。其中,激光投影模组用于向目标空间中投射经编码的结构光图案,采集模型采集到该结构光图像后通过处理器的处理从而得到目标空间的深度图像。在一个实施例中,结构光图像为红外散斑图案,图案具有颗粒分布相对均匀但具有很高的局部不相关性,这里的局部不相关性指的是图案中各个子区域都具有较高的唯一性。对应的采集模组14为对应的红外相机。A schematic side view of a structured light based depth camera shown in FIG. The main components of the depth camera 10 include a laser projection module 13, an acquisition module 14, a main board 12, and a processor 11, and an RGB camera 16 is also provided in some depth cameras. The laser projection module 13, the acquisition module 14 and the RGB camera 16 are generally mounted on the same depth camera plane and at the same baseline, each module or camera corresponding to an incoming window 17. Generally, the processor 11 is integrated on the main board 12, and the laser projection module 13 and the acquisition model 14 are connected to the main board through the interface 15. In one embodiment, the interface is an FPC interface. The laser projection module is configured to project the encoded structured light pattern into the target space, and the acquisition model collects the structured light image and processes the image through the processor to obtain a depth image of the target space. In one embodiment, the structured light image is an infrared speckle pattern having a relatively uniform particle distribution but a high local irrelevance, where local irrelevance refers to each sub-region of the pattern having a higher Uniqueness. The corresponding acquisition module 14 is a corresponding infrared camera.

基于时间飞行法原理(TOF)的深度相机的主要组成部分也是投影模组与采集模组,与结构光原理的深度相机不同的是其投影模组用于发射记时的光脉冲,采集模组采集到该光脉冲后就可以得到光在空间中的飞行时间,再利用处理器计算出对应的空间点的距离。The main component of the depth camera based on the principle of time flight method (TOF) is also the projection module and the acquisition module. Unlike the depth camera with structured light principle, the projection module is used to transmit the light pulse of the recording time, and the acquisition module After the light pulse is collected, the flight time of the light in the space can be obtained, and the distance of the corresponding spatial point is calculated by the processor.

目前单一的深度相机由于体积较大,大都是作为独立的外设,通过USB等数据接口与其他设备如电脑、手机等连接,并将其获取的深度等信息传输给其他设备进行进一步的处理。随着深度相机的应用越来越广泛,将深度相机与其他设备进行集成、整合将会是未来的发展方向。在主板与处理器的集成方面可以将深度相机的主板、处理器与电脑手机等设备的主板、处理器进行整合;在采集模组 与激光投影模组的集成方面,目前电脑等大型设备都有相关的方案,然而对于手机等微型设备,只有体积小的激光投影模组才能满足要求,另外由于激光投影的功耗较大、发热较多,因此拥有较高的散热性也非常有必要。本发明的重点将是提出一种拥有高散热性及小体积的可以用在深度相机投影模组中的芯片嵌入装置,但不局限于深度相机。接下来根据本发明的实施例方案对激光投影模组进行详细说明。At present, a single depth camera is mostly used as an independent peripheral device, and is connected to other devices such as a computer or a mobile phone through a data interface such as USB, and transmits the acquired depth information to other devices for further processing. With the increasing use of depth cameras, integrating and integrating depth cameras with other devices will be the future direction. In the integration of the motherboard and the processor, the motherboard, the processor of the depth camera, the motherboard and the processor of the computer mobile phone and the like can be integrated; in the acquisition module In terms of integration with laser projection modules, large-scale devices such as computers currently have related solutions. However, for small devices such as mobile phones, only small-sized laser projection modules can meet the requirements, and the power consumption due to laser projection is large and hot. More, so it is necessary to have high heat dissipation. The focus of the present invention will be to provide a chip embedding device that can be used in a depth camera projection module with high heat dissipation and small volume, but is not limited to a depth camera. Next, the laser projection module will be described in detail according to an embodiment of the present invention.

激光投影模组Laser projection module

图2是图1中激光投影模组13的一种实施例。该投影模组13包括底座131、光源132、上下镜座133与134、透镜135以及衍射光学元件(DOE)136。光源132发出的光束经透镜135准直后由DOE136向空间中发射,一般地透镜135位于光源132以及衍射光学元件136之间,透镜135与光源132之间的距离最好等于透镜的焦距。在其它实施例中透镜与DOE也可以整合成一个光学元件。上下镜座之间可以通过螺纹连接也可以直接接触连接,前种方式便于调整焦距,而后种方式调节较为麻烦,但是除了可以调节焦距外还可以调节光轴。底座131一方面要求具有足够的硬度来支撑光源,另一方面还需要有较高的散热性。2 is an embodiment of the laser projection module 13 of FIG. 1. The projection module 13 includes a base 131, a light source 132, upper and lower mirror mounts 133 and 134, a lens 135, and a diffractive optical element (DOE) 136. The beam emitted by source 132 is collimated by lens 135 and emitted by space from DOE 136. Typically lens 135 is positioned between source 132 and diffractive optical element 136. The distance between lens 135 and source 132 is preferably equal to the focal length of the lens. In other embodiments the lens and DOE can also be integrated into one optical component. The upper and lower mirror mounts can be connected by screw connection or direct contact. The former method is convenient for adjusting the focal length, and the latter method is more troublesome to adjust, but the optical axis can be adjusted in addition to the focal length. The base 131 on the one hand requires sufficient hardness to support the light source, and on the other hand, requires high heat dissipation.

激光投影模组的体积影响整个深度相机的大小,而其中光源132与底座131的大小则是影响激光投影模组体积的重要因素。在光源的选择中,垂直腔面激光发射器(VCSEL)拥有体积小、光源发射角小、稳定性好等优点可以用来作为投影模组的光源以减小整体的体积。接下来首先对VCSEL及其阵列芯片进行说明,其次对其与底座131的嵌入式装置进行阐述。The volume of the laser projection module affects the size of the entire depth camera, and the size of the light source 132 and the base 131 is an important factor affecting the volume of the laser projection module. In the choice of light source, the vertical cavity surface laser emitter (VCSEL) has the advantages of small volume, small light source emission angle, good stability, etc., which can be used as a light source of the projection module to reduce the overall volume. Next, the VCSEL and its array chip will be described first, and then the embedded device with the base 131 will be explained.

VCSEL阵列VCSEL array

图3是单个VCSEL的结构示意图。在图3中,301为单个VCSEL,一般地,VCSEL的有源层305在中间,与有源层连接的是限制层306,限制层的作用是用来控制光场和电流以实现对激光形状等的控制,有源层两端还有P型与N型的半导体反射镜304与307,反射镜307的另一侧是顶部电极308(P极、正极),反射镜304的一侧分别是半导体衬底303以及底部电极302(N极、负极)。Figure 3 is a schematic diagram of the structure of a single VCSEL. In FIG. 3, 301 is a single VCSEL. Generally, the active layer 305 of the VCSEL is in the middle, and the active layer is connected to a limiting layer 306. The limiting layer functions to control the light field and current to achieve the laser shape. The control layer has P-type and N-type semiconductor mirrors 304 and 307 at both ends of the active layer, and the other side of the mirror 307 is a top electrode 308 (P pole, positive electrode), and one side of the mirror 304 is The semiconductor substrate 303 and the bottom electrode 302 (N pole, negative electrode).

图4所示的是VCSEL阵列示意图。当单个VCSEL光源的功率等达不到应用要求时,通过将多个VCSEL403以阵列的形式布置在同一个半导体衬底402上可以提高光源功率,另外在同一个半导体衬底上同时制造多个VCSEL光源也可 以大幅提高制造效率。VCSEL阵列芯片401目前可以达到晶圆级的尺度,即可以在1mm2的芯片上布置成百上千个VCSEL光源。对光源的控制可以有不同的模式,芯片上所有的VCSEL光源被同步控制打开与关闭,或者,芯片上的VCSEL被独立或分组控制以产生不同的光照密度。在一些实施例中,采用第一种模式,即芯片上所有的VCSEL光源被同步控制打开与关闭。在另一些实施例中,可以采用第二种模式,即芯片上的VCSEL被独立或分组控制以产生不同的光照密度。Figure 4 shows a schematic of a VCSEL array. When the power of a single VCSEL light source does not meet the application requirements, the light source power can be increased by arranging a plurality of VCSELs 403 on the same semiconductor substrate 402 in an array, and simultaneously manufacturing a plurality of VCSELs on the same semiconductor substrate. Light source is also available To greatly improve manufacturing efficiency. The VCSEL array chip 401 is currently at the wafer level scale, i.e., hundreds of VCSEL sources can be placed on a 1 mm2 chip. The control of the light source can have different modes, all VCSEL light sources on the chip are controlled to be turned on and off synchronously, or the VCSELs on the chip are controlled independently or in groups to produce different illumination densities. In some embodiments, the first mode is employed, ie all VCSEL light sources on the chip are synchronously controlled to turn on and off. In other embodiments, a second mode may be employed in which the VCSELs on the chip are controlled independently or in groups to produce different illumination densities.

VCSEL403的形式及排列按照具体的应用需求可以有多种,比如均匀规则地排列或者以一定的不相关图案进行不规则排列。单个VCSEL的形状、面积也可以不相同。形式上的不规则化会带来制造效率的降低。在一些实施例中,VCSEL403均匀规则地排列在半导体衬底402上,在另一些实施例中,按照具体的应用需求,VCSEL403以一定的不相关图案不规则排列在半导体衬底402上。The form and arrangement of the VCSEL 403 can be various according to specific application requirements, such as uniformly or regularly arranged or irregularly arranged in a certain irrelevant pattern. The shape and area of a single VCSEL may also be different. Formal irregularities can lead to a reduction in manufacturing efficiency. In some embodiments, the VCSELs 403 are uniformly and regularly arranged on the semiconductor substrate 402. In other embodiments, the VCSELs 403 are irregularly arranged on the semiconductor substrate 402 in a certain uncorrelated pattern, depending on the particular application requirements.

在一些实施例中,VCSEL芯片按特殊的用途也可以进行封装,类似于电脑的CPU等芯片,将正负极通过连接到引脚在同一侧与外界连接。针对本发明所述的深度相机实施例而言,由于要求体积小,因而较佳的处理方式是直接将未封装的VCSEL半导体切片芯片置于底座131上。一般地,芯片的底部负极连接,顶部正极连接。在以下说明中将以VCSEL切片芯片为例进行说明,但应理解的是封装芯片也包含在本发明的保护范围内。In some embodiments, the VCSEL chip can also be packaged for special purposes, similar to a computer such as a CPU, and the positive and negative electrodes are connected to the outside on the same side by connecting to the pins. For the depth camera embodiment of the present invention, since the required volume is small, a preferred processing method is to directly place the unpackaged VCSEL semiconductor chip chip on the base 131. Generally, the bottom of the chip is connected to the negative electrode and the top is connected to the positive electrode. In the following description, a VCSEL chip chip will be described as an example, but it should be understood that a package chip is also included in the scope of the present invention.

芯片嵌入装置Chip embedding device

芯片都需要有承载和连接机构,以保证芯片的正常功能。例如电脑CPU有为其独立设计的卡套式连接与固定机构;对于一些发热量不大的专用芯片,会直接通过引脚与主板进行直接相连;而对于本发明所述的芯片,一般具有较高的发热量,且需要有稳固的固定装置。VCSEL阵列芯片由于是用来发射光束,需要较大的功率,发热量较大,另外还需要被集成到体积较小的微型设备中,散热问题需要解决;另一方面,对于深度相机而言,激光投影模组的相对位置要求非常稳固,以确保有稳定、精确的深度图像输出。因此,VCSEL阵列芯片的承载与连接机构就要求既拥有小的体积以便于集成,又需要有较好的散热性能以及稳固的连接。Chips need to have a load and connection mechanism to ensure the normal function of the chip. For example, the computer CPU has a card-type connection and fixing mechanism independently designed for it; for some special chips with little heat, it is directly connected to the main board through the pin; and for the chip of the present invention, generally High heat generation and a need for a secure fixture. VCSEL array chips are used to emit light beams, require large power, generate large amounts of heat, and need to be integrated into smaller micro-devices. The heat dissipation problem needs to be solved. On the other hand, for depth cameras, The relative positional requirements of the laser projection module are very robust to ensure a stable, accurate depth image output. Therefore, the carrying and connecting mechanism of the VCSEL array chip requires a small volume for integration, and requires better heat dissipation performance and a stable connection.

本发明的芯片嵌入装置,包括支撑部件,用来承载芯片;散热部件,用来将芯片产生的热量散失;控制部件,用来控制芯片工作,图2中的底座131即是用 于承载及连接VCSEL阵列芯片,在在下述实施例中,底座131被设置成如图5-8所示的芯片嵌入装置501。在下述实施例1-5中,芯片具体为VCSEL芯片506;控制部件具体的为电路板503,通过其接口504接入电极以供电或控制VCSEL芯片506;支撑部件和散热部件具体为同一个部件,即基底502。下面结合附图通过具体的实施例对本发明的芯片嵌入装置进行详细的介绍,以使更好的理解本发明,但下述实施例并不限制本发明范围。The chip embedding device of the invention comprises a supporting component for carrying the chip; a heat dissipating component for dissipating heat generated by the chip; and a control component for controlling the working of the chip, wherein the base 131 of FIG. 2 is used To carry and connect the VCSEL array chip, in the following embodiment, the base 131 is provided as a chip embedding device 501 as shown in FIGS. 5-8. In the following embodiments 1-5, the chip is specifically a VCSEL chip 506; the control component is specifically a circuit board 503 through which an electrode is connected to power or control the VCSEL chip 506; the support member and the heat dissipating component are specifically the same component. That is, the substrate 502. The chip embedding device of the present invention will be described in detail below with reference to the accompanying drawings in order to better understand the present invention, but the following embodiments do not limit the scope of the invention.

实施例1Example 1

在本实施例中,底座131被设置成如图5所示的芯片嵌入装置501。在本实施例中,芯片具体为VCSEL芯片506;控制部件具体的为电路板503,通过其接口504接入电极以供电或控制VCSEL芯片506;支撑部件和散热部件具体为同一个部件,即基底502,用于放置并承载芯片,并且与芯片连接起到散热和/或电极连接的作用,常用的材料为铜镀金、陶瓷等等。该装置可以方便地与其他控制单元如主板进行连接,且可以稳定地支撑芯片。In the present embodiment, the base 131 is provided as a chip embedding device 501 as shown in FIG. In this embodiment, the chip is specifically a VCSEL chip 506; the control component is specifically a circuit board 503, and an electrode is connected through the interface 504 to supply or control the VCSEL chip 506; the supporting component and the heat dissipating component are specifically the same component, that is, the substrate 502, for placing and carrying the chip, and connecting with the chip to function as a heat dissipation and/or electrode connection, commonly used materials are copper gold plating, ceramics and the like. The device can be conveniently connected to other control units such as a motherboard, and can stably support the chip.

在本实施例中,为了减小整体的体积,采取的是在电路板503中间增加孔洞的形式,基底502与电路板503胶接,并且覆盖了孔洞(一般地,孔洞中心与电路板502中间重合),然后将芯片置于孔洞中且与基底连接。这种设置的好处在于可以同时兼顾电路板与芯片之间的连接以及整体厚度的控制。In the present embodiment, in order to reduce the overall volume, a hole is formed in the middle of the circuit board 503. The substrate 502 is glued to the circuit board 503 and covers the hole (generally, the center of the hole and the circuit board 502 are intermediate Coincident), then place the chip in the hole and connect to the substrate. The advantage of this arrangement is that both the connection between the board and the chip and the overall thickness control can be achieved.

实施例2Example 2

在本实施例中的芯片嵌入装置501,如图6所示,电路板503为柔性电路板(FPC),基底502为铜镀金材料,VCSEL芯片位于孔洞中心,且通过导电银浆与基底502连接,基底502与电路板503胶接。在FPC的孔洞周围布置了一些焊盘505,焊盘505通过线路与接口504连接。在图6中,正极焊盘通过金线507与VCSEL芯片顶端电极506连接,负极焊盘通过金线508直接与基底502连接,由于基底与芯片的底部电极通过导电银浆相连,因而也就实现了焊盘与底部电极的间接连接。另外,由于VCSEL芯片与基底502连接,且基底具有很好的导热性,因此VCSEL芯片的散热问题也得到了解决。In the chip embedding device 501 in this embodiment, as shown in FIG. 6, the circuit board 503 is a flexible circuit board (FPC), the substrate 502 is a copper-plated material, and the VCSEL chip is located at the center of the hole, and is connected to the substrate 502 through the conductive silver paste. The substrate 502 is glued to the circuit board 503. A number of pads 505 are disposed around the holes of the FPC, and the pads 505 are connected to the interface 504 by wires. In FIG. 6, the positive electrode pad is connected to the VCSEL chip top electrode 506 through the gold wire 507, and the negative electrode pad is directly connected to the substrate 502 through the gold wire 508. Since the substrate and the bottom electrode of the chip are connected by the conductive silver paste, the realization is also realized. The indirect connection of the pad to the bottom electrode. In addition, since the VCSEL chip is connected to the substrate 502 and the substrate has good thermal conductivity, the heat dissipation problem of the VCSEL chip is also solved.

实施例3Example 3

在本实施例中,电路板503与基底502之间通过物理连接,比如螺栓等。若利用胶水连接,优点在于不占用空间,操作便捷,但缺点是由于胶水的电阻较大, 因而不利于散热,会增加功耗。具体的连接方式在此不做限定。In the present embodiment, the circuit board 503 and the substrate 502 are physically connected, such as bolts or the like. If the glue is used for connection, the advantage is that it does not occupy space and is convenient to operate, but the disadvantage is that the resistance of the glue is large, Therefore, it is not conducive to heat dissipation and will increase power consumption. The specific connection method is not limited herein.

实施例4Example 4

在本实施例中,电路板503为印制电路板(PCB)与柔性电路板(FPC)的结合,即软硬结合电路板,与FPC相比,PCB硬度高,承载性能较好,但是连接则较为困难。因此,在本实施例中,采用了二者结合的方式,即接口所在部位用FPC,而在与基底连接的部位采用软硬结合板。在其他实施例中,电路板503可以全部采用印制电路板(PCB)。In this embodiment, the circuit board 503 is a combination of a printed circuit board (PCB) and a flexible circuit board (FPC), that is, a soft and hard combined circuit board. Compared with the FPC, the PCB has high hardness and good carrying performance, but the connection is good. It is more difficult. Therefore, in the embodiment, the combination of the two is adopted, that is, the FPC is used for the part where the interface is located, and the soft and hard bonding board is used for the part connected to the substrate. In other embodiments, the circuit board 503 can all utilize a printed circuit board (PCB).

电路板与芯片及基底的连接,更清晰地可见图7。在图7中,电路板503通过金线507和508分别与芯片506以及基底502连接。一般地,电路板的孔洞尺寸应大于芯片506的尺寸,一方面便于安装以及为金线508与基底502的连接留出操作空隙,另一方面进一步提高了基底502的散热性能。孔洞的形状一般为圆形或方形,在此不做限定。The connection between the board and the chip and substrate is more clearly seen in Figure 7. In FIG. 7, the circuit board 503 is connected to the chip 506 and the substrate 502 via gold wires 507 and 508, respectively. Generally, the hole size of the circuit board should be larger than the size of the chip 506. On the one hand, it is easy to install and leave an operation gap for the connection of the gold wire 508 and the substrate 502, and on the other hand, the heat dissipation performance of the substrate 502 is further improved. The shape of the hole is generally circular or square, and is not limited herein.

在其他实施例中,连接用的金线也可以为其他任何可以实现导电连接的材料。In other embodiments, the gold wire for connection may also be any other material that can achieve an electrically conductive connection.

实施例5Example 5

在本实施例中,为了进一步地减小体积,可以在基底上为芯片开凹槽,如图8所示,这种方式可以进一步减小整体的厚度。需要注意的是,当基底本身厚度就较薄时不建议开凹槽,以避免当芯片发热时会导致基底材料的变形。In the present embodiment, in order to further reduce the volume, the chip may be grooved on the substrate, as shown in Fig. 8, in such a manner that the overall thickness can be further reduced. It should be noted that it is not recommended to open the groove when the thickness of the substrate itself is thin to avoid deformation of the substrate material when the chip is heated.

在其他实施例中,基底也可以是其他导热材料,比如陶瓷。此时,VCSEL芯片与基底仅导热连接,与电路板的正、负极导电连接,连接方式可以采取任何其他可以实现导电连接的方式,在此不做限定。In other embodiments, the substrate can also be other thermally conductive materials such as ceramics. At this time, the VCSEL chip is only thermally connected to the substrate, and is electrically connected to the positive and negative electrodes of the circuit board, and the connection manner may adopt any other manner in which the conductive connection can be realized, which is not limited herein.

在其他实施例中,基底也可以被设计成适合散热的形状,比如增加扇叶等方式以增加散热面积等。在与手机等设备进行集成过程中也可以将基底与其他散热材料进行连接以提升散热性能。In other embodiments, the substrate may also be designed to be suitable for heat dissipation, such as adding fan blades or the like to increase the heat dissipation area and the like. The substrate can also be connected to other heat dissipating materials during integration with devices such as mobile phones to improve thermal performance.

本发明提芯片嵌入装置,通过在控制部件上开设孔洞,并将芯片嵌入其中,可以充分减小装置的整体体积,同时芯片与散热部件直接接触连接,散热部件同时起到支撑芯片的作用,保证给芯片提供最大限度的散热。与现有技术相比,本发明的芯片嵌入装置可以实现小体积、高散热以及低功耗,从而可以被集成到微型的计算设备中。 The chip embedding device of the invention can fully reduce the overall volume of the device by opening a hole in the control component and embedding the chip therein, and the chip is directly in contact with the heat dissipating component, and the heat dissipating component simultaneously functions as a supporting chip to ensure Provide maximum heat dissipation to the chip. Compared with the prior art, the chip embedding device of the present invention can realize small volume, high heat dissipation and low power consumption, so that it can be integrated into a micro-computing device.

以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的技术人员来说,在不脱离本发明构思的前提下,还可以做出若干等同替代或明显变型,而且性能或用途相同,都应当视为属于本发明的保护范围。 The above is a further detailed description of the present invention in connection with the specific preferred embodiments, and the specific embodiments of the present invention are not limited to the description. It will be apparent to those skilled in the art that <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;

Claims (11)

一种芯片嵌入装置,包括:支撑部件,用来承载芯片;散热部件,用来将芯片产生的热量散失;控制部件,用来控制芯片工作;其特征在于,所述控制部件中开有孔洞,芯片嵌入到所述孔洞中并与散热部件接触连接,此时散热部件起到支撑部件的作用,从而来使装置实现体积小和高散热。A chip embedding device comprising: a supporting component for carrying a chip; a heat dissipating component for dissipating heat generated by the chip; and a control component for controlling chip operation; wherein the control component has a hole therein. The chip is embedded in the hole and is in contact with the heat dissipating member. At this time, the heat dissipating member functions as a supporting member to realize a small size and high heat dissipation of the device. 根据权利要求1所述的芯片嵌入装置,其特征在于,所述散热部件开有凹槽,所述芯片嵌入到所述控制部件的孔洞中并放置在所述凹槽中,与散热部件接触连接。The chip embedding device according to claim 1, wherein the heat dissipating member is recessed, and the chip is embedded in a hole of the control member and placed in the groove to be in contact with the heat dissipating member. . 根据权利要求1所述的芯片嵌入装置,其特征在于,所述散热部件与所述控制部件连接,且覆盖所述控制部件中的孔洞。The chip embedding device according to claim 1, wherein the heat dissipating member is connected to the control member and covers a hole in the control member. 根据权利要求1所述的芯片嵌入装置,其特征在于,所述控制部件为电路板,通过接入电极给所述芯片供电或控制所述芯片。The chip embedding device according to claim 1, wherein the control unit is a circuit board that supplies power to the chip or controls the chip through an access electrode. 根据权利要求4所述的芯片嵌入装置,其特征在于,所述电路板为柔性电路板、硬质电路板以及软硬结合电路板的一种或组合。The chip embedding device according to claim 4, wherein the circuit board is one or a combination of a flexible circuit board, a hard circuit board, and a hard and hard circuit board. 根据权利要求1-5任一所述的芯片嵌入装置,其特征在于,所述散热部件还具有导电性能,所述芯片与散热部件导电导热连接;The chip embedding device according to any one of claims 1 to 5, wherein the heat dissipating component further has an electrical conductivity, and the chip is electrically and thermally connected to the heat dissipating component; 所述芯片与所述控制部件导电连接;The chip is electrically connected to the control component; 所述散热部件与控制部件导电连接。The heat dissipating component is electrically connected to the control component. 根据权利要求6所述的芯片嵌入装置,其特征在于,所述控制部件在孔洞周围设有多个焊盘,利用导电线将所述焊盘与所述芯片和/或所述散热部件进行连接。The chip embedding device according to claim 6, wherein the control member is provided with a plurality of pads around the hole, and the pad is connected to the chip and/or the heat dissipating member by a conductive wire. . 根据权利要求7所述的芯片嵌入装置,其特征在于,所述芯片的尺寸小于孔洞的尺寸,所述芯片与所述控制部件之间有间隙。The chip embedding device according to claim 7, wherein the size of the chip is smaller than a size of a hole, and a gap is formed between the chip and the control member. 根据权利要求7或8所述的芯片嵌入装置,其特征在于,所述芯片位于所述孔洞的中心。A chip embedding device according to claim 7 or 8, wherein the chip is located at the center of the hole. 根据权利要求1所述的芯片嵌入装置,其特征在于,所述芯片包括:The chip embedding device according to claim 1, wherein the chip comprises: 半导体衬底;Semiconductor substrate 至少一个VCSEL光源,其以阵列的形式布置在所述半导体衬底上。At least one VCSEL light source is disposed on the semiconductor substrate in an array. 根据权利要求10所述的芯片嵌入装置,其特征在于,所述VCSEL光源阵列包括规则阵列或不规则阵列。 The chip embedding device of claim 10, wherein the array of VCSEL light sources comprises a regular array or an irregular array.
PCT/CN2017/089029 2017-01-19 2017-06-19 Chip embedded device Ceased WO2018133319A1 (en)

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