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WO2018126486A1 - Procédé et appareil d'amélioration de contraste d'image vidéo parallèle - Google Patents

Procédé et appareil d'amélioration de contraste d'image vidéo parallèle Download PDF

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Publication number
WO2018126486A1
WO2018126486A1 PCT/CN2017/070672 CN2017070672W WO2018126486A1 WO 2018126486 A1 WO2018126486 A1 WO 2018126486A1 CN 2017070672 W CN2017070672 W CN 2017070672W WO 2018126486 A1 WO2018126486 A1 WO 2018126486A1
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WIPO (PCT)
Prior art keywords
buffer
parallel
unit
gray
image
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PCT/CN2017/070672
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English (en)
Chinese (zh)
Inventor
刘壮
郭若杉
谭吉来
李瑞玲
韩睿
李晨
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Institute of Automation of Chinese Academy of Science
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Institute of Automation of Chinese Academy of Science
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Priority to PCT/CN2017/070672 priority Critical patent/WO2018126486A1/fr
Publication of WO2018126486A1 publication Critical patent/WO2018126486A1/fr
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/20—Circuitry for controlling amplitude response
    • H04N5/202—Gamma control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/30—Transforming light or analogous information into electric information
    • H04N5/32—Transforming X-rays
    • H04N5/321—Transforming X-rays with video transmission of fluoroscopic images
    • H04N5/325—Image enhancement, e.g. by subtraction techniques using polyenergetic X-rays

Definitions

  • the invention belongs to the field of video image processing, and in particular relates to a parallel video image contrast enhancement method and device.
  • one of the mainstream development directions of video technology is ultra high definition (4K resolution) display technology.
  • 4K resolution 4K resolution
  • the number of pixels in 4K video is increased from 2M to 8M, which puts higher requirements on the image quality and performance of image enhancement algorithms.
  • the image contrast enhancement technology is basically based on the histogram equalization algorithm.
  • the existing contrast enhancement algorithm mainly the mapping curve generation algorithm
  • the control of the gray scale mapping curve may not be accurate enough. I can't get the ideal picture quality.
  • the traditional scheme faces two difficulties in the ultra-high-definition era. 1
  • the traditional scheme usually adopts a dedicated hardware circuit of the solidification algorithm, and it is difficult to flexibly modify the algorithm. When the algorithm needs to be modified, the reflow is required, and the cost pressure is huge; In the implementation of parallel table lookup, the program usually uses multiple memory access channels to work in parallel, which increases the hardware cost.
  • the present invention proposes a parallel image contrast enhancement apparatus and method, which is mainly used for realizing low-cost, high-speed parallel table lookup, and can reconstruct hardware according to an image processing algorithm; The real-time calculation of the gray scale mapping function and the parallel gray scale mapping operation.
  • an aspect of the present invention provides a parallel video image contrast enhancement method, which includes the following steps:
  • Step 1 Obtain a gray histogram of the image to be processed, and calculate a gray map search table
  • Step 2 based on the gray-scale mapping lookup table, performs gray-scale transformation on the image to be processed by parallel look-up table manner, and completes contrast enhancement.
  • the calculation obtains a gray map search table by using a histogram equalization algorithm to calculate an image gray histogram, and generating a map curve, and then calculating the gray map search table.
  • the grayscale transformation is performed on the image to be processed by the parallel lookup table, and the grayscale transformation is performed by using the segmentation lookup table, including the following steps:
  • Step 22 Perform a table lookup on the M sub-lookup tables of size N by the lower byte of the pixel gray value;
  • step 23 the M table lookup results are filtered by the high order byte, and finally the lookup table data is obtained as a result of the gray scale transformation.
  • step 1 and step 2 further comprise a step of loading data, the step comprising:
  • the image data to be processed is loaded to the buffer.
  • the buffer unit size in the buffer is N pixels; the buffer is equipped with 4 read ports and 4 write ports.
  • the buffer supports direct reading and writing of the buffer unit therein using the serial number; the buffer operates in synchronization with the computing unit.
  • the gray map mapping table is calculated by the step 1 of the current frame image, and is applied to the contrast enhancement performed by the step 2 in the next frame image.
  • a parallel video image contrast enhancement apparatus including a scalar processing unit SPU, a local memory, a memory access control unit, a buffer, a parallel arithmetic logic unit ALU, a state machine, and a data interleaving unit SHU;
  • the scalar processing unit is configured to calculate a gray histogram of the image, and calculate a gray map search table
  • the local memory is configured to save input and output image data and parameters required by a parallel video image contrast enhancement algorithm, and the memory supports parallel access;
  • the memory access control unit is configured to exchange data between the local memory and the buffer
  • the buffer is used to buffer all data and intermediate results required for a complete processing flow, and the buffer can be directly indexed by an address;
  • the parallel arithmetic logic unit is configured to perform non-multiplication-like arithmetic and logic operations involved in a parallel video image contrast enhancement algorithm
  • the state machine for generating control signals for all functional components
  • the data interleaving unit is configured to perform a parallel table lookup operation
  • the state machine is respectively connected to a parallel arithmetic logic unit, a scalar processing unit, a memory access control unit, a buffer, and a data interleaving unit through a communication line;
  • the local memory is respectively connected to a scalar processing unit and a memory access control unit through a communication line;
  • the buffers are respectively connected to the memory access control unit and the data interleaving unit through communication lines;
  • the parallel arithmetic logic units are respectively connected to the buffer and the data interleaving unit through communication lines.
  • the data buffered by the buffer further includes a grayscale mapping lookup table.
  • the contrast is enhanced according to the gray scale distribution of the image, and the viewing effect is more natural;
  • FIG. 1 is a schematic structural diagram of a parallel video image contrast enhancement apparatus of the present invention
  • FIG. 2 is a schematic flow chart of a parallel video image contrast enhancement method of the present invention
  • FIG. 3 is a schematic diagram of a buffer of a buffer in accordance with an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a gray scale mapping process in accordance with an embodiment of the present invention.
  • a parallel video image contrast enhancement apparatus of the present invention includes a scalar processing unit (SPU), a local memory, a memory access control unit, a buffer, an parallel arithmetic logic unit (ALU), a state machine, and a data interleaving Unit (SHU);
  • SPU scalar processing unit
  • ALU parallel arithmetic logic unit
  • SHU data interleaving Unit
  • the scalar processing unit is configured to calculate a gray histogram of the image, and calculate a gray map search table
  • the local memory is configured to save input and output image data and parameters required by a parallel video image contrast enhancement algorithm, and the memory supports parallel access;
  • the memory access control unit is used for data exchange between the local memory and the buffer; in this embodiment, three memory access control units with the same function are completely used, which breaks through the bottleneck of the memory of the memory;
  • the buffer is used to buffer all data and intermediate results required for a complete processing flow, and the buffer can be directly indexed by an address; the data buffered by the buffer further includes a grayscale mapping lookup table;
  • the parallel arithmetic logic unit is configured to perform non-multiplication-like arithmetic and logic operations involved in a parallel video image contrast enhancement algorithm
  • the state machine for generating control signals for all functional components
  • the data interleaving unit is configured to perform a parallel table lookup operation
  • the state machine is respectively connected to a parallel arithmetic logic unit, a scalar processing unit, a memory access control unit, a buffer, and a data interleaving unit through a communication line;
  • the local memory is respectively connected to a scalar processing unit and a memory access control unit through a communication line;
  • the buffers are respectively connected to the memory access control unit and the data interleaving unit through communication lines;
  • the parallel arithmetic logic units are respectively connected to the buffer and the data interleaving unit through communication lines.
  • the device When the enhancement algorithm needs to be changed, the device only needs to reprogram the SPU and the state machine, generate new gray mapping functions and control signals, and update the algorithm parameters in the local memory to quickly implement the algorithm iteration without Redesigned and manufactured hardware circuits.
  • a parallel video image contrast enhancement method of the present invention includes the following steps:
  • Step 1 Calculate a mapping lookup table: obtain a gray histogram of the image to be processed, and calculate a grayscale mapping lookup table;
  • Step 2 Grayscale mapping: based on the grayscale mapping lookup table, perform grayscale transformation on the image to be processed by parallel lookup mode, and complete contrast enhancement.
  • Steps 1 and 2 further include data loading steps, including: (1) algorithm parameter preloading: loading the gray map mapping table and preset parameters generated in step 1 into the buffer; (2) data buffering: The image data to be processed is loaded to the buffer.
  • This step is pre-calculated by parameters.
  • This embodiment uses the scalar processing unit (SPU) in the apparatus of the present invention to complete this step.
  • the specific method involved in this step is the same as the commonly used histogram equalization algorithm, specifically: using histogram equalization.
  • the algorithm counts the image gray histogram and generates a mapping curve, and then calculates the gray map lookup table. Since this step can only be done serially, in the specific implementation of the video image processing, the gray map search table generated by the step is applied to the image processing of the next frame, and the current frame uses the mapping function of the previous frame.
  • the image quality loss introduced by this processing method can be considered to be invisible to the naked eye, so it can be considered that the method is lossless.
  • This step preloads the calculated gray map search lookup table and other cure parameters involved in the parallel video image contrast enhancement algorithm into the buffer.
  • the buffer (represented by a capital letter M) coexists with NM buffer units of size N pixels, equipped with four read ports (r0, r1, r2, r3) and 4 writes.
  • the ingress port (w0, w1, w2, w3) can carry high-speed read and write operations.
  • the buffer M supports direct reading and writing of NM buffer units by using serial numbers, which facilitates repeated use of data.
  • the buffer used in the present invention operates in synchronization with the arithmetic unit, avoiding the problem that the high speed computing unit waits for the low speed storage unit.
  • This step prepares the data to be processed for the image contrast enhancement algorithm.
  • the parallelism of the image contrast enhancement method of the present invention is N, that is, N pixels are processed at the same time, so it is necessary to buffer N pixels at a time.
  • a multi-granular discrete memory structure buffer is used in the device of the present invention.
  • Patent No. 201110460585.1 Named Multi-Grained Parallel Storage System and Memory. design.
  • the invention realizes the parallelization of the table lookup operation by the data interleaving unit.
  • the data interleaving unit (SHU) has a degree of parallelism of N, that is, supports N pixels to perform a table lookup operation on a table of size N.
  • M sub-lookup tables of size N are looked up by the lower byte of the pixel gray value, and the M table lookup results are filtered by the high order byte, and finally the table lookup data is obtained.
  • the gradation of the pixel to be processed is Y
  • the value of the 6th to the 10th digits from the lowest digit (inclusive) is 5, and each screening can exclude half of the table lookup results, and finally obtain and output the map gray scale corresponding to Y, that is, the required lookup table
  • gray scale mapping is completed to achieve contrast enhancement.
  • the device is not only suitable for the case where the lookup table size is 1024, but is generally applicable to various sizes of lookup tables involved in the field of image processing.
  • the above process explains the complete processing flow of the present invention.
  • the invention realizes the reuse of hardware resources by programming the state machine and using the buffer design, and avoids the traditional dedicated circuit scheme design flow when running the complex algorithm.
  • the shortcomings of long chip cycles and high version iteration costs are avoided.
  • the parallel video image contrast enhancement method of the invention can fully utilize the high-speed universal buffer and the data interleaving unit, so that the image data only needs to perform a reading and writing operation on the local memory, which significantly reduces the requirement for the memory bandwidth and improves the requirement.
  • Efficiency while the data interleaving unit can improve the efficiency of the table lookup operation to N times that of the traditional table lookup method, and N is the degree of parallelism of the system.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Image Processing (AREA)

Abstract

La présente invention concerne un appareil d'amélioration de contraste d'image vidéo parallèle qui comporte une unité de traitement scalaire, une mémoire locale, une unité de commande d'accès à la mémoire, un tampon, une unité de logique arithmétique parallèle, une machine d'état et une unité d'entrelacement de données. La présente invention concerne en outre un procédé d'amélioration de contraste d'image vidéo parallèle qui consiste : étape 1, à acquérir un histogramme d'échelle de gris d'une image devant être traitée, et à obtenir une table de consultation de mappage d'échelle de gris au moyen d'un calcul ; étape 2, sur la base de la table de consultation de mappage d'échelle de gris, à effectuer une transformation d'échelle de gris sur l'image devant être traitée dans des conditions de consultation de table parallèle de manière à achever l'amélioration du contraste. La présente invention améliore le contraste d'image, améliore l'efficacité d'utilisation des données associée, réduit l'interaction de données entre un composant opérationnel et une mémoire périphérique, et fait baisser la pression de la bande passante d'accès à la mémoire.
PCT/CN2017/070672 2017-01-09 2017-01-09 Procédé et appareil d'amélioration de contraste d'image vidéo parallèle Ceased WO2018126486A1 (fr)

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
CN112887512A (zh) * 2021-01-26 2021-06-01 长威信息科技发展股份有限公司 一种视频流高分可视化系统
CN114038197A (zh) * 2021-11-24 2022-02-11 浙江大华技术股份有限公司 场景状态的确定方法、装置、存储介质及电子装置
CN114913063A (zh) * 2021-02-10 2022-08-16 京东方科技集团股份有限公司 一种图像处理方法和装置
CN114999090A (zh) * 2022-05-25 2022-09-02 佛山市顺德区智安通电子有限公司 基于ai视频图像分析的智能安全生产监测预警系统

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CN104794726A (zh) * 2015-05-04 2015-07-22 清华大学深圳研究生院 一种水下图像并行分割方法及装置

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CN101090449A (zh) * 2007-06-19 2007-12-19 华为技术有限公司 色彩空间转换方法及其装置
CN101179650A (zh) * 2007-11-23 2008-05-14 西安交通大学 一种视频图像对比度增强方法及装置
CN102456224A (zh) * 2010-10-19 2012-05-16 高森 基于fpga实时数字图像增强方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112887512A (zh) * 2021-01-26 2021-06-01 长威信息科技发展股份有限公司 一种视频流高分可视化系统
CN114913063A (zh) * 2021-02-10 2022-08-16 京东方科技集团股份有限公司 一种图像处理方法和装置
CN114038197A (zh) * 2021-11-24 2022-02-11 浙江大华技术股份有限公司 场景状态的确定方法、装置、存储介质及电子装置
CN114999090A (zh) * 2022-05-25 2022-09-02 佛山市顺德区智安通电子有限公司 基于ai视频图像分析的智能安全生产监测预警系统
CN114999090B (zh) * 2022-05-25 2023-02-10 佛山市顺德区智安通电子有限公司 基于ai视频图像分析的智能安全生产监测预警系统

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