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WO2018192681A1 - Procédé de fabrication d'un agencement de photodétecteurs organiques - Google Patents

Procédé de fabrication d'un agencement de photodétecteurs organiques Download PDF

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Publication number
WO2018192681A1
WO2018192681A1 PCT/EP2018/000213 EP2018000213W WO2018192681A1 WO 2018192681 A1 WO2018192681 A1 WO 2018192681A1 EP 2018000213 W EP2018000213 W EP 2018000213W WO 2018192681 A1 WO2018192681 A1 WO 2018192681A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel
backplane
layer
photo detector
opd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2018/000213
Other languages
English (en)
Inventor
Stefan Ruckmich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PLASTIC LOGIC GmbH
Original Assignee
PLASTIC LOGIC GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PLASTIC LOGIC GmbH filed Critical PLASTIC LOGIC GmbH
Publication of WO2018192681A1 publication Critical patent/WO2018192681A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K39/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group H10K30/00
    • H10K39/30—Devices controlled by radiation
    • H10K39/32—Organic image sensors

Definitions

  • the invention relates to a method for manufacturing an organic photo detector arrangement (OPDA) comprising an organic photo detector (OPD) arranged on a backplane driving the OPD.
  • OPD organic photo detector
  • the backplane consists of an array of pixels forming an active matrix. Each pixel is composed by a storage capacitor and at least one field-effect transistor FET, which can be formed indistinctly by organic or inorganic semiconductor and dielectric materials.
  • FET-based active-matrix backplane can be processed on a flexible substrate.
  • the OPD 1 is comprising an electron injection layer (EIL) 2, an organic semiconductor (OSC) 3 and a hole injection layer (HIL) 4.
  • EIL electron injection layer
  • OSC organic semiconductor
  • HIL hole injection layer
  • the OPD 1 is exposed to electromagnetic radiation 5, which can be of visible, infrared or x-ray nature.
  • electromagnetic radiation 5 can be of visible, infrared or x-ray nature.
  • a scintillator 6 can convert the radiation 5 into photon radiation. If the radiation already comprises a photon radiation like visible or infrared light the scintillator 6 may be omitted.
  • the photons impact on the OPD 1 and generate an electric charge by the photoelectric effect within the OPD 1.
  • the electric charge is stored in the pixel capacitor and is measured by means of the FET.
  • At least the OSC 3 layer of the OPD 1 is deposited on top of the backplane 7 preferably by solution processing (i.e., deposition steps from the liquid phase) on top of a flexible backplane 7. This completes the OPDA.
  • a backplane 7 is also used in an electrophoretic display (EPD) 8 as shown in Fig. 2.
  • Fig. 3 shows particular steps for establishing an electrical contact between the top-pixel and drain electrodes of each single pixel of such a backplane 7.
  • a first metal layer 9 is arranged on a substrate 10.
  • the first metal layer 9 serves as a connection to the drain electrode of the field effect transistor (not shown) which is arranged within a pixel of the EPD 8.
  • a dielectric stack 11 is deposited onto the first metal layer 9.
  • Fig. 3 b depicts the opening of a via 12 into the
  • the via 12 is made e.g. by a laser ablation.
  • the laser beam deepens the via 12 down to the surface of the substrate 10.
  • a metal ring 13 of melted metal of the first metal layer 9 is generated at the bottom edge between the via 12 and the substrate 10.
  • laser debris 14 can be back scattered during the laser ablation process onto the upper surface (i.e., via upper edge) of the dielectric stack 11.
  • a first top-pixel metal layer 15 is deposited onto the whole upper surface of the arrangement of Fig. 3 b) .
  • the first top-pixel metal layer 15 is structured within a region 16 surrounding the via 12 by removing the material of the first top-pixel metal layer 15 in a stripe 17 (top-pixel isolation) bordering the region 16 to generate a top pixel electrode 18 as shown in Fig. 3 d) .
  • the top-pixel is the top electrode of a pixel capacitor, whose charge is controlled by FE . Both the pixel capacitor and the FET are the main electric components of a single pixel in the backplane 7.
  • an EPD 8 is completed by laminating an electrophoretic frontplane onto the upper surface of the arrangement of Fig. 1 d) by means of an optical clear adhesive (OCA) 23.
  • OCA optical clear adhesive
  • the backplane 7 is used to drive the electrophoretic frontplane 19 to form a flexible electrophoretic display (EPD) 8.
  • the metal ring 13 and the laser debris 14 could be avoided by using a reactive ion etching or the like instead of laser ablation to form the vias, which is selective to the first metal layer 9 but the topography of the vias will still remain .
  • the invention uses the backplane 7 as known from an EPD 8 for manufacturing an OPDA. Both the capacitor and the FET are arranged in each pixel of the backplane, as described above.
  • the backplane would be used for applying an OPD instead of the electrophoretic frontplane 19, the laser debris 14, the topography of the via 12 and the metal ring 13 would cause problems.
  • the OPD processing if at least the OSC layer 3 is deposited from a solution, it can flow around these
  • Fig. 4 graphically in Fig. 4 showing uncovered areas 22.
  • the conseguence is electrical short circuits between the EIL and HIL of the OPD, as described below.
  • a thin EIL layer 2 deposited (e.g., by physical deposition, sputtering or by a similar method) on top of the backplane covering the whole surface of the backplane.
  • all "topography"-relevant features like via 12, the metal ring 13 and the laser debris 14 are covered by the EIL layer 2.
  • the deposition the OSC layer 3 by deposition process from a solution i.e., by printing, spin coating, slot-die coating or similar
  • OPD organic photo diode
  • the via 12 is filled with material thereby covering the topography created by the via itself, the metal ring 13 and the laser debris 14. Thereby a surface with no irregular topography is created in the region 16 of the top pixel electrode 18 which is conductive and electrical connected to the first metal layer 9.
  • a via plug 24 made of an electrically isolating material covering the topography of laser debris 14 and the metal ring 13 at the via bottom is deposited after the deposition of the first top-pixel metallization layer 15. After a second top pixel metallization 25 and the top pixel isolation 17 step, a surface with no irregular topography can be obtained.
  • the via plug 24 itself is fully encapsulated by the first and the second top pixel metallisation 15 and 24.
  • the wet deposition of the OSC layer 3 i.e., by printing, spin coating, slot-die coating or similar
  • the wet deposition of the OSC layer 3 can now be done without exposing contact points between EIL layer 2 and the HIL layer 4 .
  • a second embodiment of this invention is that since the full region of the top-pixel electrode 16 is metallized by the second top-pixel metallization 25, the so called "fill factor" (i.e., the effective contact area for charge transfer between the backplane's top-pixel electrode and OPD) is maximized on each single backplane pixel, thus improving device performance.
  • the so called "fill factor" i.e., the effective contact area for charge transfer between the backplane's top-pixel electrode and OPD
  • OPD organic photo detector
  • EIL electron injection layer
  • HIL hole injection layer
  • OCA optical clear adhesive

Landscapes

  • Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un agencement de photodétecteurs organiques (OPDA) comprenant un photodétecteur organique (OPD) agencé sur un plan arrière dont l'objectif est de produire un OPDA avec une procédure économique. Cela est résolu en utilisant un plan arrière tel qu'il est connu d'un afficheur électrophorétique (EPD) comprenant une première couche de métal (9), un empilement diélectrique (11), une interconnexion (12) pourvue d'un anneau de métal (13) au fond de l'interconnexion et de débris laser (14) sur le côté supérieur de l'empilement diélectrique et une première couche de métallisation (15) de pixels supérieurs ; en remplissant l'interconnexion du plan arrière de matériau recouvrant l'anneau de métal et les débris laser ; en créant une surface de contact sans topographie irrégulière dans une zone d'un contact de pixels supérieurs ; en rendant la surface conductrice ; et en connectant électriquement la surface conductrice à la première couche de métal.
PCT/EP2018/000213 2017-04-20 2018-04-20 Procédé de fabrication d'un agencement de photodétecteurs organiques Ceased WO2018192681A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP17167346 2017-04-20
EP17167346.0 2017-04-20

Publications (1)

Publication Number Publication Date
WO2018192681A1 true WO2018192681A1 (fr) 2018-10-25

Family

ID=58638683

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2018/000213 Ceased WO2018192681A1 (fr) 2017-04-20 2018-04-20 Procédé de fabrication d'un agencement de photodétecteurs organiques

Country Status (1)

Country Link
WO (1) WO2018192681A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040112637A1 (en) * 2002-12-12 2004-06-17 Samsung Electro-Mechanics Co., Ltd. Built-up printed circuit board with stacked via-holes and method for manufacturing the same
US20090159781A1 (en) * 2007-12-19 2009-06-25 Chabinyc Michael L Producing Layered Structures With Layers That Transport Charge Carriers
US20160242278A1 (en) * 2013-10-09 2016-08-18 Hitachi Chemical Company, Ltd. Multilayer wiring board and method for manufacturing same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040112637A1 (en) * 2002-12-12 2004-06-17 Samsung Electro-Mechanics Co., Ltd. Built-up printed circuit board with stacked via-holes and method for manufacturing the same
US20090159781A1 (en) * 2007-12-19 2009-06-25 Chabinyc Michael L Producing Layered Structures With Layers That Transport Charge Carriers
US20160242278A1 (en) * 2013-10-09 2016-08-18 Hitachi Chemical Company, Ltd. Multilayer wiring board and method for manufacturing same

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