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WO2018190632A1 - Module de capture de dispositif et appareil d'essai de dispositif à semi-conducteur le comprenant - Google Patents

Module de capture de dispositif et appareil d'essai de dispositif à semi-conducteur le comprenant Download PDF

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Publication number
WO2018190632A1
WO2018190632A1 PCT/KR2018/004242 KR2018004242W WO2018190632A1 WO 2018190632 A1 WO2018190632 A1 WO 2018190632A1 KR 2018004242 W KR2018004242 W KR 2018004242W WO 2018190632 A1 WO2018190632 A1 WO 2018190632A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor device
test socket
semiconductor
vacuum
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2018/004242
Other languages
English (en)
Korean (ko)
Inventor
정라파엘
유웅현
이국형
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INNOBIZ CO Ltd
Original Assignee
INNOBIZ CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INNOBIZ CO Ltd filed Critical INNOBIZ CO Ltd
Publication of WO2018190632A1 publication Critical patent/WO2018190632A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2893—Handling, conveying or loading, e.g. belts, boats, vacuum fingers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks

Definitions

  • terminals for external connection are formed on the bottom surface of the memory device and the LSI device.
  • connection terminals of the test socket are connected to external connection terminals formed on the bottom surface of the semiconductor device for electrical connection between the semiconductor device and the test socket.
  • the pickup unit closely contacts the semiconductor element to the test socket for stable connection between the connection terminals of the test socket and the terminals for external connection of the semiconductor element.
  • an element pickup module for picking up the semiconductor element from a shuttle loaded with the semiconductor elements to perform an electrical inspection of the semiconductor element, the semiconductor on the lower surface
  • An upper test socket having a plurality of first upper connection terminals vacuum-adsorbed and electrically connected to upper connection pads of the semiconductor element, and coupled to an upper portion of the upper test socket and vacuum-adsorbed the semiconductor element; It may include a controller for controlling the signal transmission between the upper test socket and the semiconductor device.
  • the controller may include a floating block coupled to an upper portion of the upper test socket, a semiconductor element positioned above the floating block, coupled to the floating block, and adsorbed to the upper test socket. It may include an air cylinder damper for reducing the impact on the semiconductor device when the lower test socket contacts.
  • FIG. 1 is a view for explaining a semiconductor device test apparatus according to an embodiment of the present invention.
  • Embodiments of the invention are described with reference to schematic illustrations of ideal embodiments of the invention. Accordingly, changes from the shapes of the illustrations, such as changes in manufacturing methods and / or tolerances, are those that can be expected sufficiently. Accordingly, embodiments of the invention are not to be described as limited to the particular shapes of the areas described as the illustrations, but include variations in the shapes, and the elements described in the figures are entirely schematic and their shapes Is not intended to describe the precise shape of the elements nor is it intended to limit the scope of the invention.
  • the semiconductor device test apparatus 400 picks up the semiconductor device from an interface unit 100 for electrically connecting a tester (not shown) and the semiconductor device, and a shuttle (not shown) in which the semiconductor devices are loaded. It may include a transfer press unit 300 for transferring to the interface unit 100.
  • the lower test socket 110 includes a plurality of lower connection terminals 112 (see FIG. 14) for electrically connecting to the semiconductor device picked up by the transfer press unit 300.
  • the lower test socket 110 may provide a test signal output from the tester to the semiconductor device, and may provide a signal output from the semiconductor device to the tester in response to the test signal.
  • the lower connection terminals 112 (see FIG. 10) formed on the upper surface of the lower test socket 110 may be connected to the lower connection pads 14 (see FIG. 10) formed on the lower surface of the semiconductor device.
  • the interface unit 100 may be provided with a plurality of the lower test socket 110, as shown in Figure 1, the lower test socket 110 is the transfer press unit
  • the semiconductor devices may be provided in a one-to-one correspondence with the semiconductor devices picked up at 300.
  • the lower test sockets 110 are coupled to the socket guide 120, and the socket guide 120 guides the positions of the lower test sockets 110.
  • the device pick-up module 200 may suck the semiconductor device using a vacuum to transfer the semiconductor device, and may be electrically connected to the semiconductor device and the lower test socket 110 (see FIG. 1).
  • the contact press head 301 is provided with eight element pickup module 200, but the number of the element pickup module 200 is not limited thereto.
  • the device pick-up module 200 may include an upper test socket 210 and an upper test socket 210 in which the semiconductor device may be vacuum-adsorbed on a lower surface thereof and electrically connected to the semiconductor device and the lower test socket 110.
  • the controller 220 may control a signal transmission between the 210 and the semiconductor device and a signal transmission between the upper test socket 210 and the lower test socket 110.
  • the upper test socket 210 provides the test signal output from the tester to the semiconductor device and transmits the signal output from the semiconductor device to the tester in response to the test signal.
  • the upper test socket 210 may include a plurality of first upper connection terminals 212 that may be electrically connected to upper connection pads 12 (see FIG. 14) formed on an upper surface of the semiconductor device, and the lower test socket ( A plurality of second upper connection terminals 214 for connecting to 110 may be provided.
  • the lower test socket 110 converts an output signal directly received from the semiconductor device 10 through the first lower connection terminals 112 and an output signal received through the upper test socket 210 to the tester. send.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

L'invention concerne un module de capture de dispositif qui effectue une capture de dispositifs à semi-conducteur à partir d'une navette dans laquelle les dispositifs à semi-conducteur sont chargés afin d'effectuer une inspection électrique sur les dispositifs à semi-conducteur dans un gestionnaire d'essai. Le module de capture de dispositif peut comprendre : une prise d'essai supérieure comprenant une pluralité de premières bornes de connexion supérieures qui comportent une surface inférieure vers laquelle les dispositifs à semi-conducteur sont aspirés sous vide, et qui sont électriquement connectées à des plages de connexion supérieures des dispositifs à semi-conducteur ; et une unité de commande qui est couplée à la partie supérieure de la prise d'essai supérieure, aspire sous vide les dispositifs à semi-conducteur, et commande la transmission de signal entre la prise d'essai supérieure et les dispositifs à semi-conducteur. Ainsi, le module de capture de dispositif comprend les premières bornes de connexion supérieures pouvant être connectées aux dispositifs à semi-conducteur, et peut ainsi effectuer une capture des dispositifs à semi-conducteur par aspiration sous vide des dispositifs à semi-conducteur, et peut également fournir un signal d'inspection aux dispositifs à semi-conducteur ayant subi une capture.
PCT/KR2018/004242 2017-04-13 2018-04-11 Module de capture de dispositif et appareil d'essai de dispositif à semi-conducteur le comprenant Ceased WO2018190632A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2017-0048058 2017-04-13
KR1020170048058A KR101969214B1 (ko) 2017-04-13 2017-04-13 소자 픽업 모듈 및 이를 구비하는 반도체 소자 테스트 장치

Publications (1)

Publication Number Publication Date
WO2018190632A1 true WO2018190632A1 (fr) 2018-10-18

Family

ID=63792801

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2018/004242 Ceased WO2018190632A1 (fr) 2017-04-13 2018-04-11 Module de capture de dispositif et appareil d'essai de dispositif à semi-conducteur le comprenant

Country Status (2)

Country Link
KR (1) KR101969214B1 (fr)
WO (1) WO2018190632A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI794892B (zh) * 2020-07-16 2023-03-01 南韓商Ｉｓｃ股份有限公司 檢查用連接裝置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102643958B1 (ko) * 2021-10-07 2024-03-07 주식회사 티에프이 반도체 패키지 픽커 어셈블리 및 그에 사용되는 흡착 모듈
KR102681162B1 (ko) * 2022-05-30 2024-07-03 주식회사 티에프이 반도체 패키지 테스트용 흡착형 소켓 모듈
KR102651533B1 (ko) * 2022-06-07 2024-03-26 주식회사 티에프이 반도체 패키지 테스트용 흡착형 소켓 모듈, 반도체 패키지 테스트용 흡착 디바이스, 및 반도체 패키지 테스트용 흡착패드

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100840209B1 (ko) * 2006-08-16 2008-06-23 미래산업 주식회사 반도체 소자 테스트 핸들러
JP2012078310A (ja) * 2010-10-06 2012-04-19 Shinano Electronics:Kk Ｉｃハンドラ及びｉｃ検査装置
KR20120110612A (ko) * 2011-03-30 2012-10-10 삼성전자주식회사 핸들러 트레이 및 이를 포함하는 테스트 시스템
KR20130099826A (ko) * 2012-02-29 2013-09-06 (주)제이티 소자검사장치
KR101599049B1 (ko) * 2014-11-28 2016-03-04 주식회사 세미코어 반도체 칩 검사장치

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100633451B1 (ko) * 2004-10-01 2006-10-16 주식회사 유니테스트 실장 테스트를 위한 테스트 픽스쳐 및 이를 포함하는반도체 소자 실장 테스터

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100840209B1 (ko) * 2006-08-16 2008-06-23 미래산업 주식회사 반도체 소자 테스트 핸들러
JP2012078310A (ja) * 2010-10-06 2012-04-19 Shinano Electronics:Kk Ｉｃハンドラ及びｉｃ検査装置
KR20120110612A (ko) * 2011-03-30 2012-10-10 삼성전자주식회사 핸들러 트레이 및 이를 포함하는 테스트 시스템
KR20130099826A (ko) * 2012-02-29 2013-09-06 (주)제이티 소자검사장치
KR101599049B1 (ko) * 2014-11-28 2016-03-04 주식회사 세미코어 반도체 칩 검사장치

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI794892B (zh) * 2020-07-16 2023-03-01 南韓商Ｉｓｃ股份有限公司 檢查用連接裝置

Also Published As

Publication number Publication date
KR101969214B1 (ko) 2019-04-17
KR20180115564A (ko) 2018-10-23

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