WO2018003036A1 - Method for manufacturing solar cells and solar cell manufacturing device - Google Patents

Abstract

A step for forming an n-type dispersion layer includes: a first step S1 in which a dispersion source containing an n-type impurity is formed on a p-type crystalline silicone substrate; a second step S2 for heating the p-type crystalline silicon substrate on which the dispersion source is formed and dispersing the n-type impurity on the surface of the p-type crystalline silicon substrate; and a third step S3 for reducing the temperature of the crystalline silicon substrate on which the dispersion source is formed and heating the crystalline silicon substrate for a fixed amount of time. The first step S1 through the third step S3 are carried out inside the same processing device. As a result of the abovementioned configuration, the lifetime of silicon substrates can be increased and high-efficiency solar cells can be obtained at low cost without increasing the number of steps or amount of equipment.

Description

Solar cell manufacturing method and solar cell manufacturing apparatus

The present invention relates to a solar cell manufacturing method and a solar cell manufacturing apparatus including a step of gettering a metal impurity present in a substrate.

When manufacturing consumer-use solar cells, it is important to improve cost performance through both high output and low cost. A general method for manufacturing a solar cell will be described below.

First, a p-type silicon substrate made of single crystal silicon is prepared. Single crystal silicon is obtained by slicing a single crystal silicon ingot produced by a crystal growth method such as CZ method (Czochralski method) to a thickness of about 200 μm by a multi-wire method.

On the other hand, damage on the surface of the p-type silicon substrate is removed with an alkaline aqueous solution, and a fine concavo-convex structure called a texture shape is formed in a height range of about 1 μm to 10 μm.

Subsequently, the p-type silicon substrate is put into a thermal diffusion furnace, a phosphorous glass layer is formed on the surface of the substrate by thermal decomposition of phosphorous oxychloride (POCl ₃ ), and further heat treatment is performed, so that phosphorus (P ) Is diffused into the surface layer of the substrate to form an n-type diffusion layer. After forming the n-type diffusion layer, the phosphorus glass layer is dissolved and removed with a hydrofluoric acid aqueous solution or the like.

After removing the phosphor glass layer, an antireflection film made of a silicon nitride (SiN) film is formed on the light-receiving surface by a film forming method such as a plasma CVD (Chemical Vapor Deposition) method. Furthermore, an electrode is formed to complete the solar battery cell. A light receiving surface electrode mainly composed of silver is formed on the light receiving surface side, and a back surface aluminum electrode mainly composed of aluminum and a back surface silver electrode mainly composed of silver are formed on the back surface side in appropriate patterns. Each electrode structure is formed by forming the appropriate pattern by a film forming method such as a screen printing method and then baking at a high temperature of about 800 ° C.

The p-type silicon substrate is a polycrystalline silicon substrate obtained by slicing a polycrystalline ingot produced by a crystal growth method including a casting method to a thickness of about 200 μm by the multi-wire method as described above. There is no problem.

Of the above processes, the thermal diffusion process has the greatest purpose of forming the n-type diffusion layer as described above. However, because of the gettering effect by heating in the temperature increasing process or the temperature decreasing process before and after the thermal diffusion process, The selection can have the effect of improving the lifetime that determines the semiconductor quality of the p-type silicon substrate.

Patent Document 1 discloses a technique of performing boron diffusion on the back surface of a p-type silicon substrate, then diffusing phosphorus on the surface, and then annealing, and a heat treatment technique for improving the lifetime of the p-type silicon substrate. It is shown.

Japanese Patent No. 4232597

However, according to the above technique, the gettering action may not be sufficient. In addition, the number of processes increases and becomes a barrier to cost reduction, and it cannot be said that it has a sufficient effect on cost performance improvement of solar cell manufacturing.

The present invention has been made in view of the above, and an object of the present invention is to increase the lifetime of a silicon substrate without increasing the number of processes or facilities and to obtain a highly efficient solar cell at a low cost.

The present invention is a solar cell manufacturing method including a step of diffusing an n-type impurity to form a pn junction on a p-type crystalline silicon substrate. The step of forming an n-type diffusion layer includes a first step of forming a diffusion source containing an n-type impurity on a p-type crystalline silicon substrate, and a p-type crystalline silicon on which the diffusion source is formed. A second step of raising the temperature of the substrate and diffusing n-type impurities on the surface of the p-type crystalline silicon substrate; and a third step of lowering the temperature of the crystalline silicon substrate in which the n-type impurities are diffused and heating for a predetermined time. These steps are included. The first to third steps are performed in the same processing apparatus.

According to the above configuration, it is possible to increase the lifetime of the silicon substrate without increasing the number of processes or facilities and to obtain a highly efficient solar cell at a low cost.

Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 Process sectional drawing which shows the manufacturing method of the solar cell of Embodiment 1 The figure which shows the temperature profile in the heat processing process for n type diffused layer formation in the manufacturing method of the solar cell of Embodiment 1. FIG. The figure which shows the formation apparatus of the n type diffused layer used with the manufacturing method of the solar cell of Embodiment 1. FIG. The figure which shows the relationship between _3rd temperature T3 and the open circuit voltage Voc. The figure which shows the relationship between _3rd temperature T3 and the open circuit voltage Voc. The figure which shows the relationship between oxygen flow rate and the open circuit voltage Voc The figure which shows the relationship between oxygen flow rate and the open circuit voltage Voc

Hereinafter, a method for manufacturing a solar cell according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the present invention is not limited to the embodiments and can be appropriately changed without departing from the gist of the present invention. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding. The same applies between the drawings. Even a cross-sectional view may not be hatched for easy viewing of the drawing. Further, even a plan view may be hatched to make the drawing easy to see.

Embodiment 1 FIG.
1 to 7 are process cross-sectional views illustrating the method for manufacturing the solar cell of the first embodiment. FIG. 8 is a diagram showing a temperature profile in a heat treatment process for forming an n-type diffusion layer, and FIG. 9 is a diagram showing an apparatus for forming an n-type diffusion layer used in the solar cell manufacturing method of the first embodiment. In the method for manufacturing the solar cell of the first embodiment, the step of forming the pn junction is a phosphor glass that is a product containing an n-type impurity on a p-type silicon substrate 1 that is a p-type crystalline silicon substrate. The first step S1 for contacting the layer 4, the second step S2 for raising the temperature of the p-type silicon substrate in contact with the phosphorus glass layer 4 and diffusing phosphorus on the surface of the p-type silicon substrate 1, and the diffusion of phosphorus And a third step S3 in which the p-type silicon substrate 1 is cooled and heated for a predetermined time. The first step S1 to the third step S3 are performed in the same processing apparatus.

Hereinafter, a method for manufacturing the solar cell according to Embodiment 1 will be described with reference to the drawings. First, as shown in FIG. 1, a p-type silicon substrate 1 containing a group III element including boron (B) and gallium (Ga) as a dopant is prepared.

For the p-type silicon substrate 1, single crystal silicon formed by the CZ method or p-type polycrystalline silicon formed by the cast method is desirable from the viewpoint of the distribution amount or cost. However, crystalline silicon by other manufacturing methods such as p-type single crystal silicon formed by FZ (Float Zone Technology) method may be used.

The specific resistance of the p-type silicon substrate 1 is preferably from 0.1 Ωcm to 10 Ωcm, and more preferably from 0.5 Ωcm to 3 Ωcm. If the specific resistance is controlled within the above range, both the improvement of the lifetime and the potential gap of the pn junction can be realized at a high level, so that both the short-circuit current (Jsc) and the open circuit voltage (Voc) are at a high level. And thus the performance of the solar cell can be improved.

Next, the p-type silicon substrate 1 is etched with an aqueous solution of sodium hydroxide or potassium hydroxide to remove the damaged layer on the surface of the substrate and to form a fine uneven structure called texture 2 at least on the light receiving surface 1A side. To do. Although the detailed shape is omitted in the drawing, the texture 2 is shown by enlarging the region surrounded by a circle only in FIG. In forming the texture 2, the aqueous solution of sodium hydroxide or potassium hydroxide is often treated with IPA (Isopropyl Alcohol: isopropyl alcohol) or an additive sold for promoting the formation of irregularities.

The size of the fine concavo-convex structure is preferably in the range of about 0.5 μm to 10 μm, more preferably in the range of 1 μm to 5 μm. When the texture 2 is controlled to be in the above range, it is easy to stabilize the electrode formation described later or the connection with silicon, which can contribute to improving the quality of the solar cell.

The method for manufacturing the solar cell of the first embodiment is mainly related to the heat treatment including the diffusion layer formation and the annealing accompanying the formation of the diffusion layer, and the steps other than the formation of the diffusion layer are not necessarily limited. is not. Therefore, the configuration, steps, and order up to here are merely examples, and the contents other than those described are not excluded.

After the formation of the texture 2, as shown in FIG. 2, a phosphorus glass layer 4 as a diffusion source is formed, and as shown in FIG. 3, an n-type diffusion layer 3 is formed through a phosphorus diffusion step from the phosphorus glass layer 4. At the same time, gettering is performed by annealing.

As described above, the step of forming the n-type diffusion layer 3 and the gettering are performed in the quartz tube 10 according to the temperature profile shown in FIG. The step of forming the n-type diffusion layer 3 is a first step S1 for forming the phosphorus glass layer 4 serving as a diffusion source. The n-type diffusion is performed by allowing the phosphorous glass layer 4 to penetrate into the silicon at a higher temperature than the first step S1. Including a second step S2, which is a drive-in stage for forming the layer 3, and a third step S3, which is an annealing stage in which heat treatment is performed at a lower temperature than any of the first step S1 and the second step S2. Is a feature.

In FIG. 8, the first step S1 for forming the phosphorous glass layer 4 serving as a diffusion source is t ₁ when the p-type silicon substrate 1 is put into the quartz tube 10 having the initial temperature T _{0 and} the temperature rise is started. The timing for reaching the first temperature T ₁ for execution is t ₂ , the timing for starting the temperature rise after maintaining the first temperature T ₁ is t ₃ , and the second step S 2 which is a drive-in stage the second timing to reach the temperature T ₂ is a diffusion temperature for carrying out the t _4, was maintained in the second temperature T ₂ is the diffusion temperature, cooling from the second temperature T ₂ is the diffusion temperature t ₅ the time to start, after maintaining the timing of falling to a third temperature T ₃ is a annealing temperature for the heat treatment is performed at a low temperature t _6, the third temperature T ₃ is the annealing temperature, the annealing temperature Thailand starting the temperature increase from the third temperature T ₃ T ₇ the ring, quartz tube 10 represents a timing of reaching the initial temperature T ₀ at t _8. In the figure, the minimum value of the diffusion temperature of phosphorus, that is, the minimum value of the temperature at which phosphorus can diffuse is expressed as _TDmin. The minimum value of the temperature at which low-temperature annealing, that is, gettering functions, is set to T _Gmin. It expresses.

Actually, the minimum value T _Dmin. In the above, diffusion has occurred, and a region _SD indicated by hatching in FIG. 8 is a diffusion region. On the other hand, the temperature at which gettering functions, that is, the minimum value T _Gmin. In the above, gettering is functioning, the area S _G indicated by hatching in FIG. 8, a gettering region. The amount of heat necessary for diffusion and the amount of heat necessary for gettering are measured in advance according to the type of impurities and the formation conditions of the p-type silicon substrate 1 to be used.

In FIG. 8, the temperature profile in the quartz tube 10 is controlled so that the area of the region _SD , which is a diffusion region, falls within a range that satisfies a value determined in advance by experiment. Also to be in the range satisfying a predetermined value by the same experiment also the area of the region S _G which is a gettering region, to control the temperature profile in the quartz tube 10. The temperature profile in the quartz tube 10 satisfies the above-mentioned conditions and is a minimum time, that is, from timing t _{1 at} which the p-type silicon substrate 1 is put in to timing t _{8 at} which the p-type silicon substrate 1 is taken out. The time is determined to be the minimum, and the temperature control unit 41 controls the heater 40. By performing the heat treatment steps from the first step S1 to the third step S3 by the temperature control unit 41, a high-quality and highly reliable solar cell having a pn junction is formed in a short time.

FIG. 9 is a main-portion cross-sectional view schematically showing an impurity diffusion device for forming an n-type diffusion layer in the method for manufacturing the solar cell of the first embodiment. The impurity diffusing device 100 according to the first embodiment includes a quartz tube 10, a boat 20 that transports the p-type silicon substrate 1 into the quartz tube 10, a diffusion gas supply unit 30 that supplies gas into the quartz tube 10, A heater 40 that is a heating source and a temperature control unit 41 that controls the temperature of the heater 40 are provided. A diffusion gas containing impurities is supplied into the quartz tube 10 from a diffusion gas supply port 31 provided at one end of the quartz tube 10. The temperature control unit 41 controls the heater 40, satisfies the above conditions, and takes the minimum time, that is, the timing t 1 for taking out the p-type silicon substrate 1 from the timing t ₁ when the p-type silicon substrate 1 is loaded. as the time until ₈ becomes minimum, to implement the third process S3 from the first step S1.

The quartz tube 10 of the impurity diffusion device 100 of the first embodiment is formed in a cylindrical shape. A cylindrical heater 40 for uniformly heating the quartz tube 10 is disposed on the outer periphery of the quartz tube 10. The quartz tube 10 and the heater 40 constitute a horizontal furnace, and a p-type silicon substrate 1 to be subjected to impurity diffusion is carried in and set along the tube axis. At the other end of the quartz tube 10, an opening 51a for carrying in and out of the p-type silicon substrate 1 as the object to be processed and a quartz door 51b for closing the opening 51a are disposed.

The diffusion gas supply unit 30 includes a diffusion gas supply port 31, a carrier gas introduction pipe 32 a that supplies a carrier gas into the quartz tube 10, a source gas supply pipe 32 b that serves as a diffusion source, and a diffusion gas introduction pipe 33. And a gas inlet 34. The carrier gas introduction pipe 32 a and the source gas supply pipe 32 b merge and are connected to the diffusion gas supply port 31 via the diffusion gas introduction pipe 33. The source gas supply pipe 32b includes a container (not shown) that houses the liquid diffusion source and a bubbling container that bubbles the liquid diffusion source, and supplies the source gas containing saturated vapor and nitrogen gas of the liquid diffusion source by bubbling. . The source gas supplied from the source gas supply pipe 32b merges with the carrier gas introduced from the carrier gas introduction pipe 32a to become a diffusion gas. The diffusion gas is introduced into the quartz tube 10 from the diffusion gas supply port 31 through the diffusion gas introduction pipe 33. The diffusion gas introduced into the quartz tube 10 is supplied to the surface of the p-type silicon substrate 1 from the plurality of gas supply holes 35 through the gas introduction part 34.

As the liquid diffusion source, phosphorus oxychloride POCl ₃ is used, but phosphorus tribromide or boron tribromide may be used. As the carrier gas, nitrogen gas mixed with a small amount of oxygen gas is used.

The boat 20 for transporting the p-type silicon substrate 1 is arranged in a row at a regular interval in the direction of the central axis of the quartz tube 10 on a quartz boat 10 on a parent boat 21 that forms a substantially rectangular tray. 4 are arranged side by side and placed side by side. The child boat 22 is formed by combining quartz rods and welding them to form a substantially rectangular parallelepiped bowl shape or frame shape. The parent boat 21 is also formed by combining quartz rods and welding them to form a substantially rectangular ladder. Therefore, the diffusion gas can freely flow in the child boat 22.

A plurality of p-type silicon substrates 1 are vertically placed at equal intervals in the sub-boat 22 with their plate surfaces parallel to the central axis of the quartz tube 10 and aligned at equal intervals in a direction perpendicular to the central axis.

The child boat 22 on which the p-type silicon substrate 1 is placed is placed on the parent boat 21 and is transferred into the quartz tube 10 heated by the heater 40 so as to have a desired temperature profile. Yes.

In order to increase the efficiency of solar cells, in addition to improving the lifetime, it is equally important to reduce the concentration and expand the depth of the n-type diffusion layer 3. The phosphorus concentration in silicon is maximum at the outermost surface portion in contact with the phosphor glass layer 4. By suppressing the outermost surface concentration, the semiconductor quality of the entire n-type diffusion layer 3, that is, the lifetime of the n-type diffusion layer. Can be improved. Thereby, the solar cell efficiency can be improved mainly by improving the open circuit voltage (Voc).

In order to improve the solar cell efficiency, it is effective to first form the phosphorus glass layer 4 at a low temperature in the diffusion step to suppress the total amount of phosphorus in the phosphorus glass layer 4. On the other hand, a decrease in phosphorus concentration in the n-type diffusion layer 3 leads to a decrease in conductivity per unit volume, so that the depth of the n-type diffusion layer 3 needs to be increased for compensation.

In order to increase the depth of the diffusion layer, there are roughly two methods: a method of increasing the processing temperature or a method of extending the processing time. However, the latter leads to a decrease in productivity. It is desirable to respond by raising.

After the above treatment, gettering is further strengthened by annealing to improve the lifetime.

In the above process, each of the three heating conditions has been described as having a role. However, the above description describes the relative specific gravity, and the formation of the n-type diffusion layer 3 and the progress of gettering are described in each heating. Are not necessarily formed in a single step in the above process. Therefore, it is important to set each condition while considering each interaction.

As a result of examining each condition in consideration of the above, the present inventors have found that the following conditions are effective. The following conditions are conditions that can achieve both high efficiency of solar cells and high productivity.
First step S1: First temperature T ₁ : From 750 ° C. to 800 ° C., Holding time: 10 minutes to 20 minutes Second step S2: Second temperature T ₂ : From 850 ° C. to 900 ° C., Holding time: from 5 minutes 10 min third step S3: third temperature T _3: 600 ° C. from 700 ° C., retention time: 30 minutes to 60 minutes,
By sequentially performing the first step S1 to the third step S3 in the same furnace, that is, the quartz tube 10, it is possible to improve the lifetime, that is, improve the efficiency of the solar cell, and achieve both high productivity and low cost. realizable.

More preferably, the third step S3 is performed at a temperature of 650 ° C. to 680 ° C. and a holding time of 30 minutes to 45 minutes. In addition, the charging temperature T ₀ to the quartz tube 10 is desirably 700 ° C. to 750 ° C.

In the first step S1, a diffusion gas is supplied at the first temperature T _1, that is, from 750 ° C. to 800 ° C., and the phosphor glass layer 4 is formed. By supplying the source gas at the first temperature T ₁ , a phosphorus glass layer having an appropriate concentration can be formed. After the holding time of 10 to 20 minutes, the supply of the diffusion gas is stopped, and the process proceeds to the second step S2.

In the second step S2, the process temperature is raised from the second temperature T _2, i.e. 850 ° C. to 900 ° C., held holding time of about 5 minutes to 10 minutes. In the second step S2, no diffusion gas is supplied. By increasing the processing temperature from 850 ° C. to 900 ° C. without supplying a diffusion gas, phosphorus diffuses into the p-type silicon substrate 1 only from the phosphor glass layer 4 formed in the first step S1. By doing so, a diffusion layer having an appropriate phosphorus concentration can be formed.

In the third step S3, the processing temperature is lowered from the third temperature T _3, that is, from 600 ° C. to 675 ° C. and held for 30 to 60 minutes, and the lifetime is improved by ring gettering. Note that the rate of phosphorus diffusion in the p-type silicon substrate 1 greatly depends on the processing temperature. When the processing temperature becomes 700 ° C. or lower, phosphorus diffusion in the p-type silicon substrate 1 hardly occurs. Therefore, by setting the third temperature to 700 ° C. or lower, it is possible to perform gettering in a state where the phosphorus concentration in the p-type silicon substrate 1 is appropriately maintained. Gettering reduces the amount of metal impurities in the p-type silicon substrate 1 and improves the lifetime.

10 and 11 are diagrams showing the relationship between the third temperature T ₃ that is the gettering temperature and the open circuit voltage Voc. As is apparent from FIGS. 10 and 11, the effect of setting the third temperature T ₃ from 600 ° C. to 675 ° C. is shown. When the lifetime is improved, the open circuit voltage Voc is improved. Therefore, the optimum annealing temperature is obtained by evaluating the relationship between the third temperature T ₃ and ΔVoc, which is the difference between the conventional conditions Voc. As shown in FIGS. 10 and 11, Voc is improved from 1.8 mV to 2.9 mV compared to the conventional conditions by setting the third temperature T ₃ as the gettering temperature in the range of 600 ° C. to 675 ° C. There is an effect to. Furthermore, by setting the third temperature T ₃ , which is the gettering temperature, in the range of 625 ° C. to 650 ° C., there is an effect of improving Voc from 2.8 mV to 2.9 mV, which is particularly desirable. .

12 and 13 are diagrams showing the relationship between the oxygen flow rate at the time of gettering and the open circuit voltage Voc. As is apparent from FIGS. 12 and 13, oxygen without flowing, in passing only nitrogen i.e. _{N 2: O 2 = 1:} 0 in which as compared with the case, the nitrogen and oxygen 1: 1 flow ratio When N ₂ : O ₂ = 1: 1, ΔVoc was improved from 1.0 mV to 3.1 mV. In other words, during gettering, nitrogen and oxygen are flowed at a flow rate ratio of 1: 1, thereby improving the gettering effect by oxidizing the substrate surface with oxygen.

After completion of the third step S3, the n-type diffusion layer 3 is formed on the surface of the p-type silicon substrate 1 as shown in FIG. 3, and the phosphorus glass layer 4 remains on the surface. After completion of the third step S3, the temperature of the quartz tube 10 is increased from 700 ° C., which is the charging temperature T ₀ , to 750 ° C. while taking out the boat 20. This is because 700 ° C. to 750 ° C. is effective in improving productivity as the temperature T ₀ of the boat 20 to the quartz tube 10. If the temperature is lower than 700 ° C., it takes time to raise the temperature to the temperature at which the diffusion source is generated in the first step S1 after the boat 20 is put into the quartz tube 10, and the processing time becomes longer and the productivity deteriorates. To do. On the other hand, if the temperature is higher than the processing temperature of the first step S1, the temperature fluctuation increases, and it takes time to stabilize at the processing temperature of the first step S1, and the processing time becomes longer and the productivity is increased. Getting worse. Therefore by a 750 ° C. The input temperature T ₀ of the boat 20 from 700 ° C. to a quartz tube 10, it is possible to temperature-stable in a short time.

After the formation of the n-type diffusion layer 3 as the second step S2 and the annealing process for gettering as the third step S3, the boat 20 is taken out of the quartz tube 10, and as shown in FIG. The phosphorus glass layer 4 on the p-type silicon substrate 1 on which the n-type diffusion layer 3 is formed is removed with an etching solution such as a hydrofluoric acid aqueous solution as shown in FIG.

After removing the phosphorus glass layer 4, as shown in FIG. 5, an antireflection film 5 made of a SiN film having a thickness of 70 nm to 90 nm is formed by plasma CVD. The effects of both the texture 2 and the antireflection film 5 described above effectively absorb incident light into the p-type silicon substrate 1.

As described above, the method for manufacturing the solar cell according to the first embodiment mainly relates to the heat treatment including the formation of the n-type diffusion layer 3 and the subsequent gettering by annealing, and other steps are not necessarily specified. It is not a thing. Accordingly, as described above, the description of the processes including the subsequent configuration, steps, and order is merely an example, and the contents other than the description are not excluded.

After the antireflection film 5 is formed, electrodes on the light receiving surface 1A side and the back surface 1B side are formed as shown in FIG. Aluminum paste 7a and silver paste 8a are printed on the back surface 1B side by screen printing and dried. Further, the silver paste 6a is similarly printed on the light receiving surface 1A side and dried.

After printing and drying, the silver paste 6a, the aluminum paste 7a and the silver paste 8a on the p-type silicon substrate 1 are baked at a peak temperature of 700 ° C. to 800 ° C. to form respective electrodes as shown in FIG. The silver paste 6a, the aluminum paste 7a, and the silver paste 8a become the light receiving surface side Ag electrode 6, the back surface aluminum electrode 7, and the back surface Ag electrode 8, respectively.

The back surface aluminum electrode 7 is partially alloyed with the silicon at the interface along with the firing, and a BSF (Back Surface Filled) layer 9 is formed along with the solidification again. Thereby, carrier recombination on the back surface side is suppressed, which contributes to higher efficiency of the solar cell. Further, the light-receiving surface side Ag electrode 6 and the back surface Ag electrode 8 which are silver electrodes on both sides partially react with silicon by firing, and are electrically connected and obtain physical adhesive strength.

Finally, the laser beam is irradiated so as to go around the edge of the substrate, and the electrical short circuit between the light receiving surface side and the back surface side is separated. The position of laser irradiation can be any of the light receiving surface side, the back surface side, and the side surface. An appropriate irradiation position may be selected in terms of performance including processing accuracy regarding irradiation or insulation performance after irradiation. The separation process can be performed by a technique of stacking a plurality of substrates and performing plasma etching on the side surfaces, for example, between the previous steps, for example, from the formation of the diffusion layer to the formation of the antireflection film. The solar battery cell P is manufactured by the above process.

As described above, according to the first embodiment, the annealing process for improving the diffusion layer formation and the lifetime of the silicon substrate can be continuously performed in the same furnace, that is, the same apparatus. Both low cost and high cost performance solar cells can be manufactured.

Further, after the completion of the third step S3, by introducing the fourth step S4 for raising the temperature of the quartz tube 10 from 700 ° C. to 750 ° C. while taking out the p-type silicon substrate 1, the quartz tube 10 is continuously formed. Can be used in the next lot processing. That is, when performing a plurality of lot processing by sequentially repeating the first step S1 to the third step S3, after the third step S3, prior to performing the first step S1 of the next lot, Step S4 is performed. By performing the fourth step S4, after the next lot of boats has been thrown in, the temperature is raised to the temperature at which the diffusion source is generated in the first step S1, and the time required to stabilize the temperature is greatly increased. It can be shortened. Therefore, the productivity is greatly improved, the temperature is stabilized in a short time, and the generation of the diffusion source and the stabilization of the diffusion can be achieved. Further, by maintaining the temperature of the quartz tube 10 at a certain temperature or higher, adhesion of precipitates or adhesion to the object to be processed due to re-evaporation of the precipitates can be reduced.

In Embodiment 1, an example using a p-type single crystal silicon substrate has been described, but it goes without saying that the present invention can also be applied to a p-type polycrystalline silicon substrate. Although it is also effective for an n-type single crystal silicon substrate or an n-type polycrystalline silicon substrate, it is p-type silicon that has a problem of reducing the lifetime due to metal impurities, and is particularly effective for gettering of p-type silicon. Needless to say.

In the first embodiment, in the step of forming the n-type diffusion layer by phosphorus diffusion, the gettering process can be performed as it is in the same furnace, so that the processing time can be significantly shortened. Although the processing conditions of the first embodiment can be applied to these impurities as well, since there is a difference for each type of impurity, it is desirable to control the heat treatment conditions according to the type of impurity. Further, in the third step S3 in which the gettering process is performed, a gas capable of suppressing the diffusion of phosphorus may be selected, and the heat treatment may be performed while supplying the gas.

Furthermore, it is desirable to adjust the temperature profile in consideration of the residence time in the furnace according to the speed at which the substrate is carried out of the furnace.

In the first embodiment, the gas phase diffusion source is generated from the liquid diffusion source. However, as the diffusion source, the gas phase diffusion source may be used by supplying a gas into the solid diffusion source or directly into the furnace.

Furthermore, the temperature difference between the first temperature T ₁ which is the processing temperature of the first step S1 for forming the diffusion source and the second temperature T ₂ which is the processing temperature of the second step S2 for the diffusion processing. Is preferably 50 ° C. or more and 100 ° C. or less. By setting the temperature difference within the above range, it is possible to efficiently diffuse the impurities into the substrate without generating a diffusion source. If the temperature difference is less than 50 ° C., diffusion may not proceed sufficiently, or a diffusion source may be generated in the diffusion process. On the other hand, when the temperature disparity exceeds 100 ° C., the generation rate of the diffusion source becomes low and the productivity is lowered.

Further, the temperature difference between the first temperature T ₁ which is the processing temperature of the first step S1 for forming the diffusion source and the third temperature T ₃ which is the processing temperature of the third step S3 which is the gettering step is It is desirable that the temperature be 150 ° C. or higher and 200 ° C. or lower. By setting the temperature difference within the above range, gettering can be efficiently performed without generating a diffusion source. If the temperature disparity is less than 150 ° C., a diffusion source may be generated in the gettering process. On the other hand, if the temperature disparity exceeds 200 ° C., the gettering process does not proceed sufficiently and productivity is increased. descend.

1 p-type silicon substrate, 2 texture, 3 n-type diffusion layer, 4 phosphorous glass layer, 5 antireflection film, 6 light receiving surface side Ag electrode, 7 back surface aluminum electrode, 8 back surface Ag electrode, 9 BSF layer, P solar cell 10, quartz tube, 20 boat, 21 parent boat, 22 child boat, 30 diffusion gas supply section, 31 diffusion gas supply port, 32a carrier gas introduction pipe, 32b source gas supply pipe, 33 diffusion gas introduction pipe, 34 Gas introduction part, 35 gas supply hole, 40 heater, 41 temperature control part, 51a opening, 51b quartz door.

Claims (7)

A method for manufacturing a solar cell comprising a step of forming an n-type diffusion layer on a p-type crystalline silicon substrate,
Forming the n-type diffusion layer comprises:
Forming a diffusion source containing an n-type impurity on the p-type crystalline silicon substrate;
A second step of heating the p-type crystalline silicon substrate on which the diffusion source is formed and diffusing the n-type impurity on the surface of the p-type crystalline silicon substrate;
And a third step of lowering the temperature of the p-type crystalline silicon substrate in which the n-type impurity is diffused and heating it for a predetermined time,
The method for manufacturing a solar cell, wherein the first to third steps are continuously performed in the same processing apparatus. 2. The method of manufacturing a solar cell according to claim 1, wherein the first step is a step of heating the p-type crystalline silicon substrate in a gas atmosphere containing an n-type impurity. . The method for manufacturing a solar cell according to claim 2, wherein the third step is a step of heating at 600 to 675 ° C. The method of manufacturing a solar cell according to claim 2, wherein the third step is a step of heating at 625 ° C to 650 ° C. The first to third steps are realized by performing a temperature raising step and a temperature lowering step on the p-type crystalline silicon substrate together with gas supply / discharge in the same processing apparatus. The manufacturing method of the solar cell of any one of Claim 1 to 4. The first to third steps are sequentially repeated on a plurality of p-type crystalline silicon substrates using the same processing apparatus,
Including a fourth step of raising the temperature after the step of the third step,
6. The method for manufacturing a solar cell according to claim 5, wherein the fourth step is performed while taking out the p-type crystalline silicon substrate from the processing apparatus. A solar cell manufacturing apparatus used in a solar cell manufacturing method including a step of forming an n-type diffusion layer on a p-type crystalline silicon substrate,
A cylindrical chamber provided with a carry-in / out port for carrying in and out the p-type crystalline silicon substrate, and a gas supply unit for supplying and discharging gas;
A temperature controller for controlling the temperature of the internal space of the chamber;
A gas control unit that controls supply and discharge of gas to and from the internal space of the chamber;
With
The temperature controller is
A first step of contacting a diffusion source on a p-type crystalline silicon substrate by maintaining at a first temperature for a first time;
A second step of raising the temperature of the p-type crystalline silicon substrate in contact with the diffusion source and diffusing the n-type impurity on the surface of the p-type crystalline silicon substrate;
An apparatus for manufacturing a solar cell, comprising: continuously performing a third step of lowering the temperature of the p-type crystalline silicon substrate in which the n-type impurity is diffused and heating the p-type crystalline silicon substrate for a predetermined time.

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