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WO2016148429A1 - Carte de circuit imprimé souple - Google Patents

Carte de circuit imprimé souple Download PDF

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Publication number
WO2016148429A1
WO2016148429A1 PCT/KR2016/002327 KR2016002327W WO2016148429A1 WO 2016148429 A1 WO2016148429 A1 WO 2016148429A1 KR 2016002327 W KR2016002327 W KR 2016002327W WO 2016148429 A1 WO2016148429 A1 WO 2016148429A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal line
dielectric layer
ground
layer
side ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2016/002327
Other languages
English (en)
Korean (ko)
Inventor
김상필
김대호
이동형
조병훈
이다연
구황섭
김현제
정희석
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GigaLane Co Ltd
Original Assignee
GigaLane Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GigaLane Co Ltd filed Critical GigaLane Co Ltd
Priority to CN201690000582.6U priority Critical patent/CN208190991U/zh
Publication of WO2016148429A1 publication Critical patent/WO2016148429A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0277—Bendability or stretchability details
    • H05K1/028—Bending or folding regions of flexible printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits

Definitions

  • the present invention relates to a flexible circuit board.
  • Wireless terminal devices such as mobile phones, are equipped with RF (Radio Frequency) signal lines.
  • RF Radio Frequency
  • Conventional RF signal lines are installed in the form of coaxial cables.
  • space utilization in wireless terminal devices is reduced.
  • flexible circuit boards are generally used.
  • impedance matching may be performed by reducing the area of the ground to increase the reduced impedance again.
  • the flexible printed circuit board should be mounted at a proper distance from the main board, the sub board, and the battery in order to prevent the impedance change. Therefore, the flexible circuit board has a problem of decreasing the space utilization, which is considered as the greatest advantage. exist.
  • the impedance matching may be located close to the main board, the sub-board, and the battery, but even in this case, if the shape or position of the main board, the sub-board, the battery is changed, the flexibility for impedance matching There is a disadvantage that the shape of the circuit board must also be changed.
  • the conventional flexible printed circuit board has the same thickness in the longitudinal direction, and as the ground area increases, bending durability decreases.
  • the present invention improves bending durability, minimizes loss of signal lines and incoming signals from outside, and does not have to change its shape for impedance matching because there is no impedance change regardless of the position disposed inside the wireless terminal device.
  • the purpose is to provide a flexible circuit board.
  • the flexible circuit board of the present invention includes a first substrate portion and a second substrate portion extending from the first substrate portion and having a thickness thinner than that of the first substrate portion so as to bend. .
  • the first substrate unit may include a first ground layer; A first dielectric layer stacked on the first ground layer; A side ground spaced apart from each other by a predetermined interval so as to prevent an external signal from flowing into the signal line and having one surface coupled to the first dielectric layer; A second dielectric layer facing the first dielectric layer with the side ground interposed therebetween; And a second ground layer stacked on the second dielectric layer, wherein the second substrate portion includes at least one of the first ground layer, the side ground, the second dielectric layer, and the second ground layer. It is characterized by.
  • the side ground includes a first side ground whose surface is in contact with the first dielectric layer, and a second side ground whose surface is in contact with the second dielectric layer, wherein the first side ground and the second side ground
  • the other surface is characterized in that each is bonded via a bonding sheet.
  • the second substrate part may include a first ground layer, a first dielectric layer, a first side ground, and a signal line.
  • One surface of the signal line is coupled to the first dielectric layer, and the other surface thereof is exposed to the air layer facing each other at a predetermined interval from the second dielectric layer.
  • the first side ground may be formed in a length direction of the signal line to prevent a signal from flowing from the outside.
  • the second substrate portion may include a first dielectric layer, a first side ground, and a signal line.
  • the signal line includes a first signal line and a second signal line extending from the first signal line, wherein an area of the second signal line is larger than an area of the first signal line.
  • the second signal line may be divided into two or more branches.
  • Matching grooves corresponding to the shape of the second signal line are formed in the first ground layer.
  • the second substrate unit may include a first ground layer, a first dielectric layer, and a signal line.
  • the signal line may include an inner signal line provided on a bottom surface of the first dielectric layer and an outer signal line provided on an upper surface of the first dielectric layer, and the inner signal line and the outer signal line may be electrically connected through a via hole. It is done.
  • the first ground layer and the first dielectric layer may be formed in different shapes so that the outer signal line is formed on the same layer as the first ground layer.
  • the inner signal line may include a first signal line and a second signal line extending from the first signal line and having a width greater than that of the first signal line.
  • the outer signal line is characterized in that divided into two or more.
  • Matching grooves corresponding to the outer signal lines may be formed in the first ground layer.
  • the impedance does not change even if placed in any space inside the wireless terminal device.
  • FIG. 3 is a block diagram of an embodiment of the present invention.
  • 4A is a diagram showing a summary of a first embodiment of the present invention.
  • 4B is a diagram showing another essential part of the first embodiment of the present invention.
  • FIG. 5 is a configuration diagram of a second embodiment of the present invention.
  • 6A is a diagram showing a summary of a second embodiment of the present invention.
  • 6B is a diagram showing another essential part of the second embodiment of the present invention.
  • FIG. 7 is a configuration diagram of a third embodiment of the present invention.
  • FIG. 8A is a diagram showing a summary of a third embodiment of the present invention.
  • 8B is a diagram showing another essential part of the third embodiment of the present invention.
  • the flexible circuit board of the present invention includes a first substrate part 100 and a second substrate part 200.
  • the second substrate part 200 extends from the first substrate part 100 and is formed to have a thickness thinner than that of the first substrate part 100 so as to bend.
  • the flexible circuit board of the present invention may include a first ground layer 300, a first dielectric layer 400 stacked on the first ground layer 300, and an external signal.
  • the side ground 700 and the side ground which are spaced apart at a predetermined interval with the signal line 900 interposed therebetween, so that one side is coupled to the first dielectric layer 400 so as to prevent the inflow into the signal line 900.
  • the second dielectric layer 600 facing the first dielectric layer 400 with the 700 interposed therebetween, and the second ground layer 800 stacked on the second dielectric layer 600.
  • the side ground 700 includes a first side ground 710 whose surface is in contact with the first dielectric layer 400, and a second side ground 720 whose surface is in contact with the second dielectric layer 600.
  • the other surfaces of the first side ground 710 and the second side ground 720 are coupled to each other via the bonding sheet 500.
  • the second substrate portion 200 is formed to extend from the first substrate portion 100, the thickness of which is thinner than the thickness of the first substrate portion 100, the first substrate portion ( 100 is a side ground 700 and a second dielectric layer 600 including a first ground layer 300, a first dielectric layer 400, a first side ground 710, and a second side ground 720. And a second ground layer 800, and the second substrate part 200 includes the first ground layer 300, the side ground 700, the second dielectric layer 600, and the second ground layer 800. It is characterized in that any one or more are omitted and its thickness is made thinner than the first substrate portion.
  • Figure 3 is a view showing a first embodiment of the present invention
  • Figure 4 (a) and Figure 4 (b) is a view showing the main and other main parts of the first embodiment of the present invention.
  • the second substrate part 200 includes a first ground layer 300, a first dielectric layer 400, a first side ground 710, and a signal line 900.
  • the second substrate part 200 has a thickness of the first substrate part 200. Compared to the substrate portion 100, the thickness is improved, and bending durability is improved.
  • one surface of the signal line 900 of the flexible circuit board of the present invention is coupled to the first dielectric layer 400, and the other surface thereof is exposed to the air layer facing each other at a predetermined interval from the second dielectric layer 600. It is preferable that the first side ground 710 is formed to have a length corresponding to the length of the signal line 900 so as to prevent the signal from flowing from the outside.
  • the signal line 900 of the flexible circuit board of the present invention is exposed to air having a low dielectric constant, the surrounding capacitance is lowered, thereby minimizing signal loss.
  • the pair of side grounds 700 To suppress external signal influx.
  • the signal line 900 is provided on any one of the first dielectric layer 400 and the second dielectric layer 600 having a shape corresponding thereto, and the signal line 900 is interposed therebetween.
  • one of the first dielectric layer 400 and the second dielectric layer 600 is selected to combine the signal lines 900, and the first dielectric layer 400 and the second dielectric layer 600 are combined.
  • ) Are positioned to face each other, but when the first dielectric layer 400 and the second dielectric layer 600 are coupled through a pair of side grounds 700 with the signal line 900 therebetween, the first The dielectric layer 400, the second dielectric layer 600, and the pair of side grounds 700 are formed in an empty space, and the empty space is filled with air, and the signal line 900 is exposed to the air. will be.
  • the side ground 700 includes a first side ground 710 whose surface is in contact with the first dielectric layer 400, and a second side ground 720 whose surface is in contact with the second dielectric layer 600.
  • the first ground layer 300 and the second ground layer 800 are stacked on one surface of each of the first dielectric layer 400 and the second dielectric layer 600, and the first side ground 710 and the second side ground, respectively.
  • Each other surface 720 may be coupled via the bonding sheet 500.
  • the first side ground 710 and the second side ground 720 not only prevent external signals from entering, but also strengthen the electrical connection between the first ground layer 300 and the second ground layer 800. Do it.
  • the bonding sheet 500 together with the first side ground 710 and the second side ground 720 forms an empty space in which the air is filled in the flexible circuit board, and the first side ground 710 and the second side ground.
  • the film 720 is attached to the first dielectric layer 400 and the second dielectric layer 600.
  • the first ground layer 300, the second ground layer 800, the first side ground 710, the second side ground 720, the bonding sheet 500, the first dielectric layer 400, and the second Via holes VH are formed through the dielectric layer 600 in the vertical direction, and conductors are filled in the via holes VH so that the first ground layer 300, the second ground layer 800, and the first side ground 710, the second side ground 720 is electrically connected.
  • the first side ground 710 may be formed on the same layer as the signal line 900.
  • the first side ground 710 is attached to one surface of the bonding sheet 500
  • the second side ground 720 is attached to the other surface of the bonding sheet 500.
  • the capacitance between the signal line 900 and the second ground layer 800 is farther away. There is an advantage that can be lowered.
  • Fig. 5 is a structural diagram of a second embodiment of the present invention
  • Figs. 6 (a) and 6 (b) are diagrams showing the main parts and other main parts of the second embodiment of the present invention, respectively.
  • the second substrate part 200 includes a first dielectric layer 400, a first side ground 710, and a signal line 900.
  • the signal line 900 includes a first signal line 900a and a second signal line 900b extending from the first signal line 900a, and the area of the second signal line 900b is the first signal. It is characterized in that it is larger than the area of the line (900a), that is, the signal transmission amount is increased when the width of the first signal line (900a) to extend the area of the second signal line (900b).
  • the signal line 900 It is preferable to branch the signal line 900 to two or more second signal lines 900b.
  • the high frequency signal is transmitted along the edge of the signal line 900.
  • the second signal line 900b is divided into two or more, the area of the edge of the signal line 900 increases, so that the amount of high frequency signal transmission also increases. There is this.
  • FIGS. 8 (a) and 8 (b) are diagrams showing main and other main parts of the third embodiment of the present invention, respectively.
  • the second substrate part 200 includes a first ground layer 300, a first dielectric layer 400, and a signal line 900.
  • the signal line 900 includes an inner signal line 910 provided on a bottom surface of the first dielectric layer 400 and an outer signal line 920 provided on an upper surface of the first dielectric layer 400.
  • the 910 and the outer signal line 920 are electrically connected to each other through the via hole VH. Therefore, when the second substrate 200 is bent, when the inner signal line 910 interferes with the peripheral components, the signal line may be changed into the outer signal line 920.
  • the outer signal line 920 is formed in a shape different from that of the first dielectric layer 400 so that the outer signal line 920 is formed on the same layer as the first ground layer 300, and the inner signal line 910 is formed of the first signal line ( 900a and a second signal line 900b extending from the first signal line 900a and having a width greater than that of the first signal line 900a.
  • the second signal line 900b of the outer signal line 920 is divided into two or more, the high frequency signal transmission amount is increased, and the reason is as described above.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

L'invention concerne une carte de circuit imprimé souple. La carte de circuit imprimé souple selon la présente invention comprend : un premier substrat ; et un deuxième substrat qui s'étend à partir du premier substrat et dont l'épaisseur est inférieure à celle du premier substrat de manière à pouvoir fléchir.
PCT/KR2016/002327 2015-03-18 2016-03-09 Carte de circuit imprimé souple Ceased WO2016148429A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201690000582.6U CN208190991U (zh) 2015-03-18 2016-03-09 柔性电路板

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2015-0037240 2015-03-18
KR1020150037240A KR102364151B1 (ko) 2015-03-18 2015-03-18 연성회로기판

Publications (1)

Publication Number Publication Date
WO2016148429A1 true WO2016148429A1 (fr) 2016-09-22

Family

ID=56919107

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2016/002327 Ceased WO2016148429A1 (fr) 2015-03-18 2016-03-09 Carte de circuit imprimé souple

Country Status (3)

Country Link
KR (1) KR102364151B1 (fr)
CN (1) CN208190991U (fr)
WO (1) WO2016148429A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102668961B1 (ko) 2018-10-29 2024-05-24 삼성전자 주식회사 벤딩 특성을 갖는 배선 부재 및 이를 포함하는 전자 장치
CN111083869A (zh) * 2019-12-16 2020-04-28 精电(河源)显示技术有限公司 一种显示屏的柔性电路板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0750454A (ja) * 1993-06-03 1995-02-21 Internatl Business Mach Corp <Ibm> フレキシブル回路ボード
KR100850217B1 (ko) * 2007-07-05 2008-08-04 삼성전자주식회사 임피던스 매칭된 분기 스트립 전송라인을 갖는 프린트배선기판
JP2011181621A (ja) * 2010-02-26 2011-09-15 Hitachi Cable Ltd フレキシブル配線基板及びその製造方法
KR20130103347A (ko) * 2012-03-09 2013-09-23 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 반도체에 대한 3ｄ 전송 라인
WO2014103772A1 (fr) * 2012-12-29 2014-07-03 株式会社村田製作所 Circuit imprimé

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100619956B1 (ko) * 2004-11-10 2006-09-07 엘지전자 주식회사 회로기판 연결 장치를 갖는 휴대용 단말기
KR100958268B1 (ko) * 2008-02-15 2010-05-19 (주)기가레인 임피던스 미스매칭 없이 신호전송라인의 폭을 넓힐 수 있는인쇄회로기판
KR101085726B1 (ko) * 2009-10-23 2011-11-21 삼성전기주식회사 경연성 인쇄회로기판 및 그 제조 방법
EP2574155B1 (fr) 2010-12-03 2015-07-29 Murata Manufacturing Co., Ltd. Ligne de signaux haute fréquence

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0750454A (ja) * 1993-06-03 1995-02-21 Internatl Business Mach Corp <Ibm> フレキシブル回路ボード
KR100850217B1 (ko) * 2007-07-05 2008-08-04 삼성전자주식회사 임피던스 매칭된 분기 스트립 전송라인을 갖는 프린트배선기판
JP2011181621A (ja) * 2010-02-26 2011-09-15 Hitachi Cable Ltd フレキシブル配線基板及びその製造方法
KR20130103347A (ko) * 2012-03-09 2013-09-23 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 반도체에 대한 3ｄ 전송 라인
WO2014103772A1 (fr) * 2012-12-29 2014-07-03 株式会社村田製作所 Circuit imprimé

Also Published As

Publication number Publication date
KR102364151B1 (ko) 2022-02-18
CN208190991U (zh) 2018-12-04
KR20160112121A (ko) 2016-09-28

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