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WO2013019319A3 - Métal barrière non réactif pour procédé de liaison par diffusion - Google Patents

Métal barrière non réactif pour procédé de liaison par diffusion Download PDF

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Publication number
WO2013019319A3
WO2013019319A3 PCT/US2012/041783 US2012041783W WO2013019319A3 WO 2013019319 A3 WO2013019319 A3 WO 2013019319A3 US 2012041783 W US2012041783 W US 2012041783W WO 2013019319 A3 WO2013019319 A3 WO 2013019319A3
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WO
WIPO (PCT)
Prior art keywords
layer
barrier metal
reactive barrier
silver
eutectic
Prior art date
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Ceased
Application number
PCT/US2012/041783
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English (en)
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WO2013019319A2 (fr
Inventor
Chao-Kun Lin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba IPR Solutions Inc
Original Assignee
Toshiba Techno Center Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Techno Center Inc filed Critical Toshiba Techno Center Inc
Priority to CN201280011992.7A priority Critical patent/CN103636009A/zh
Priority to KR1020137023889A priority patent/KR101547414B1/ko
Priority to JP2014515891A priority patent/JP5856293B2/ja
Publication of WO2013019319A2 publication Critical patent/WO2013019319A2/fr
Publication of WO2013019319A3 publication Critical patent/WO2013019319A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/814—Bodies having reflecting means, e.g. semiconductor Bragg reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
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    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
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    • H—ELECTRICITY
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
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    • H01L2924/12042—LASER
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
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    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/83—Electrodes
    • H10H20/832—Electrodes characterised by their material

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Abstract

La présente invention concerne la liaison d'une structure de plaquette de support à une structure de plaquette de dispositif par l'intermédiaire d'une couche métallique eutectique (par exemple, en or/étain). Dans un exemple, la structure de plaquette de dispositif comprend un substrat de silicium sur lequel une structure épitaxiale de DEL est disposée. Une couche d'argent est disposée sur la structure épitaxiale de DEL. La structure de plaquette de support comprend un substrat de silicium conducteur recouvert d'une couche d'adhérence. Une couche de métal barrière non réactif (par exemple, en titane) est disposée entre la couche d'argent et le métal eutectique pour empêcher le métal de se diffuser de la couche eutectique (par exemple, en étain) vers l'argent pendant la liaison des plaquettes. Lors de la liaison des plaquettes, les structures de plaquette sont pressées les unes sur les autres et maintenues à plus de 280 °C pendant plus d'une minute. L'utilisation de la couche de métal barrière non réactif permet de réduire la quantité totale de palladium coûteux utilisé lors de la fabrication d'une DEL bleue verticale sur du silicium, ce qui réduit ainsi les coûts de fabrication de la DEL.
PCT/US2012/041783 2011-08-02 2012-06-09 Métal barrière non réactif pour procédé de liaison par diffusion Ceased WO2013019319A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201280011992.7A CN103636009A (zh) 2011-08-02 2012-06-09 用于共晶接合工艺的非反应性阻障层金属
KR1020137023889A KR101547414B1 (ko) 2011-08-02 2012-06-09 결합 공정을 위한 비-반응성 배리어 금속
JP2014515891A JP5856293B2 (ja) 2011-08-02 2012-06-09 発光装置およびその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/196,870 US9343641B2 (en) 2011-08-02 2011-08-02 Non-reactive barrier metal for eutectic bonding process
US13/196,870 2011-08-02

Publications (2)

Publication Number Publication Date
WO2013019319A2 WO2013019319A2 (fr) 2013-02-07
WO2013019319A3 true WO2013019319A3 (fr) 2013-09-12

Family

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PCT/US2012/041783 Ceased WO2013019319A2 (fr) 2011-08-02 2012-06-09 Métal barrière non réactif pour procédé de liaison par diffusion

Country Status (6)

Country Link
US (1) US9343641B2 (fr)
JP (1) JP5856293B2 (fr)
KR (1) KR101547414B1 (fr)
CN (1) CN103636009A (fr)
TW (1) TW201312813A (fr)
WO (1) WO2013019319A2 (fr)

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US9640728B2 (en) 2010-02-09 2017-05-02 Epistar Corporation Optoelectronic device and the manufacturing method thereof
US9136436B2 (en) * 2010-02-09 2015-09-15 Epistar Corporation Optoelectronic device and the manufacturing method thereof
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JP2016066705A (ja) * 2014-09-25 2016-04-28 イビデン株式会社 プリント配線板およびその製造方法
JP2016192527A (ja) * 2015-03-31 2016-11-10 ウシオ電機株式会社 半導体発光素子及びその製造方法
CN104993041B (zh) * 2015-06-04 2019-06-11 陈建伟 一种led倒装芯片固晶导电粘接结构及其安装方法
US10862002B2 (en) * 2018-04-27 2020-12-08 Facebook Technologies, Llc LED surface modification with ultraviolet laser
CN111554784B (zh) * 2020-07-09 2020-09-25 华灿光电（浙江）有限公司 发光二极管外延片及其生长方法
CN116646435B (zh) * 2023-07-26 2023-09-19 江西兆驰半导体有限公司 一种倒装发光二极管芯片及其制备方法

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