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WO2010039390A3 - Unité de commande de dispositif de mémoire à semi-conducteurs ayant un mode d'extension - Google Patents

Unité de commande de dispositif de mémoire à semi-conducteurs ayant un mode d'extension Download PDF

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Publication number
WO2010039390A3
WO2010039390A3 PCT/US2009/055859 US2009055859W WO2010039390A3 WO 2010039390 A3 WO2010039390 A3 WO 2010039390A3 US 2009055859 W US2009055859 W US 2009055859W WO 2010039390 A3 WO2010039390 A3 WO 2010039390A3
Authority
WO
WIPO (PCT)
Prior art keywords
solid state
state storage
storage device
device controller
expansion mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2009/055859
Other languages
English (en)
Other versions
WO2010039390A2 (fr
Inventor
Dean Klein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Priority to EP09818196.9A priority Critical patent/EP2332036B1/fr
Priority to CN200980138496.6A priority patent/CN102165409B/zh
Priority to KR1020117009805A priority patent/KR101265423B1/ko
Publication of WO2010039390A2 publication Critical patent/WO2010039390A2/fr
Publication of WO2010039390A3 publication Critical patent/WO2010039390A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1684Details of memory controller using multiple buses
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • G06F3/0607Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0634Configuration or reconfiguration of storage systems by changing the state or mode of one or more devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656Data buffering arrangements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Dram (AREA)
  • Computer And Data Communications (AREA)

Abstract

La présente invention concerne des unités de commande de dispositif de mémoire à semi-conducteurs, des dispositifs de mémoire à semi-conducteurs et des procédés de fonctionnement d'unités de commande de dispositif de mémoire à semi-conducteurs. Dans un tel dispositif de mémoire à semi-conducteurs, l'unité de commande peut fonctionner soit en mode d'extension DRAM soit en mode mémoire non volatile. Dans le mode d'extension DRAM, un ou plusieurs des canaux de communication de mémoire normalement utilisés pour communiquer avec les dispositifs de mémoire non volatile est/sont utilisés pour communiquer avec un dispositif d'extension DRAM.
PCT/US2009/055859 2008-09-30 2009-09-03 Unité de commande de dispositif de mémoire à semi-conducteurs ayant un mode d'extension Ceased WO2010039390A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP09818196.9A EP2332036B1 (fr) 2008-09-30 2009-09-03 Unité de commande de dispositif de mémoire à semi-conducteurs ayant un mode d'extension
CN200980138496.6A CN102165409B (zh) 2008-09-30 2009-09-03 具有扩充模式的固态存储装置控制器
KR1020117009805A KR101265423B1 (ko) 2008-09-30 2009-09-03 확장 모드를 구비한 솔리드 스테이트 저장 장치 제어기

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/241,794 US8069300B2 (en) 2008-09-30 2008-09-30 Solid state storage device controller with expansion mode
US12/241,794 2008-09-30

Publications (2)

Publication Number Publication Date
WO2010039390A2 WO2010039390A2 (fr) 2010-04-08
WO2010039390A3 true WO2010039390A3 (fr) 2010-05-27

Family

ID=42058808

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2009/055859 Ceased WO2010039390A2 (fr) 2008-09-30 2009-09-03 Unité de commande de dispositif de mémoire à semi-conducteurs ayant un mode d'extension

Country Status (6)

Country Link
US (4) US8069300B2 (fr)
EP (2) EP3121704B1 (fr)
KR (1) KR101265423B1 (fr)
CN (1) CN102165409B (fr)
TW (1) TWI434286B (fr)
WO (1) WO2010039390A2 (fr)

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US8305807B2 (en) 2010-07-09 2012-11-06 Sandisk Technologies Inc. Detection of broken word-lines in memory arrays
US8514630B2 (en) 2010-07-09 2013-08-20 Sandisk Technologies Inc. Detection of word-line leakage in memory arrays: current based approach
US20120110244A1 (en) * 2010-11-02 2012-05-03 Micron Technology, Inc. Copyback operations
US8756474B2 (en) * 2011-03-21 2014-06-17 Denso International America, Inc. Method for initiating a refresh operation in a solid-state nonvolatile memory device
US8379454B2 (en) 2011-05-05 2013-02-19 Sandisk Technologies Inc. Detection of broken word-lines in memory arrays
US8775901B2 (en) 2011-07-28 2014-07-08 SanDisk Technologies, Inc. Data recovery for defective word lines during programming of non-volatile memory arrays
US8750042B2 (en) 2011-07-28 2014-06-10 Sandisk Technologies Inc. Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures
CN102566943B (zh) * 2011-12-31 2015-03-11 记忆科技(深圳)有限公司 基于固态硬盘的通讯方法及固态硬盘
US8730722B2 (en) 2012-03-02 2014-05-20 Sandisk Technologies Inc. Saving of data in cases of word-line to word-line short in memory arrays
US9711196B2 (en) * 2012-09-10 2017-07-18 Texas Instruments Incorporated Configuration bit sequencing control of nonvolatile domain and array wakeup and backup
US9471484B2 (en) 2012-09-19 2016-10-18 Novachips Canada Inc. Flash memory controller having dual mode pin-out
US9810723B2 (en) 2012-09-27 2017-11-07 Sandisk Technologies Llc Charge pump based over-sampling ADC for current detection
US9164526B2 (en) 2012-09-27 2015-10-20 Sandisk Technologies Inc. Sigma delta over-sampling charge pump analog-to-digital converter
US9098402B2 (en) * 2012-12-21 2015-08-04 Intel Corporation Techniques to configure a solid state drive to operate in a storage mode or a memory mode
US9280497B2 (en) * 2012-12-21 2016-03-08 Dell Products Lp Systems and methods for support of non-volatile memory on a DDR memory channel
US9921980B2 (en) 2013-08-12 2018-03-20 Micron Technology, Inc. Apparatuses and methods for configuring I/Os of memory for hybrid memory modules
US9165683B2 (en) 2013-09-23 2015-10-20 Sandisk Technologies Inc. Multi-word line erratic programming detection
US20150205541A1 (en) * 2014-01-20 2015-07-23 Samya Systems, Inc. High-capacity solid state disk drives
US10521387B2 (en) 2014-02-07 2019-12-31 Toshiba Memory Corporation NAND switch
US9514835B2 (en) 2014-07-10 2016-12-06 Sandisk Technologies Llc Determination of word line to word line shorts between adjacent blocks
US9443612B2 (en) 2014-07-10 2016-09-13 Sandisk Technologies Llc Determination of bit line to low voltage signal shorts
US9460809B2 (en) 2014-07-10 2016-10-04 Sandisk Technologies Llc AC stress mode to screen out word line to word line shorts
US9484086B2 (en) 2014-07-10 2016-11-01 Sandisk Technologies Llc Determination of word line to local source line shorts
US9823846B2 (en) * 2014-08-20 2017-11-21 Qualcomm Incorporated Systems and methods for expanding memory for a system on chip
US9202593B1 (en) 2014-09-02 2015-12-01 Sandisk Technologies Inc. Techniques for detecting broken word lines in non-volatile memories
US9240249B1 (en) 2014-09-02 2016-01-19 Sandisk Technologies Inc. AC stress methods to screen out bit line defects
US9449694B2 (en) 2014-09-04 2016-09-20 Sandisk Technologies Llc Non-volatile memory with multi-word line select for defect detection operations
KR102358053B1 (ko) 2014-10-28 2022-02-04 삼성전자주식회사 복수의 불휘발성 메모리 칩들을 포함하는 스토리지 장치
US10007435B2 (en) * 2015-05-21 2018-06-26 Micron Technology, Inc. Translation lookaside buffer in memory
US9697320B2 (en) * 2015-09-24 2017-07-04 Qualcomm Incorporated Rectilinear macros having non-uniform channel spacing
US9698676B1 (en) 2016-03-11 2017-07-04 Sandisk Technologies Llc Charge pump based over-sampling with uniform step size for current detection
JP6753746B2 (ja) * 2016-09-15 2020-09-09 キオクシア株式会社 半導体記憶装置
CN106598742B (zh) * 2016-12-26 2020-01-03 湖南国科微电子股份有限公司 一种ssd主控内部负载均衡系统及方法
US10628049B2 (en) 2017-07-12 2020-04-21 Sandisk Technologies Llc Systems and methods for on-die control of memory command, timing, and/or control signals
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US20060190642A1 (en) * 2005-02-24 2006-08-24 International Business Machines Corporation Method and apparatus for testing, characterizing and monitoring a chip interface using a second data path
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WO2008086488A2 (fr) * 2007-01-10 2008-07-17 Mobile Semiconductor Corporation Système de mémoire adaptative pour améliorer la performance d'un dispositif informatique externe

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US20040024916A1 (en) * 2002-07-30 2004-02-05 Chien Hsing Portable computer with shared expansion slot
US20060190642A1 (en) * 2005-02-24 2006-08-24 International Business Machines Corporation Method and apparatus for testing, characterizing and monitoring a chip interface using a second data path
US20080082731A1 (en) * 2006-09-28 2008-04-03 Vijay Karamcheti Main memory in a system with a memory controller configured to control access to non-volatile memory, and related technologies
WO2008086488A2 (fr) * 2007-01-10 2008-07-17 Mobile Semiconductor Corporation Système de mémoire adaptative pour améliorer la performance d'un dispositif informatique externe

Also Published As

Publication number Publication date
KR20110063580A (ko) 2011-06-10
TW201017679A (en) 2010-05-01
WO2010039390A2 (fr) 2010-04-08
KR101265423B1 (ko) 2013-05-16
CN102165409A (zh) 2011-08-24
US20120233392A1 (en) 2012-09-13
TWI434286B (zh) 2014-04-11
EP2332036A2 (fr) 2011-06-15
US8069300B2 (en) 2011-11-29
EP3121704A1 (fr) 2017-01-25
US8452916B2 (en) 2013-05-28
EP2332036A4 (fr) 2014-10-29
US8832360B2 (en) 2014-09-09
EP3121704B1 (fr) 2018-01-17
US20100082881A1 (en) 2010-04-01
US20120059980A1 (en) 2012-03-08
US20140013035A1 (en) 2014-01-09
US8200894B2 (en) 2012-06-12
EP2332036B1 (fr) 2016-10-26
CN102165409B (zh) 2014-10-01

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