[go: up one dir, main page]

WO2010030101A2 - Mandrin électrostatique comprenant une double couche tampon (dbl) servant à réduire la contrainte thermique - Google Patents

Mandrin électrostatique comprenant une double couche tampon (dbl) servant à réduire la contrainte thermique Download PDF

Info

Publication number
WO2010030101A2
WO2010030101A2 PCT/KR2009/005068 KR2009005068W WO2010030101A2 WO 2010030101 A2 WO2010030101 A2 WO 2010030101A2 KR 2009005068 W KR2009005068 W KR 2009005068W WO 2010030101 A2 WO2010030101 A2 WO 2010030101A2
Authority
WO
WIPO (PCT)
Prior art keywords
buffer layer
electrostatic chuck
layer
thermal stress
insulating member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2009/005068
Other languages
English (en)
Korean (ko)
Other versions
WO2010030101A3 (fr
Inventor
최진식
최정덕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Komico Ltd
Original Assignee
Komico Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Komico Ltd filed Critical Komico Ltd
Priority to CN2009801358995A priority Critical patent/CN102150252B/zh
Publication of WO2010030101A2 publication Critical patent/WO2010030101A2/fr
Publication of WO2010030101A3 publication Critical patent/WO2010030101A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
    • H02N13/00—Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect

Definitions

  • the present invention relates to an electrostatic chuck including a double buffer layer that suppresses the generation and propagation of cracks due to thermal stress. More specifically, thermal stress is absorbed by the first buffer layer formed at the point where thermal stress occurs in the electrostatic chuck, and generation of cracks is suppressed, and propagation of cracks generated by the second buffer layer is suppressed, The present invention relates to an electrostatic chuck in which crack generation and propagation due to thermal stress generation are minimized and thus life is extended.
  • a deposition process such as chemical vapor deposition (CVD) or an etching process such as reactive ion etching (RIE) is performed.
  • CVD chemical vapor deposition
  • RIE reactive ion etching
  • an electrostatic chuck (ESC) is included in the deposition chamber or the etching chamber to fix the substrate in place.
  • FIG. 1 is a cross-sectional view showing the configuration of a conventional electrostatic chuck.
  • the conventional electrostatic chuck 100 is embedded in an aluminum body 101 as a base substrate, a ceramic substrate 102 for fixing a substrate seated on an upper surface, and a ceramic substrate 102 to be electrostatically charged.
  • the electrode 103 includes a terminal 103 for generating a high voltage, a terminal 104 for applying a high voltage to the electrode 103, and an insulating member 105 surrounding the outside of the terminal 104.
  • the electrostatic chuck 100 is operated by the electrode 103 generating an electrostatic force when a high voltage from an external power source is transmitted to the electrode 103 through the terminal 104. That is, the electrostatic force is transmitted to the upper surface of the ceramic substrate 102, the substrate can be fixed and maintained.
  • the ceramic substrate 102 receives heat to generate a thermal stress (thermal stress due to plasma temperature) to shorten the life of the electrostatic chuck. Specifically, heat generated in the ceramic substrate 102 by the plasma is transferred to the aluminum body 101, thereby causing the aluminum body 101 to thermally expand. At this time, the thermal stress is generated by the difference in the coefficient of thermal expansion between the aluminum body 101, the ceramic substrate 102, and the insulating member 105, the thermal stress is the portion A of FIG. Maximum at the end of the interface between the insulating members 105.
  • One embodiment of the present invention for improving the problems related to the life shortening of the electrostatic chuck as described above provides an electrostatic chuck having first and second buffer layers capable of absorbing the thermal stress of the body portion of the electrostatic chuck.
  • Another embodiment of the present invention provides a method of manufacturing the electrostatic chuck.
  • the electrostatic chuck according to an object of the present invention is partially through a body portion having a through hole, an insertion hole corresponding to the through hole and corresponding to the through hole and partially through the insertion hole.
  • the connecting terminal connected to the electrode through the through hole and the insertion hole and the insulating member to electrically insulate the connecting terminal and the body portion
  • a first buffer layer disposed on at least a portion of the interface between the terminal portion and the body portion and the insulating member to block the thermal stress from being transferred to the insulating member, and on at least a portion of the boundary portion between the body portion and the base portion.
  • a second buffer layer which blocks thermal stress from being transferred to the insulating member.
  • the first buffer layer may be further disposed on an interface between the base portion and the insulating member, and the first buffer layer and the second buffer layer include a ceramic material.
  • the thicknesses of the first buffer layer and the second buffer layer may have a range of 100 ⁇ m to 250 ⁇ m.
  • the surface roughness of the first buffer layer may be in the range of 0.1 ⁇ m to 2 ⁇ m, and the surface roughness of the second buffer layer may have a range of 3 ⁇ m to 7 ⁇ m.
  • the porosity of the first buffer layer and the second buffer layer is equal to or greater than the porosity of the ceramic base portion, for example, may have a porosity of about 2 to 10%.
  • a body portion having a through hole, and having a first buffer layer corresponding to the through hole and absorbing the thermal stress of the body portion on an outer surface thereof.
  • Prepare the terminal part The terminal part is inserted into the through hole so as to be exposed to an upper surface of the body part, and a second buffer layer is formed on an upper surface of at least a portion of the body part and an upper surface of at least a portion of the first buffer layer.
  • a lower base layer is formed on the buffer layer to expose the top surface of the terminal portion, and an electrode layer is formed on the lower base layer in contact with the top surface of the terminal portion.
  • An upper base layer is formed on the lower base layer and the electrode layer to complete the electrostatic chuck.
  • the first and second buffer layers may be coated in an atmospheric plasma spraying process.
  • the thermal stress is absorbed by the buffer layer included in the electrostatic chuck, thereby minimizing the occurrence of cracks due to thermal stress, thereby extending the life of the electrostatic chuck.
  • thermal stress is absorbed by the first buffer layer included in the electrostatic chuck to suppress the generation of cracks due to thermal stress, and even if cracks are generated, the propagation of the electrostatic chuck is suppressed by the second buffer layer. The life can be extended even further.
  • FIG. 1 is a cross-sectional view showing the configuration of a conventional electrostatic chuck.
  • FIG. 2 is a cross-sectional view showing the configuration of an electrostatic chuck according to an embodiment of the present invention.
  • first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.
  • the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.
  • FIG. 2 is a cross-sectional view showing the configuration of an electrostatic chuck according to an embodiment of the present invention.
  • the electrostatic chuck 200 is formed on the body portion 201 and the body portion 201 as a base substrate and is embedded therein while fixing and maintaining a processing object (not shown) such as a substrate.
  • a base plate 202 having an electrode layer 203 for generating an electrostatic force, a terminal 204 for transmitting a high voltage applied from an external power source to the electrode layer 203, and an insulating member 205 surrounding the outside of the terminal 204.
  • a first buffer layer 206a and a base portion 202 disposed on at least a portion of the terminal portion including the terminal portion and the interface between the body portion 201 and the insulating member 205 and the boundary portion between the base portion 202 and the insulating member 205.
  • a second buffer layer 206b formed in a region including an interface between the insulating member 205 and the insulating member 205.
  • the body portion 201 is made of a conductive material such as aluminum, and functions as a base substrate of the electrostatic chuck 200.
  • the through hole 207 may be formed in the center of the body portion 201 so that the terminal 204 constituting the electrode portion and the insulating member 205 can be inserted therethrough.
  • the base portion 202 is a dielectric having a predetermined dielectric constant, and may be formed on the body portion 201 by an Atmospherically Plasma Spray (APS) coating method.
  • Base 202 may comprise a ceramic.
  • the ceramics include Al 2 O 3 , Y 2 O 3 , Al 2 O 3 / Y 2 O 3 , ZrO 2 , AlC, TiN, AlN, TiC, MgO, CaO, CeO 2 , TiO 2 , B x C y , BN, SiO 2 , SiC, YAG, Mullite, AlF 3 and the like. At this time, these ceramics can be used individually or in combination.
  • the base 202 serves to fix and hold the substrate by using electrostatic force.
  • an electrode layer 203 for generating electrostatic force may be buried in the base 202.
  • the top surface of the base portion 202 is preferably horizontal to allow the substrate to be seated.
  • the electrode layer 203 may be formed to be substantially parallel to the top surface of the base portion 202.
  • An insertion groove 208 may be formed in the center portion of the base portion 202 so that the terminal 204 may be inserted to be connected to the electrode layer 203.
  • the terminal 204 may be inserted from the outside and connected to the electrode layer 203 through the through hole 208 formed in the body portion 201 and the insertion groove 208 formed in the base portion 202.
  • the electrode layer 203 is embedded in the base 202, and receives a high voltage from the terminal 204 to generate an electrostatic force on the top surface of the base 202.
  • the substrate may be seated on the upper surface of the base 202 by the generated electrostatic force and may be fixed and maintained.
  • the electrode layer 203 is preferably made of a conductive material such as nickel.
  • the method of embedding the electrode layer 203 in the base portion 202 may be performed by first forming the lower base layer 202a by using the atmospheric plasma spray coating method, and then forming the electrode layer 203 by using the atmospheric plasma spray coating method thereon. It is preferable to form the upper base layer 202b on the secondary by using the atmospheric plasma spray coating method. At this time, the electrode layer 23 may be formed using screen printing as needed.
  • the thickness of the lower base layer 202a is preferably 400 ⁇ m to 600 ⁇ m, the thickness of the electrode layer 203 is 5 ⁇ m to 65 ⁇ m, and the thickness of the upper base layer 202 b is adjusted within the range of 400 ⁇ m to 750 ⁇ m.
  • the terminal 204 is connected to the electrode layer 203 through the through hole 208 and the insertion groove 209 and transmits a high voltage from the external power source (not shown) to the electrode layer 203.
  • the terminal 204 is preferably made of a conductive material such as tungsten, molybdenum, titanium, or the like.
  • an insulating member 205 is formed between the body portion 201 and the terminal 201.
  • the insulating member 205 insulates the body portion 201 and the terminal 204.
  • the insulating member 205 is preferably made of a ceramic sintered body. Ceramic sintered body has the advantage that can maximize the insulation because there are few pores.
  • the thickness of the insulating member 205 is set to approximately 2,000 m.
  • the surface roughness of the insulating member 205 is preferably adjusted within the range of 0.1 to 2 ⁇ m in order to reduce the occurrence of arcing by lowering the surface resistance, it is more preferably adjusted to the range of 1 ⁇ m or less.
  • the first buffer layer 206a may be formed in the electrostatic chuck 200 at the boundary between the body portion 201 and the insulating member 205 and at the boundary between the base portion 202 and the insulating member 205. It is a characteristic configuration.
  • the first buffer layer 206a may include a ceramic. Examples of the ceramics include Al 2 O 3 , Y 2 O 3 , Al 2 O 3 / Y 2 O 3 , ZrO 2 , AlC, TiN, AlN, TiC, MgO, CaO, CeO 2 , TiO 2 , B x C y , BN, SiO 2 , SiC, YAG, Mullite, AlF 3 and the like. At this time, these ceramics can be used individually or in combination.
  • the first buffer layer 206a may be formed using an Atmospherically Plasma Spray (APS) coating method.
  • APS Atmospherically Plasma Spray
  • the thickness of the first buffer layer 206a is preferably adjusted within the range of 100 ⁇ m to 250 ⁇ m, but more preferably within the range of 150 ⁇ m to 200 ⁇ m. If the thickness of the first buffer layer 206a is thicker than the thickness range, pores may be generated inside the first buffer layer 206a, and cracks may occur. If the thickness of the first buffer layer 206a is thinner than the thickness range, the first buffer layer 206a may be formed. There is a risk of not playing a role.
  • the surface roughness of the first buffer layer 206a is preferably adjusted within the range of 0.1 ⁇ m to 2 ⁇ m to reduce the occurrence of arcing by lowering the surface resistance, but more preferably adjusted to the range of 1 ⁇ m or less.
  • the first buffer layer 206a absorbs the thermal stress generated by the temperature rise of the electrostatic chuck 200 due to the plasma generated inside the chamber during the deposition process or the etching process.
  • thermal stress is generated by the expansion of the aluminum body 101 by the conduction of heat due to the temperature rise of the electrostatic chuck 100 due to the plasma temperature.
  • the thermal stress generated when the electrostatic chuck 200 receives the heat to expand the body 201 is absorbed by the first buffer layer 206a without being directly transmitted to the insulating member 205. do.
  • the first buffer layer 206a absorbs the thermal stress at the point where the thermal stress is maximum (refer to part A of FIG. 1), the body portion 201 and the insulating member ( The occurrence of cracks at the end of the interface between the 205 can be suppressed, as a result of which the life of the electrostatic chuck 200 can be extended.
  • the second buffer layer 206b is formed in the region including the interface between the base portion 202 and the insulating member 205 in the electrostatic chuck 200.
  • the region where the second buffer layer 206b is formed may include a portion of an interface between the base portion 202 and the insulating member 205 and an interface between the body portion 201 and the base portion 202.
  • the upper surface of the second buffer layer 206b may be formed to be spaced apart from the electrode layer 203 embedded in the base 202 by a predetermined distance.
  • the second buffer layer 206b may include a ceramic.
  • the ceramics include Al 2 O 3 , Y 2 O 3 , Al 2 O 3 / Y 2 O 3 , ZrO 2 , AlC, TiN, AlN, TiC, MgO, CaO, CeO 2 , TiO 2 , B x C y , BN, SiO 2 , SiC, YAG, Mullite, AlF 3 and the like. At this time, these ceramics can be used individually or in combination.
  • the second buffer layer 206b is preferably formed using an APS Atmospherically Plasma Spray coating method.
  • the thickness of the second buffer layer 206b is preferably controlled within the range of 100 ⁇ m to 250 ⁇ m, but more preferably within the range of 150 ⁇ m to 200 ⁇ m. If the thickness of the second buffer layer 206b is thicker than the thickness range, pores may be generated in the second buffer layer 206b to cause cracks, and if the thickness of the second buffer layer 206b is thinner than the thickness range of the second buffer layer 206b, There is a risk of not playing a role.
  • the surface roughness of the second buffer layer 206b is preferably adjusted within the range of 3 ⁇ m to 7 ⁇ m in order to reduce the occurrence of arcing by lowering the surface resistance, but more preferably adjusted within the range of 4 ⁇ m to 6 ⁇ m. . If the surface roughness of the second buffer layer 206b exceeds the surface roughness range, the strength of the second buffer layer 206b may drop, and the second buffer layer 206b itself may fall off, and the surface roughness may not reach the surface roughness range. In this case, the surface of the second buffer layer 206b is so smooth that there is a possibility that the lower base layer 202a formed on the second buffer layer 206b may not adhere well in the future.
  • the second buffer layer 206b plays a role of suppressing propagation of cracks generated even though the first buffer layer 206a is formed. That is, when the first buffer layer 206a does not completely absorb thermal stress, cracks may occur at the end of the interface between the body portion 201 and the insulating member 205, which is relatively brittle. It may propagate toward the base 202 and eventually damage the base 202, where the second buffer layer 206b located above the first buffer layer 206a suppresses the propagation of cracks toward the base 202. As a result, the lifespan of the electrostatic chuck 200 can be extended.
  • the thermal stress generated by forming the first buffer layer 206a and the second buffer layer 206b around the contact portion of the body portion 201 and the insulating member 205 which is the point where the thermal stress is maximized.
  • the first buffer layer 206a and the second buffer layer 206b absorb the thermal stress as described above so as to effectively perform the role of suppressing crack generation and propagation.
  • the porosity of the ceramic constituting the 206a and the second buffer layer 206b is equal to or higher than the porosity of the base portion 202, that is, the lower base layer 202a or the upper base layer 202b.
  • the porosity of the ceramic constituting the first buffer layer 206a and the second buffer layer 206b is preferably controlled in the range of 2% to 10%, more preferably in the range of 2% to 7%.
  • the porosity of the first buffer layer 206a and the second buffer layer 206b exceeds the porosity range, pores increase in the first buffer layer 206a and the second buffer layer 206b, and thus the first buffer layer 206a and If the strength of the second buffer layer 206b is lowered and even the first buffer layer 206a and the second buffer layer 206b itself fall off, and fall within the porosity range, the first buffer layer 206a and the second buffer layer 206b may fall. There is a risk of cracking in the buffer layer 206b.
  • the edge portions of the first buffer layer 206a and the second buffer layer 206b have a round shape that is not sharp or a chamfered shape. This is because when the edge portions of the first buffer layer 206a and the second buffer layer 206b have sharp shapes, stress may be concentrated at the sharp portions, thereby increasing the probability of cracking.
  • the density of the lower base layer 202a of the A region on the inclined surface of the body portion 201 is lower than that of the B region on the body portion 201 excluding the inclined surface. It may be relatively lower than the density of the base layer 202a.
  • the thickness of the region A is greater than the thickness of the region B, current leakage through the pores included in the lower base layer 202a of the region A may be reduced. Therefore, the occurrence of arcing between the body portion 201 and the electrode layer 203 can be reduced.
  • the lower base layer 202a of the region A is relatively thick even if the density of the lower base layer 202a of the region A is relatively low, the lower base layer of the interface portion between the body portion 201 and the insulating member 205. Crack generation in 202a can be prevented. Therefore, the occurrence of arcing between the body 201 and the electrode layer 203 through the crack can be reduced.
  • an adhesive layer (not shown) may be further provided between the body portion 201 and the lower base layer 202a.
  • the adhesive layer bonds the body portion 201 and the lower base layer 202a.
  • the adhesive layer has a thermal expansion rate between the thermal expansion rate of the body portion 201 and the thermal expansion rate of the lower base layer 202a, and buffers between the body portion 201 and the lower base layer 202a having different thermal expansion rates.
  • the adhesive layer may include a metal alloy. Examples of the metal alloys include nickel-aluminum alloys.
  • the upper surface of the lower base layer 202a is higher than the upper surface of the terminal 204. It is desirable to. This causes the thickness of the upper base layer 202b in the C region located above the terminal 204 to be thicker than the thickness of the upper base layer 202b in the remaining D region, so that a high voltage power supply is applied to the electrode layer 203 through the terminal 204. This is to prevent the discharge phenomenon between the electrode layer 203 and the substrate which is supported on the upper base layer 202b even if it is applied to.
  • the electrode part is inserted into the body part 201.
  • the electrode portion is composed of a terminal 204, an insulating member 205, and a first buffer layer 206a.
  • the terminal 204 is connected to an external power source for applying power when the electrostatic chuck 200 is used in the future.
  • the insulating member 205 surrounds the terminal 204 so as to insulate between the body portion 201 and the terminal 204.
  • the first buffer layer 206a is formed in a predetermined region on the insulating member 205 to suppress crack generation due to thermal stress in the electrostatic chuck 200.
  • the electrode part is manufactured by manufacturing the terminal 204 and the insulating member 205, respectively, and then inserting and fixing the terminal 204 to the insulating member 205 and then fixing the first buffer layer 206a in a predetermined region on the insulating member 205. Form to complete. In this case, it is preferable to form the first buffer layer 206a after the insulation member 205 is shaved by cutting the insulating member 205 in the region where the first buffer layer 206a is formed on the insulating member 205. Do. In addition, the edges of the terminal 204 and the insulating member 205 are preferably processed to have a round shape. In addition, in order to lower the surface roughness, after forming the first buffer layer 206a, it is preferable to polish the surface.
  • the second buffer layer 206b is formed.
  • the second buffer layer 206b is formed in some regions on the body portion 201 and some regions on the first buffer layer 206a so as to suppress crack propagation due to thermal stress in the electrostatic chuck 200.
  • the base 202 in which the electrode layer 203 is embedded is laminated on the body 201 and the second buffer layer 206b to finally complete the electrostatic chuck 200.
  • the base 202 in which the electrode layer 203 is embedded is formed by sequentially stacking the lower base layer 202a, the electrode layer 203, and the upper base layer 202b.
  • the surface of each layer is polished after being formed. It is preferable.
  • the present invention is not necessarily limited to the above masking method, and after forming the lower base layer 202a on the body portion 201, a method of removing the lower base layer 202a of the corresponding portion so that the upper surface of the terminal 204 is exposed may be used. It may be.
  • the material and the forming method of each component constituting the electrostatic chuck are the same as described above.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Jigs For Machine Tools (AREA)

Abstract

L’invention concerne un mandrin électrostatique (ESC) comprenant une couche tampon destinée à absorber la contrainte thermique. Le mandrin électrostatique comprend: un corps principal muni de trous transversaux et de trous d'insertion alignés sur les trous transversaux, ces trous étant disposés sur le côté supérieur dudit corps principal; et des bornes partiellement découvertes disposées à travers les trous d'insertion. Le corps principal est également muni d'une base qui arrime solidement l'objet à retenir grâce à l'énergie électrostatique desdites bornes; de bornes de contact raccordées auxdites bornes à travers les trous transversaux et les trous d'insertion; de bornes équipées de composants isolants qui isolent électriquement les bornes de contact et le corps principal; d'une première couche tampon qui bloque le transfert de la contrainte thermique du corps principal au composant isolant, et qui est disposée le long d'au moins une partie de la barrière entre le corps principal et la base; et d'une seconde couche tampon qui bloque le transfert de la contrainte thermique du corps principal au composant isolant, et qui est disposée le long d'au moins une partie de la barrière entre le corps principal et la base. Le dispositif de l'invention permet d'absorber la contrainte thermique de la couche tampon du mandrin électrostatique, ce qui réduit au minimum les fissures et prolonge la durée de vie du mandrin.
PCT/KR2009/005068 2008-09-09 2009-09-08 Mandrin électrostatique comprenant une double couche tampon (dbl) servant à réduire la contrainte thermique Ceased WO2010030101A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2009801358995A CN102150252B (zh) 2008-09-09 2009-09-08 包含有用于减小热应力的双缓冲层的静电吸盘

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2008-0088973 2008-09-09
KR1020080088973A KR100984751B1 (ko) 2008-09-09 2008-09-09 열 응력 감소를 위한 이중 버퍼층을 포함하는 정전 척

Publications (2)

Publication Number Publication Date
WO2010030101A2 true WO2010030101A2 (fr) 2010-03-18
WO2010030101A3 WO2010030101A3 (fr) 2010-07-08

Family

ID=42005612

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/005068 Ceased WO2010030101A2 (fr) 2008-09-09 2009-09-08 Mandrin électrostatique comprenant une double couche tampon (dbl) servant à réduire la contrainte thermique

Country Status (4)

Country Link
KR (1) KR100984751B1 (fr)
CN (1) CN102150252B (fr)
TW (1) TWI379380B (fr)
WO (1) WO2010030101A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11499229B2 (en) 2018-12-04 2022-11-15 Applied Materials, Inc. Substrate supports including metal-ceramic interfaces

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102610476B (zh) * 2012-03-12 2015-05-27 中微半导体设备(上海)有限公司 一种静电吸盘
CN108666251B (zh) * 2017-03-31 2020-11-20 上海微电子装备（集团）股份有限公司 硅片吸附装置、硅片传送装置、硅片传输系统及传送方法
CN111112808A (zh) * 2018-10-30 2020-05-08 三星钻石工业股份有限公司 基板分断装置及基板分断方法
TW202537036A (zh) * 2024-01-18 2025-09-16 美商瓦特洛威電子製造公司 用於陶瓷之嵌入式電氣終端

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0964160A (ja) * 1995-08-29 1997-03-07 Hitachi Ltd 半導体製造方法および装置
JP3790000B2 (ja) * 1997-01-27 2006-06-28 日本碍子株式会社 セラミックス部材と電力供給用コネクターとの接合構造
JP4005268B2 (ja) 1999-06-01 2007-11-07 日本碍子株式会社 セラミックスと金属との接合構造およびこれに使用する中間挿入材
KR20030044499A (ko) * 2001-11-30 2003-06-09 삼성전자주식회사 정전척 및 이의 제조방법
JP4272373B2 (ja) * 2001-12-11 2009-06-03 太平洋セメント株式会社 静電チャック
JP3906087B2 (ja) 2002-01-30 2007-04-18 京セラ株式会社 ウエハ支持部材
CN1278389C (zh) * 2003-02-27 2006-10-04 株式会社日立高新技术 等离子体处理装置及静电吸盘的制造方法
JP2007005740A (ja) * 2005-06-23 2007-01-11 Creative Technology:Kk 静電チャック電位供給部の構造とその製造及び再生方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11499229B2 (en) 2018-12-04 2022-11-15 Applied Materials, Inc. Substrate supports including metal-ceramic interfaces

Also Published As

Publication number Publication date
WO2010030101A3 (fr) 2010-07-08
KR100984751B1 (ko) 2010-10-01
TWI379380B (en) 2012-12-11
KR20100030169A (ko) 2010-03-18
TW201021153A (en) 2010-06-01
CN102150252B (zh) 2013-08-14
CN102150252A (zh) 2011-08-10

Similar Documents

Publication Publication Date Title
KR100997374B1 (ko) 정전척 및 이의 제조 방법
KR101693187B1 (ko) 정전척
TWI785727B (zh) 用於高溫處理之具有金屬結合背板的靜電定位盤組件
WO2010030101A2 (fr) Mandrin électrostatique comprenant une double couche tampon (dbl) servant à réduire la contrainte thermique
WO2013032260A9 (fr) Mandrin électrostatique
WO2014123323A1 (fr) Procédé de traitement de surface et structure en céramique qui utilise ce dernier
WO2010030102A2 (fr) Mandrin électrostatique (esc) comprenant une double couche tampon (dbl) servant à réduire la contrainte thermique
JP4808258B2 (ja) 静電チャックの給電構造及びその製造方法並びに静電チャック給電構造の再生方法
KR101122709B1 (ko) 정전척
WO2022080522A1 (fr) Élément chauffant en céramique
WO2011152620A2 (fr) Support électrostatique et dispositif de traitement de substrat le comprenant
WO2022054989A1 (fr) Élément chauffant en céramique
WO2023027525A1 (fr) Suscepteur en céramique
US11909335B2 (en) Electrostatic chuck and substrate fixing device
KR20100137679A (ko) 글라스 정전척 및 그 제조방법
TW200816344A (en) Structure for electrostatic chuck potential supply part and its manufacturing and reproduction method
JP6257540B2 (ja) 静電チャックおよびその製造方法
KR20050091635A (ko) 나선형 전극을 갖는 정전척 및 그 제조 방법
CN114597152A (zh) 一种静电卡盘的制造方法
KR102759610B1 (ko) 코팅 타입 고온 정전척
KR102870886B1 (ko) 정전척
WO2022231190A1 (fr) Mandrin électrostatique haute température de type revêtement
WO2023106445A1 (fr) Suscepteur cryogénique et ensemble connecteur électrique utilisé dans ledit suscepteur
WO2025188090A1 (fr) Procédé de fabrication de suscepteur et suscepteur ainsi obtenu
KR20190006751A (ko) 정전척

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200980135899.5

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09813223

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 09813223

Country of ref document: EP

Kind code of ref document: A2

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 25.05.2011)