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WO2010011399A3 - Methods and circuits for thwarting semi-invasive and non-invasive integrated circuit security attacks - Google Patents

Methods and circuits for thwarting semi-invasive and non-invasive integrated circuit security attacks Download PDF

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Publication number
WO2010011399A3
WO2010011399A3 PCT/US2009/043994 US2009043994W WO2010011399A3 WO 2010011399 A3 WO2010011399 A3 WO 2010011399A3 US 2009043994 W US2009043994 W US 2009043994W WO 2010011399 A3 WO2010011399 A3 WO 2010011399A3
Authority
WO
WIPO (PCT)
Prior art keywords
invasive
integrated circuit
methods
thwarting
semi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2009/043994
Other languages
French (fr)
Other versions
WO2010011399A2 (en
Inventor
Lawrence T. Clark
Fionn Sheerin
Thomas Mozdzen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Arizona
Arizona State University ASU
Original Assignee
University of Arizona
Arizona State University ASU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Arizona, Arizona State University ASU filed Critical University of Arizona
Publication of WO2010011399A2 publication Critical patent/WO2010011399A2/en
Publication of WO2010011399A3 publication Critical patent/WO2010011399A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Methods and systems are provided for thwarting semi-invasive and non-invasive security attacks on an integrated circuit. The methods and systems generally make reverse engineering, reconfiguration, decryption, observation, or any combination thereof, of the internal operations of the integrated circuit substantially more difficult if not impossible without damaging the integrated circuit.
PCT/US2009/043994 2008-05-14 2009-05-14 Methods and circuits for thwarting semi-invasive and non-invasive integrated circuit security attacks Ceased WO2010011399A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US5315008P 2008-05-14 2008-05-14
US61/053,150 2008-05-14

Publications (2)

Publication Number Publication Date
WO2010011399A2 WO2010011399A2 (en) 2010-01-28
WO2010011399A3 true WO2010011399A3 (en) 2010-05-27

Family

ID=41570797

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2009/043994 Ceased WO2010011399A2 (en) 2008-05-14 2009-05-14 Methods and circuits for thwarting semi-invasive and non-invasive integrated circuit security attacks

Country Status (1)

Country Link
WO (1) WO2010011399A2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2488583A (en) 2011-03-03 2012-09-05 Nds Ltd Preventing unauthorized access to data stored in non-volatile memories
US9405917B2 (en) 2014-05-30 2016-08-02 Apple Inc. Mechanism for protecting integrated circuits from security attacks
US10579536B2 (en) 2016-08-09 2020-03-03 Arizona Board Of Regents On Behalf Of Arizona State University Multi-mode radiation hardened multi-core microprocessors
US9946899B1 (en) 2016-10-14 2018-04-17 Google Llc Active ASIC intrusion shield
US10262956B2 (en) 2017-02-27 2019-04-16 Cisco Technology, Inc. Timing based camouflage circuit
CN110768779A (en) * 2019-01-16 2020-02-07 哈尔滨安天科技集团股份有限公司 Chip power supply circuit for preventing side channel information leakage
DE102019213707A1 (en) * 2019-09-10 2021-03-11 Carl Zeiss Meditec Ag Computer hardware for a computer controlled medical device and methods for controlling a computer controlled medical device
CN110659510B (en) * 2019-09-12 2021-10-26 苏州浪潮智能科技有限公司 Configuration file decryption method, device, equipment and readable storage medium
US12307000B2 (en) * 2019-12-10 2025-05-20 Cryptography Research, Inc. Share domain arrangements for masked hardware implementations
US12333229B2 (en) 2021-11-11 2025-06-17 International Business Machines Corporation Logic circuit locking with self-destruct

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030014643A1 (en) * 2001-07-12 2003-01-16 Fujitsu Limited Electronic apparatus and debug authorization method
US20030219126A1 (en) * 2000-09-14 2003-11-27 Stmicroelectronics Sa Method for scrambling the current consumption of an integrated circuit
US20050241005A1 (en) * 2004-04-27 2005-10-27 Infineon Technologies Ag Data processing apparatus and method for operating a dual rail circuit component
US6973570B1 (en) * 1999-12-31 2005-12-06 Western Digital Ventures, Inc. Integrated circuit comprising encryption circuitry selectively enabled by verifying a device
US20060087883A1 (en) * 2004-10-08 2006-04-27 Irvine Sensors Corporation Anti-tamper module
GB2423425A (en) * 2005-02-18 2006-08-23 Cirrus Logic Inc A low-noise digital audio driver with a PMOS pull-down transistor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6973570B1 (en) * 1999-12-31 2005-12-06 Western Digital Ventures, Inc. Integrated circuit comprising encryption circuitry selectively enabled by verifying a device
US20030219126A1 (en) * 2000-09-14 2003-11-27 Stmicroelectronics Sa Method for scrambling the current consumption of an integrated circuit
US20030014643A1 (en) * 2001-07-12 2003-01-16 Fujitsu Limited Electronic apparatus and debug authorization method
US20050241005A1 (en) * 2004-04-27 2005-10-27 Infineon Technologies Ag Data processing apparatus and method for operating a dual rail circuit component
US20060087883A1 (en) * 2004-10-08 2006-04-27 Irvine Sensors Corporation Anti-tamper module
GB2423425A (en) * 2005-02-18 2006-08-23 Cirrus Logic Inc A low-noise digital audio driver with a PMOS pull-down transistor

Also Published As

Publication number Publication date
WO2010011399A2 (en) 2010-01-28

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