[go: up one dir, main page]

WO2009069683A1 - Procédé de fabrication d'une carte imprimée multicouche - Google Patents

Procédé de fabrication d'une carte imprimée multicouche Download PDF

Info

Publication number
WO2009069683A1
WO2009069683A1 PCT/JP2008/071511 JP2008071511W WO2009069683A1 WO 2009069683 A1 WO2009069683 A1 WO 2009069683A1 JP 2008071511 W JP2008071511 W JP 2008071511W WO 2009069683 A1 WO2009069683 A1 WO 2009069683A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
insulating layer
wiring board
multilayer printed
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/071511
Other languages
English (en)
Japanese (ja)
Inventor
Takeshi Nishio
Atsuhiro Uratsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dexerials Corp
Original Assignee
Sony Chemical and Information Device Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Chemical and Information Device Corp filed Critical Sony Chemical and Information Device Corp
Priority to JP2009511283A priority Critical patent/JPWO2009069683A1/ja
Priority to CN2008801183337A priority patent/CN101878679A/zh
Publication of WO2009069683A1 publication Critical patent/WO2009069683A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0582—Coating by resist, i.e. resist used as mask for application of insulating coating or of second resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

L'invention porte sur un procédé pour exposer une couche interne d'une carte imprimée multicouche. Dans le procédé, un premier motif (3) est formé au moins sur une surface (2a) d'une première couche isolante (2), et une couche d'encre soluble dans les alcalis (13) est formée dans une région d'exposition (11) à partir de laquelle le premier motif de câblage (3) sur la première couche isolante (2) doit être exposé. De plus, une seconde couche isolante (4) est formée sur la surface de la première couche isolante (2) sur laquelle la couche d'encre est formée, de telle sorte que la couche d'encre (13) est exposée à partir de la seconde couche isolante (4), une couche métallique (14) est formée sur la seconde couche isolante (4), et un second motif de câblage (5) est formé par formation de motifs sur la couche métallique (14). Ensuite, la couche d'encre (13) est dissoute et retirée, et la première couche isolante (2) et le premier motif de câblage (3) sont exposés dans la région d'exposition (11).
PCT/JP2008/071511 2007-11-30 2008-11-27 Procédé de fabrication d'une carte imprimée multicouche Ceased WO2009069683A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009511283A JPWO2009069683A1 (ja) 2007-11-30 2008-11-27 多層プリント配線板の製造方法
CN2008801183337A CN101878679A (zh) 2007-11-30 2008-11-27 多层印刷布线板的制造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007311181 2007-11-30
JP2007-311181 2007-11-30

Publications (1)

Publication Number Publication Date
WO2009069683A1 true WO2009069683A1 (fr) 2009-06-04

Family

ID=40678575

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/071511 Ceased WO2009069683A1 (fr) 2007-11-30 2008-11-27 Procédé de fabrication d'une carte imprimée multicouche

Country Status (3)

Country Link
JP (1) JPWO2009069683A1 (fr)
CN (1) CN101878679A (fr)
WO (1) WO2009069683A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013520007A (ja) * 2010-02-12 2013-05-30 エルジー イノテック カンパニー リミテッド 印刷回路基板及びその製造方法
JP2014093527A (ja) * 2012-11-02 2014-05-19 Samsung Electro-Mechanics Co Ltd プリント回路基板の製造方法
US20160007442A1 (en) * 2014-07-01 2016-01-07 Isola Usa Corp. Prepregs Including UV Curable Resins Useful for Manufacturing Semi-Flexible PCBs
CN112996237A (zh) * 2019-12-12 2021-06-18 三星电机株式会社 印刷电路板

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102883545B (zh) * 2012-09-17 2015-04-22 东莞康源电子有限公司 软硬结合板内层焊接点的保护工艺
KR101307163B1 (ko) * 2012-11-29 2013-09-11 주식회사 에스아이 플렉스 인쇄회로기판의 내층회로 보호공법
JP6240007B2 (ja) * 2014-03-18 2017-11-29 日本メクトロン株式会社 フレキシブルプリント基板の製造方法およびフレキシブルプリント基板の製造に用いられる中間生成物
CN106231820A (zh) * 2016-07-29 2016-12-14 台山市精诚达电路有限公司 软硬结合板加工方法
JP7533834B2 (ja) * 2019-02-27 2024-08-14 住友電工プリントサーキット株式会社 プリント配線板及びプリント配線板の製造方法
CN113573461B (zh) * 2020-04-29 2023-01-17 鹏鼎控股(深圳)股份有限公司 半挠折线路板及其制作方法
CN112730230B (zh) * 2020-12-24 2022-10-11 中国航空工业集团公司成都飞机设计研究所 一种自动铺丝预浸料丝束粘性测定装置及方法
CN113966096A (zh) * 2021-09-26 2022-01-21 东莞康源电子有限公司 一种微型倒装焊接类腔体载板的加工方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0239594A (ja) * 1988-07-29 1990-02-08 Sharp Corp リジッドフレキシブル配線板の製造方法
JPH08174755A (ja) * 1994-12-21 1996-07-09 Toagosei Co Ltd 銅張絶縁シートおよび多層プリント配線板の製造方法
JP2001015917A (ja) * 1999-06-30 2001-01-19 Toshiba Corp リジッドフレックスプリント配線板の製造方法
JP2005085839A (ja) * 2003-09-05 2005-03-31 Cmk Corp リジッド・フレックス多層プリント配線板の製造方法
JP2006203155A (ja) * 2005-01-20 2006-08-03 Samsung Electro Mech Co Ltd リジッドフレキシブルプリント基板の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09283932A (ja) * 1996-04-08 1997-10-31 Ibiden Co Ltd 多層プリント配線板の製造方法
JPH1013027A (ja) * 1996-06-19 1998-01-16 Matsushita Electric Works Ltd 多層プリント配線板の製造方法
JPH10126056A (ja) * 1996-10-18 1998-05-15 Victor Co Of Japan Ltd プリント配線基板の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0239594A (ja) * 1988-07-29 1990-02-08 Sharp Corp リジッドフレキシブル配線板の製造方法
JPH08174755A (ja) * 1994-12-21 1996-07-09 Toagosei Co Ltd 銅張絶縁シートおよび多層プリント配線板の製造方法
JP2001015917A (ja) * 1999-06-30 2001-01-19 Toshiba Corp リジッドフレックスプリント配線板の製造方法
JP2005085839A (ja) * 2003-09-05 2005-03-31 Cmk Corp リジッド・フレックス多層プリント配線板の製造方法
JP2006203155A (ja) * 2005-01-20 2006-08-03 Samsung Electro Mech Co Ltd リジッドフレキシブルプリント基板の製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013520007A (ja) * 2010-02-12 2013-05-30 エルジー イノテック カンパニー リミテッド 印刷回路基板及びその製造方法
JP2014093527A (ja) * 2012-11-02 2014-05-19 Samsung Electro-Mechanics Co Ltd プリント回路基板の製造方法
KR101814113B1 (ko) 2012-11-02 2018-01-02 삼성전기주식회사 인쇄회로기판의 제조방법
US20160007442A1 (en) * 2014-07-01 2016-01-07 Isola Usa Corp. Prepregs Including UV Curable Resins Useful for Manufacturing Semi-Flexible PCBs
US9764532B2 (en) * 2014-07-01 2017-09-19 Isola Usa Corp. Prepregs including UV curable resins useful for manufacturing semi-flexible PCBs
US10307989B2 (en) 2014-07-01 2019-06-04 Isola Usa Corp. Prepregs including UV curable resins useful for manufacturing semi-flexible PCBs
CN112996237A (zh) * 2019-12-12 2021-06-18 三星电机株式会社 印刷电路板

Also Published As

Publication number Publication date
JPWO2009069683A1 (ja) 2011-04-14
CN101878679A (zh) 2010-11-03

Similar Documents

Publication Publication Date Title
WO2009069683A1 (fr) Procédé de fabrication d'une carte imprimée multicouche
WO2006134216A3 (fr) Structure de carte de circuits imprimes et procede de fabrication de structure de carte de circuits imprimes
JP2021093434A5 (fr)
TW200802775A (en) An embedded electronic device and method for manufacturing an embedded electronic device
EP2009497A4 (fr) Élément photosensible, procédé de traçage d'un motif d'enduit protecteur, et procédé de production d'une carte de circuit imprimé
WO2007104171A3 (fr) Procede de fabrication par liga-uv d'une structure metallique multicouche a couches adjacentes non entierement superposees, et structure obtenue
EP2278396A4 (fr) Composition de resine photosensible, element photosensible, procede de formation d' un motif de reserve et procede de fabrication de carte de circuit imprime
WO2007078865A3 (fr) Procédé et dispositif pour une carte de circuit imprimé au moyen de métallisation assistée au laser et traçage des motifs d'un substrat
TW200644202A (en) Method of manufacturing flexible circuit substrate
TW200727752A (en) Method of forming metal plate pattern and circuit board
TW200746950A (en) Method for producing electronic component
WO2012069807A3 (fr) Photo-imagerie
TWI257273B (en) Printed circuit board, method and apparatus for fabricating the same, wiring circuit pattern, and printed wiring board
WO2007126516A3 (fr) Procédé de création d'un motif sur une surface de cuivre
EP2091309A3 (fr) Procédé de fabrication d'une carte à circuit imprimé
JP2010087168A (ja) 多層プリント配線板の製造方法
CN101562945A (zh) 内埋式线路结构及其制作方法
TW200721882A (en) Method of forming a flexible heating element
TW200638826A (en) Circuit board structure and fabricating method thereof
WO2011010889A3 (fr) Carte de circuit imprimé souple et son procédé de fabrication
TW200623983A (en) Method for cutting printed circuit board
TW200701845A (en) Method of manufacturing wiring board
TW200744424A (en) Method for manufacturing via holes used in printed circuit boards
WO2005006412A3 (fr) Procede pour former un substrat de circuits integres
JP2008544550A5 (fr)

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880118333.7

Country of ref document: CN

ENP Entry into the national phase

Ref document number: 2009511283

Country of ref document: JP

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08855503

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08855503

Country of ref document: EP

Kind code of ref document: A1