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WO2008156100A1 - Circuit board and semiconductor device - Google Patents

Circuit board and semiconductor device Download PDF

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Publication number
WO2008156100A1
WO2008156100A1 PCT/JP2008/061099 JP2008061099W WO2008156100A1 WO 2008156100 A1 WO2008156100 A1 WO 2008156100A1 JP 2008061099 W JP2008061099 W JP 2008061099W WO 2008156100 A1 WO2008156100 A1 WO 2008156100A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode pad
circuit board
semiconductor device
resist layer
solder resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2008/061099
Other languages
French (fr)
Japanese (ja)
Inventor
Tadahiro Morifuji
Shigeyuki Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of WO2008156100A1 publication Critical patent/WO2008156100A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
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    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
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    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0568—Resist used for applying paste, ink or powder

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

A circuit board (1) whereupon a semiconductor chip is to be flip-chip mounted is provided with an electrode pad (3) formed on the surface of a board main body (2), and a solder resist layer (4) which covers the surface of the board main body (2) and has an opening section (4a) for exposing the electrode pad (3). The solder resist layer (4) is formed not to be in contact with the electrode pad (3) and to have a value H/L satisfy the inequalities of 1.0≤H/L≤1.5, where, L is the maximum width of the electrode pad and H is the thickness of the solder resist layer.
PCT/JP2008/061099 2007-06-18 2008-06-18 Circuit board and semiconductor device Ceased WO2008156100A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007159631A JP5243735B2 (en) 2007-06-18 2007-06-18 Circuit board and semiconductor device
JP2007-159631 2007-06-18

Publications (1)

Publication Number Publication Date
WO2008156100A1 true WO2008156100A1 (en) 2008-12-24

Family

ID=40156259

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/061099 Ceased WO2008156100A1 (en) 2007-06-18 2008-06-18 Circuit board and semiconductor device

Country Status (3)

Country Link
JP (1) JP5243735B2 (en)
TW (1) TW200919679A (en)
WO (1) WO2008156100A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010225778A (en) * 2009-03-23 2010-10-07 Toshiba Corp Imaging device
CN111276471A (en) * 2020-02-27 2020-06-12 京东方科技集团股份有限公司 A backlight module and its manufacturing method, and a display device
CN111668125A (en) * 2020-06-19 2020-09-15 绍兴同芯成集成电路有限公司 Wafer tin ball printing process
WO2024066221A1 (en) * 2022-09-30 2024-04-04 长鑫存储技术有限公司 Semiconductor structure and method for manufacturing semiconductor structure

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