WO2008156071A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- WO2008156071A1 WO2008156071A1 PCT/JP2008/061020 JP2008061020W WO2008156071A1 WO 2008156071 A1 WO2008156071 A1 WO 2008156071A1 JP 2008061020 W JP2008061020 W JP 2008061020W WO 2008156071 A1 WO2008156071 A1 WO 2008156071A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor device
- trenches
- channel
- embedded electrode
- trench
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
- H10D30/635—Vertical IGFETs having no inversion channels, e.g. vertical accumulation channel FETs [ACCUFET] or normally-on vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/141—VDMOS having built-in components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/611—Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
- H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
- H10D64/647—Schottky drain or source electrodes for IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Abstract
スイッチング速度を高速化することが可能な半導体装置を提供する。この半導体装置(20)は、互いに所定の間隔(b)を隔てて配列された複数のトレンチ(3)を有するn型エピタキシャル層(2)と、複数のトレンチ(3)の各々を埋め込むように、トレンチ(3)の内面上にシリコン酸化膜(4)を介して形成された埋め込み電極(5)と、埋め込み電極(5)の上方に、シリコン酸化膜(6)を介して配設されることにより、埋め込み電極(5)と容量結合されたメタル層(7)とを備えている。また、半導体装置(20)は、互いに隣り合うトレンチ(3)間の領域がチャネル(電流通路)(11)となるように構成されており、この領域をトレンチ(3)の周辺に形成された空乏層で塞ぐことによって、チャネル(11)を流れる電流が遮断される一方、トレンチ(3)の周辺の空乏層を消滅させることによって、チャネル(11)を介して電流が流れるように構成されている。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/665,584 US8816419B2 (en) | 2007-06-19 | 2008-06-17 | Semiconductor device |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-161052 | 2007-06-19 | ||
| JP2007-161049 | 2007-06-19 | ||
| JP2007161052A JP2009004413A (ja) | 2007-06-19 | 2007-06-19 | 半導体装置 |
| JP2007161049A JP2009004411A (ja) | 2007-06-19 | 2007-06-19 | 半導体装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2008156071A1 true WO2008156071A1 (ja) | 2008-12-24 |
Family
ID=40156230
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2008/061020 Ceased WO2008156071A1 (ja) | 2007-06-19 | 2008-06-17 | 半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8816419B2 (ja) |
| WO (1) | WO2008156071A1 (ja) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102770947A (zh) * | 2009-10-20 | 2012-11-07 | 维西埃-硅化物公司 | 超高密度功率沟槽式金属氧化物半导体场效应晶体管 |
| US9437729B2 (en) | 2007-01-08 | 2016-09-06 | Vishay-Siliconix | High-density power MOSFET with planarized metalization |
| US9443974B2 (en) | 2009-08-27 | 2016-09-13 | Vishay-Siliconix | Super junction trench power MOSFET device fabrication |
| US9761696B2 (en) | 2007-04-03 | 2017-09-12 | Vishay-Siliconix | Self-aligned trench MOSFET and method of manufacture |
| US9882044B2 (en) | 2014-08-19 | 2018-01-30 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
| US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
| US10234486B2 (en) | 2014-08-19 | 2019-03-19 | Vishay/Siliconix | Vertical sense devices in vertical trench MOSFET |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008153142A1 (ja) | 2007-06-15 | 2008-12-18 | Rohm Co., Ltd. | 半導体装置 |
| WO2008156070A1 (ja) * | 2007-06-18 | 2008-12-24 | Rohm Co., Ltd. | 半導体装置 |
| US9484451B2 (en) | 2007-10-05 | 2016-11-01 | Vishay-Siliconix | MOSFET active area and edge termination area charge balance |
| US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
| FR3085540B1 (fr) | 2018-08-31 | 2020-09-25 | St Microelectronics Rousset | Dispositif integre de mesure temporelle a constante de temps ultra longue et procede de fabrication |
| JP7365306B2 (ja) * | 2020-09-09 | 2023-10-19 | 株式会社東芝 | 半導体装置 |
| JP7726773B6 (ja) | 2021-12-17 | 2025-09-19 | 株式会社東芝 | 半導体装置及びその製造方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006210535A (ja) * | 2005-01-26 | 2006-08-10 | Toyota Industries Corp | 半導体装置 |
| JP2006237066A (ja) * | 2005-02-22 | 2006-09-07 | Toshiba Corp | 半導体装置 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US214197A (en) * | 1879-04-08 | Improvement in shuttle-box mechanisms | ||
| US5679966A (en) * | 1995-10-05 | 1997-10-21 | North Carolina State University | Depleted base transistor with high forward voltage blocking capability |
| JP2001007149A (ja) | 1999-06-24 | 2001-01-12 | Nec Corp | 高出力半導体装置 |
| JP4528460B2 (ja) * | 2000-06-30 | 2010-08-18 | 株式会社東芝 | 半導体素子 |
| JP4357753B2 (ja) * | 2001-01-26 | 2009-11-04 | 株式会社東芝 | 高耐圧半導体装置 |
| US7345342B2 (en) * | 2001-01-30 | 2008-03-18 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
| JP2002289816A (ja) * | 2001-03-23 | 2002-10-04 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP3617971B2 (ja) * | 2001-12-11 | 2005-02-09 | 株式会社東芝 | 半導体記憶装置 |
| US7462908B2 (en) * | 2004-07-14 | 2008-12-09 | International Rectifier Corporation | Dynamic deep depletion field effect transistor |
| WO2008153142A1 (ja) | 2007-06-15 | 2008-12-18 | Rohm Co., Ltd. | 半導体装置 |
| WO2008156070A1 (ja) | 2007-06-18 | 2008-12-24 | Rohm Co., Ltd. | 半導体装置 |
-
2008
- 2008-06-17 WO PCT/JP2008/061020 patent/WO2008156071A1/ja not_active Ceased
- 2008-06-17 US US12/665,584 patent/US8816419B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006210535A (ja) * | 2005-01-26 | 2006-08-10 | Toyota Industries Corp | 半導体装置 |
| JP2006237066A (ja) * | 2005-02-22 | 2006-09-07 | Toshiba Corp | 半導体装置 |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9437729B2 (en) | 2007-01-08 | 2016-09-06 | Vishay-Siliconix | High-density power MOSFET with planarized metalization |
| US9947770B2 (en) | 2007-04-03 | 2018-04-17 | Vishay-Siliconix | Self-aligned trench MOSFET and method of manufacture |
| US9761696B2 (en) | 2007-04-03 | 2017-09-12 | Vishay-Siliconix | Self-aligned trench MOSFET and method of manufacture |
| US9443974B2 (en) | 2009-08-27 | 2016-09-13 | Vishay-Siliconix | Super junction trench power MOSFET device fabrication |
| KR101869323B1 (ko) * | 2009-10-20 | 2018-06-20 | 비쉐이-실리코닉스 | 초고밀도 전력 트렌치 mosfet |
| CN102770947B (zh) * | 2009-10-20 | 2015-07-01 | 维西埃-硅化物公司 | 超高密度功率沟槽式金属氧化物半导体场效应晶体管 |
| EP2491581A4 (en) * | 2009-10-20 | 2014-04-09 | Vishay Siliconix | POWER TRENCH MOSFET WITH SUPERHIGH DENSITY |
| CN102770947A (zh) * | 2009-10-20 | 2012-11-07 | 维西埃-硅化物公司 | 超高密度功率沟槽式金属氧化物半导体场效应晶体管 |
| US9887259B2 (en) | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
| US10283587B2 (en) | 2014-06-23 | 2019-05-07 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
| US9882044B2 (en) | 2014-08-19 | 2018-01-30 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
| US10234486B2 (en) | 2014-08-19 | 2019-03-19 | Vishay/Siliconix | Vertical sense devices in vertical trench MOSFET |
| US10340377B2 (en) | 2014-08-19 | 2019-07-02 | Vishay-Siliconix | Edge termination for super-junction MOSFETs |
| US10444262B2 (en) | 2014-08-19 | 2019-10-15 | Vishay-Siliconix | Vertical sense devices in vertical trench MOSFET |
| US10527654B2 (en) | 2014-08-19 | 2020-01-07 | Vishay SIliconix, LLC | Vertical sense devices in vertical trench MOSFET |
Also Published As
| Publication number | Publication date |
|---|---|
| US8816419B2 (en) | 2014-08-26 |
| US20100181606A1 (en) | 2010-07-22 |
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