WO2002035609A1 - Method for producing a gate oxide formed on a semiconductor substrate - Google Patents

Abstract

The invention concerns a method for producing a gate oxide formed on a semiconductor substrate with 1-0-0 orientation (100), comprising an integral silica layer bound to the substrate through an interface layer, the integral layer (101) and the interface layer (102) having substantially constant minimal thickness, such that the gate oxide layer has an ultra-thin thickness. The method consists in: cleaning said substrate surface, passivating said surface using hydrogenation forming a hydrogen monolayer, producing under vacuum slightly and uniformly charged oxidising ions preserving a residual oxidising gas, and in orienting said ions towards the surface while controlling their charge, their density and their deceleration so that their speed is substantially null when contacting the surface, so as to prevent any kinetic collision and provoke the opening of the pendant Si-H bonds at said surface with maximal saturation of the bonds opened by the oxidising ions to form the oxide layer with minimal thickness.

Description

 PROCESS FOR PRODUCING A FORMED GRID OXIDE ON A SEMICONDUCTOR SUBSTRATE

The invention relates to a method for producing a gate oxide formed on a surface of a semiconductor substrate, in particular of a silicon substrate.

The invention applies to the field of microelectronics on a semiconductor substrate for the manufacture of integrated circuits and memories with very high integration density, and more specifically to electronic components integrated into such circuits or memories, such as diodes or transistors, which involve active interfaces between the substrate and insulating oxides.

As an example, it is recalled that a MOS-type transistor has a monocrystalline silicon substrate comprising two strongly n ⁺ doped zones, constituting two electrodes, the source and the drain, and surmounted by a gate, the lower part of which , close to the substrate, consists of an oxide layer forming the gate oxide. The source, the drain and the grid form three poles. The source and the drain are coated with metallic contact layers, completing the Metal - Oxide - Semiconductor structure (in short MOS) of the transistor. By adjusting the polarities of the grid, a current flows in a

"Channel", located between the source and the drain and facing the grid. This current is controlled by the polarity of the grid which, with the channel, constitutes the faces of a capacitor. The capacity of this capacitor is proportional to the relative dielectric coefficient of the insulator formed between them by the gate oxide (relative dielectric coefficient "ε _r " of the order of 4.2 for SiO ₂ and the oxides in thin layers ).

The width "L" of the grid and its relationship to the thickness "e" of the resulting grid oxide, usually constitute characteristics which define the technological generation of a microelectronic sector. This is how there is, in production, the 0.35 μm sector (for L = 0.35 μm and e = 45 Å). The tendency remaining to miniaturization, the 0.25 μm and 0.18 μm channels (for a thickness of grid oxide respectively of the order 30-35 and 25 Å) are currently in development, while the 0.1 μm sector (with a thickness e of the order of 10 to 12 Å) is in advanced study. The gate oxide is conventionally produced by thermal oxidation at high temperature, of the order of 900 to 1000 ° C. As the thickness control must be better than one tenth of the thickness of the layers, the thickness of the gate oxide is more difficult to control: with a gate oxide of thickness approximately equal to 25 Å, the control d The thickness should be more precise than ± 1.25 Å, which is in fact the limit of what can be achieved industrially with current methods. Another limitation comes from the defect rate per unit area of the gate oxide. This rate increases appreciably when the thickness of the oxide decreases due to the multiplication, in the grid oxide, of tiny holes (“pin holes” in English terminology) which form a short circuit between the grid and the canal. To overcome this defect, without reducing the capacity of the gate oxide, it is known to produce a gate oxide using oxides of refractory materials of substantially higher relative dielectric coefficient, such as for example Ta ₂ O ₅ (ε _r = 30) or TiO ₂ (ε _r = 86). Such an oxide is obtained by sputtering or by ion bombardment deposition under oxidizing conditions (abbreviated as IBD, initials of Ion Beam Deposition in English terminology). It therefore allows, at constant capacity, to increase the thickness of insulation by a factor of 10 or 20.

However, a compromise should be sought between an increase in thickness, capable of reducing the number of pin-holes, and the physical performance of the components, in particular in terms of cut-off frequencies, for which a reduction in capacity is always sought.

In addition, an important difficulty appears with the use of refractory oxides: deposited on channel 13, these oxides combine over time with silicon to form the silicide of the corresponding refractory metal. This silicide, formed just under the grid, greatly deteriorates the mobility of the channel. The present invention aims in particular to allow the use of such refractory oxides without the components having to undergo the aforementioned drops in performance.

An oxide layer of structurally thinner thickness is provided on the surface of the silicon, hereinafter called “ultra thin layer”, without this layer exhibiting structural defects of the “pin-hole” type, the layer of oxide being formed of a layer of rigorously stoichiometric silica, hereinafter called "integral layer", and a transient interface layer between the substrate and the integral layer. The interface layer is of composite structure, comprising intermediate links.

It has in fact been found that such a layer unexpectedly forms an efficient diffusion barrier of refractory oxides for integrated electronic components, with regard to the active surface of the silicon substrate by preventing any interactive contact with the substrate. of silicon, in particular for a substrate with a conventional crystal orientation 1-0-0.

Between an integral silica layer and the monocrystalline silicon wafer, there is an interface sublayer of non-homogeneous and uncontrolled structure, formed of Si, SiO and SiO ₂ bonds, and of minimum thickness approximately equal to 1, 4 to 1.5 Å. The grid oxide layer of minimum thickness that can be obtained therefore includes this non-homogeneous sublayer.

The invention relates to a method capable of producing such a layer.

It is known various methods described below for obtaining a thin oxide layer of SiO ₂ from an ideal flat pure surface of 1-0-0 silicon single crystal. However, no process makes it possible to obtain a so-called “ultra thin” oxide layer, ie of the order of 6 A.

Rapid thermal oxidation (abbreviated RTO, initials of the English name "RAPID THERMAL OXIDATION" performs the oxidation of silicon in vertical quartz tubes, heated to high temperature, of the order of 800 ° C to 1100 ° C In these tubes, containers hold the silicon wafers, horizontal, and separated from each other by a few millimeters. Through these quartz tubes, oxidizing gases based on oxygen, but also catalysts, are circulated. for example based hydroxyl. This technology does not make it possible to make an oxide of thickness less than 25 A ° to 30 A ⁰ .

It is not possible to reduce this thickness by reducing the oxidation time because the temperature rise of the tube, and of all the silicon wafers, induces a very high thermal inertia.

Another technology implementing “thermal oxidation” uses, as illustrated in FIG. 1, a quartz container 200, in the form of a flat box, into which a single silicon wafer 202 is introduced, the face which must be treated. being turned towards the processing means through an airlock 201. After introduction of the silicon wafer, the airlock is closed, the gas 205 of the container 200 is purged and replaced by an oxidizing gas, for example oxygen.

Above the container, the processing means consist of a high-power lamp 203 below a reflector 204. When the stabilization of the gases inside the container is complete, a voltage is applied to the lamp 203, which induces a high power heat flow (arrows 206), which brings the surface of the wafer to a temperature which can reach 650 ° C. in a few seconds.

This solution does not make it possible to produce thin oxide layers of less than about 10 A. In addition, this technique has many disadvantages:

- The temperature of 650 ° C, although lower than the temperatures of the prior technology, remains unacceptable for current devices for manufacturing integrated circuits; - the machine's duration and power checks are not sufficient to ensure sufficient reproducibility for continuous production;

the transition interface between the silicon wafer and the “integral” silica layer, that is to say strictly stoichiometric, exhibits defects in which there are trapped charges, which appreciably limits the dielectric performance of the oxide layer formed. Soft oxidation techniques use the natural oxidation of silicon subjected to air. Indeed, a cleaned silicon surface then oxidizes spontaneously on contact with air. However, this spontaneous oxidation is extremely heterogeneous, and cannot be used industrially. A third type of approach uses more aggressive methods of implanting oxygen ions into the material. However, in addition to the fact that the implantation of these ions significantly disturbs the surface of the crystal, it is difficult to control the depth of penetration of the ions. In addition to make it an oxidized surface, it is necessary to anneal the surface, which again poses the problems associated with temperature.

There is also a plasma oxidation technology. This technology consists in producing an oxygen plasma above the silicon surface. Collisions of ions with the surface cause activation and oxidation of the surface. The thicknesses obtained remain around 80 Å.

Furthermore, it is known from patent FR 2 757 881 a method for treating the surface of silicon by remote ion interaction. This process treats said surface to clean it and form a layer of an insulating compound therein by implementing the interaction between highly charged ions, for example Argon Ar ¹⁷⁺ or Ar ¹⁸⁺ ions. Applied to the oxidation of a silicon substrate, in particular of orientation 1-0-0, such a method cannot be applied to form a homogeneous and stable layer, since the highly charged ions create electrostatic charges and weaken Si-O bonds. The craters which are likely to form are not very compatible with the deposition of a refractory oxide on such a surface. Thus, it is not possible to obtain a controllable oxide thickness.

On the contrary, another object of the invention is to implement a process for producing an oxide layer as thin as structurally possible which is perfectly controlled and in particular compatible with a layer of refractory oxide deposited on said layer d 'thin oxide. To achieve these aims and remedy the drawbacks of the state of the art, the invention provides a method for producing a gate oxide on a semiconductor substrate of 1-0-0 orientation comprising a layer of integral silica and an interface layer on a substrate surface, the layers having substantially constant minimum thicknesses so that the gate oxide layer has an ultra thin thickness, that is to say substantially equal to 6 A. Such a process consists in cleaning said substrate surface, in passivating this surface using a hydrogenation forming a monolayer of hydrogen, in producing under vacuum weakly and uniformly charged oxidizing ions, such as O ²⁺ or O ³⁺ , directing these ions towards said surface while controlling their charge, their density and their deceleration so that their speed is substantially zero in contact with said surface, so as to prevent any kinetic collision and causes r an opening of the Si-H pendant bonds at said surface with maximum saturation of the bonds opened by the oxidizing ions to form the oxide layer of minimum thickness.

An oxidizing residual gas advantageously makes it possible to fill all the valence bonds.

The process is self-stopping because as soon as the surface is oxidized, the reaction stops by itself due to the disappearance of the pendant hydrogen bonds, and the surface is then saturated with oxygen.

The hydrogenation can be carried out using a hydrofluoric acid and ammonium ion bath. The passivation thus obtained is of the type used by the company BELL TELEPHONE Inc. In general, the silicon substrate is first cleaned by vacuum etching of the native oxide formed on the substrate. This cleaning can be carried out by a reactive ion etching type process, known to those skilled in the art (abbreviated RIE, initials of Reactive lonic Etching in English terminology). Then, the process is checked under vacuum using the following parameters: - production of oxidizing ions by application of an extraction voltage at the output of an ion source of electron cyclotron resonance type "ECR" (initials of Electron Cyclotron Resonance in English terminology), ion control in direction by magnetic sorting according to the mass / load ratio;

density of the ions at the level of the interaction zone of between 10 ¹² and 10 ¹⁷ ions / cm ² .s, and controlled by electric and / or magnetic fields for focusing the beam on the substrate;

- deceleration of these ions when approaching the silicon surface by the application of a deceleration voltage so that the ions come into contact with the substrate with a substantially zero speed. According to preferred characteristics:

- the oxidizing ions are O ²⁺ or O ³⁺ ions;

- the source produces ions whose kinetic energy is a few keV / q (q being the number of charges per ion), generally from 1 to 20 keV / q, and the values of the extraction voltages are of the order a few kilovolts;

- The density of the ion beam at the level of interaction with the substrate is between 10 ¹⁴ and 10 ¹⁷ ions / cm ² .s; - the application of electric and / or magnetic fields direct the ions towards the substrate;

- a fine selection of the ions in speed and in direction is carried out by filtering means of the bandpass or highpass type with an electric field, which selects the ions according to their kinetic energy, coupled to collimation means, which eliminate ions whose lateral velocity is greater than a certain threshold, constituted for example by a series of diaphragms of the order of a millimeter in diameter.

According to other preferred characteristics:

a device for controlling the uniformity of treatment of the ion substrate is placed in the reaction chamber;

- the residual gas contains oxygen at a partial pressure ranging between 10 ^"9 to 10 ^{" 5} Torr; - The silicon substrate is maintained under vacuum to receive a deposit of refractory oxide according to known methods.

Other characteristics and advantages of the invention will emerge from the detailed description which follows, relating to an embodiment, with reference to the appended figures which respectively represent, in addition to FIG. 1 relating to a sectional view of a setting device. implementation of an oxidation process according to the state of the art, and already commented on in the introductory part:

- Figure 2, a sectional view of the atomic structure of an example of silicon wafer grid oxide according to the invention; and

- Figure 3, a diagram showing the surface condition of the silicon wafer after hydrogenation;

- Figures 4a and 4b, two diagrams of the reaction mechanism on the atomic scale, relating to the formation of the oxide layer. FIG. 2 illustrates, as ideally shown without defect, the structure of an example of gate oxide according to the invention. Such an oxide comprises, on a substrate 100 formed of monocrystalline silicon, a layer of integral oxide of stoichiometry Si02 101 coupled to a non-stoichiometric intermediate layer 102. The intermediate layer constitutes a sub-stoichiometric interface composed of more or less complex Si bonds , SiO and Si0 ₂ , with charges on the silicon varying from +2 to +4, these bonds only involving silicon and oxygen. This interface is therefore free of other compounds which would be the threshold of constraints which may favor the anchoring of electrical charges, capable of disturbing the operation of the transistors or other components.

The stoichiometric layer 101 and the interface 102 have minimum thicknesses, which are substantially constant. These thicknesses are respectively around 1.4 to 1.5 A for the interface layer, and around 6 A for the entire oxide layer composed of the interface and the stoichiometric layer 101. To obtain such an oxide layer as thin as possible, it is possible to use, according to an example of the method of the invention, a beam of highly decelerated O ³⁺ oxygen ions when approaching the surface of a silicon substrate with a crystallographic plane 1-0-0, on which

5 a layer of gate oxide is to be formed.

To make such an oxide on a silicon wafer, the surface must first be cleaned. Indeed, it must be ensured that before oxidation, there are no residues left, or totally or partially oxidized oxide on the surface.

A cleaning by vacuum etching of the native oxide formed on the substrate is carried out in this implementation example, by reactive ion etching, known to those skilled in the art (abbreviated RIE, initials of Reactive lonic Etching in Anglo-Saxon terminology).

Then a hydrogenation is carried out using an acid bath

1.5 hydrofluoric acid and ammonium ions, producing a homogeneous monolayer formed only of hydrogen bonds on the surface, all the oxygen bonds on the surface having been replaced by hydrogen bonds. The diagram shown in FIG. 3 shows, on an atomic scale, the hydrogen bonds on the surface of the silicon wafer 100 after hydrogenation. 0 The actual oxidation phase is then undertaken.

It is carried out under high vacuum with precise monitoring of the reactions generated by the ions because the density per unit area, the direction, the energy and the charge of these ions are perfectly controlled. The residual gas contains oxygen at a partial pressure of 10 ^"7 Torr. 5 The O ³⁺ ions are generated by an ECR source with a kinetic energy of around ten keV / q (q being the number of charges per ion), more generally from 1 to 20 keV / q, the values of the extraction voltages being of the order of a few kilovolts. The density of the ion beam at the level of the interaction with the substrate, of approximately 10 ¹⁵ ions / cm ^2. S, is controlled at the level of the zone by a unipolar electrostatic lens for focusing the beam on the substrate. The application of a magnetic field by known means then directs the ions to the substrate.

A fine selection of the ions in speed and in direction is moreover carried out on the beam path by bandpass filtering means with electric field _t which selects the ions according to their kinetic energy. Collimation means eliminate ions whose lateral speed is above a certain threshold. These collimation means are constituted in this embodiment by a series of diaphragms of the order of a millimeter in diameter. A deceleration voltage of ten kilovolts is applied by the electric field of a capacitor.

With reference to the diagram of FIG. 4a, the decelerated ions O ³⁺ open the hydrogen bonds Si-H when approaching the passivated surface 100. These bonds become pendant. Oxygen ions bind to the hydrogen atoms H thus released to form hydroxide ions OH-, molecules of H ₂ 0 or combinations between these elements. The released species are pumped.

The oxygen ions, which constantly arrive at the approach of the surface 100 of the silicon wafer, attract the electrons of the silicon, the latter constituting an important reservoir of electrons. Silicon yields to ions

03+ a large quantity of electrons, which neutralize then negatively polarize these ions.

Also, for a population of around 50%, the oxygen ions become negative ions and come into contact with the surface with almost zero speed. These negative ions, extremely active, will then naturally fill as much as possible all the pendant bonds, opened by the first ions, because of their high oxidizing power and their eagerness to bind with silicon.

The surface is then, extremely rapidly, saturated with oxygen O ^" as illustrated in the diagram of FIG. 4b. It is thus formed, under the best conditions of speed and homogeneity, a quasi monolayer of SiO 2 of minimum thickness. The residual oxygen gas fills the unsaturated valence bonds which have been opened by the interaction of the ions as they approach the surface.

As soon as the surface is oxidized, the reaction stops by itself, due to the disappearance of the pendant hydrogen bonds and the saturation of the surface with oxygen.

The invention is not limited to the examples of implementation described or shown. It is for example possible to use any type of oxidizing ion, containing one or more oxygen atoms, or to form at least one additional insulating layer.

Claims

1. Method for producing a gate oxide on a 1-0-0 orientation semiconductor substrate (100) comprising a layer of integral silica bonded to the substrate through an interface layer, the integral layer (101) and the interface layer (102) having substantially constant minimum thicknesses, so that the gate oxide layer has an ultra thin thickness, characterized in that it consists of: - cleaning said substrate surface; - Passivate this surface using hydrogenation forming a hydrogen monolayer; - produce weakly and uniformly charged oxidizing ions under vacuum while retaining an oxidizing residual gas; and directing these ions towards said surface while controlling their charge, their density and their deceleration so that their speed is substantially zero in contact with said surface, so as to prevent any kinetic collision and to cause an opening of the pendant Si-H bonds to said surface with maximum saturation of the bonds opened by the oxidizing ions to form the oxide layer of minimum thickness. 2. Method for producing a gate oxide according to claim 1, in which a residual gas contains an oxidizing gas at a partial pressure of between 10 ^"5 and 10 ^{" 9} Torr. 3. Method for producing a gate oxide according to one of the preceding claims claim 1, in which the preliminary cleaning is carried out by RIE etching under vacuum of the native oxide formed on the substrate. 4. Method for producing a gate oxide according to one of the preceding claims, in which the production of oxidizing ions is generated by application of an extraction voltage at the output of an ion source of the type ECR, the control of the ions in the direction is carried out by magnetic sorting as a function of the mass / charge ratio, the density of the ions at the level of the interaction zone is between 10 ¹² and 10 ¹⁷ ions / cm ² .s and is controlled by electric and / or magnetic fields focusing the beam on the substrate, and the deceleration of these ions when approaching the silicon surface is caused by the application of a deceleration voltage so that the ions come into contact with the substrate with a substantially zero speed. 5. Method for producing a gate oxide according to claim 4, in which the oxidizing ions are O ²⁺ or O ³⁺ ions, the source produces ions whose kinetic energy is from 1 to 20 keV / q , the density of the ion beam at the level of the interaction with the substrate is between 10 ¹² and 10 ¹⁷ ions / cm ² .s, and a fine selection of the ions in speed and in direction is carried out by filtering means band pass or high pass type with electric field, which selects the ions according to their kinetic energy, coupled to collimation means, which eliminate the ions whose lateral speed is above a certain threshold. 6. A method of producing a gate oxide according to claim 3, wherein the collimation means consist of a series of diaphragms of the order of a millimeter in diameter. 7. A method of producing a gate oxide according to claim 4, in which a device for controlling the uniformity of treatment of the substrate is placed in the reaction chamber, and the substrate is maintained under vacuum to receive a deposit of refractory oxide according to known methods.