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WO2002056481A3 - Systeme et procede de mise en oeuvre d'un systeme de communication sans fil au moyen d'une puce reconfigurable avec matrice reconfigurable - Google Patents

Systeme et procede de mise en oeuvre d'un systeme de communication sans fil au moyen d'une puce reconfigurable avec matrice reconfigurable Download PDF

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Publication number
WO2002056481A3
WO2002056481A3 PCT/US2001/049436 US0149436W WO02056481A3 WO 2002056481 A3 WO2002056481 A3 WO 2002056481A3 US 0149436 W US0149436 W US 0149436W WO 02056481 A3 WO02056481 A3 WO 02056481A3
Authority
WO
WIPO (PCT)
Prior art keywords
reconfigurable
communication system
wireless communication
implementing
foreground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2001/049436
Other languages
English (en)
Other versions
WO2002056481A2 (fr
WO2002056481A9 (fr
Inventor
Daniel J Pugh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chameleon Systems Inc
Original Assignee
Chameleon Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chameleon Systems Inc filed Critical Chameleon Systems Inc
Priority to EP01998067A priority Critical patent/EP1336248A4/fr
Priority to AU2002249827A priority patent/AU2002249827A1/en
Publication of WO2002056481A2 publication Critical patent/WO2002056481A2/fr
Publication of WO2002056481A3 publication Critical patent/WO2002056481A3/fr
Anticipated expiration legal-status Critical
Publication of WO2002056481A9 publication Critical patent/WO2002056481A9/fr
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2201/00—Indexing scheme relating to details of transmission systems not covered by a single group of H04B3/00 - H04B13/00
    • H04B2201/69—Orthogonal indexing scheme relating to spread spectrum techniques in general
    • H04B2201/707—Orthogonal indexing scheme relating to spread spectrum techniques in general relating to direct sequence modulation
    • H04B2201/70707—Efficiency-related aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2201/00—Indexing scheme relating to details of transmission systems not covered by a single group of H04B3/00 - H04B13/00
    • H04B2201/69—Orthogonal indexing scheme relating to spread spectrum techniques in general
    • H04B2201/707—Orthogonal indexing scheme relating to spread spectrum techniques in general relating to direct sequence modulation
    • H04B2201/70707—Efficiency-related aspects
    • H04B2201/7071—Efficiency-related aspects with dynamic control of receiver resources

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Logic Circuits (AREA)
  • Transceivers (AREA)

Abstract

Cette invention concerne un système de communication sans fil pouvant être mis en oeuvre au moyen d'un ou de plusieurs microcircuits reconfigurables qui présentent des plans de reconfiguration avant et arrière. L'arrière-plan peut être chargé avec un algorithme de communication, une autre partie dudit algorithme étant configurée dans l'avant plan et fonctionnant au sein de la matrice reconfigurable. La commutation entre les configurations d'avant-plan et d'arrière-plan se fait pratiquement instantanément. Le système selon la présente invention se prête à la mise en oeuvre d'un système de communication complexe, tel qu'un récepteur de station de base pour un système de communication sans fil, ceci sur un petit microcircuit reconfigurable et non sur un prédiffusé programmable (FPGA) beaucoup plus gros.
PCT/US2001/049436 2000-10-27 2001-10-25 Systeme et procede de mise en oeuvre d'un systeme de communication sans fil au moyen d'une puce reconfigurable avec matrice reconfigurable Ceased WO2002056481A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP01998067A EP1336248A4 (fr) 2000-10-27 2001-10-25 Systeme et procede de mise en oeuvre d'un systeme de communication sans fil au moyen d'une puce reconfigurable avec matrice reconfigurable
AU2002249827A AU2002249827A1 (en) 2000-10-27 2001-10-25 System and method of implementing a wireless communication system using a reconfigurable chip with a reconfigurable fabric

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69907800A 2000-10-27 2000-10-27
US09/699,078 2000-10-27

Publications (3)

Publication Number Publication Date
WO2002056481A2 WO2002056481A2 (fr) 2002-07-18
WO2002056481A3 true WO2002056481A3 (fr) 2002-09-06
WO2002056481A9 WO2002056481A9 (fr) 2003-05-30

Family

ID=24807827

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/049436 Ceased WO2002056481A2 (fr) 2000-10-27 2001-10-25 Systeme et procede de mise en oeuvre d'un systeme de communication sans fil au moyen d'une puce reconfigurable avec matrice reconfigurable

Country Status (4)

Country Link
EP (1) EP1336248A4 (fr)
CN (1) CN1248417C (fr)
AU (1) AU2002249827A1 (fr)
WO (1) WO2002056481A2 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8380143B2 (en) 2002-05-01 2013-02-19 Dali Systems Co. Ltd Power amplifier time-delay invariant predistortion methods and apparatus
US7017140B2 (en) 2002-08-29 2006-03-21 Bae Systems Information And Electronic Systems Integration Inc. Common components in interface framework for developing field programmable based applications independent of target circuit board
US20040045007A1 (en) 2002-08-30 2004-03-04 Bae Systems Information Electronic Systems Integration, Inc. Object oriented component and framework architecture for signal processing
CN1703839B (zh) * 2002-10-07 2011-01-12 松下电器产业株式会社 通信装置和用于重新配置通信装置的方法
US7847730B2 (en) 2006-09-27 2010-12-07 Bae Systems Information And Electronic Systems Integration, Inc. Software defined navigation signal generator
WO2008078195A2 (fr) 2006-12-26 2008-07-03 Dali Systems Co., Ltd. Procédé et système permettant une linéarisation de prédistorsion en bande de base dans des systèmes de communication large bande à multiples canaux
CN103180844B (zh) 2010-08-17 2017-10-03 大力系统有限公司 用于分布式天线系统的中性主机架构
US8682338B2 (en) 2010-09-14 2014-03-25 Dali Systems Co., Ltd. Remotely reconfigurable distributed antenna system and methods
CN103383677B (zh) * 2012-05-03 2016-06-22 中国科学院电子学研究所 兼具无线配置和无线收发模式的无线可编程片上系统的方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0555103A (ja) * 1991-08-28 1993-03-05 Canon Inc 半導体製造装置
US5970254A (en) * 1997-06-27 1999-10-19 Cooke; Laurence H. Integrated processor and programmable data path chip for reconfigurable computing
US5999990A (en) * 1998-05-18 1999-12-07 Motorola, Inc. Communicator having reconfigurable resources
US6096091A (en) * 1998-02-24 2000-08-01 Advanced Micro Devices, Inc. Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0555103A (ja) * 1991-08-28 1993-03-05 Canon Inc 半導体製造装置
US5970254A (en) * 1997-06-27 1999-10-19 Cooke; Laurence H. Integrated processor and programmable data path chip for reconfigurable computing
US6096091A (en) * 1998-02-24 2000-08-01 Advanced Micro Devices, Inc. Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip
US5999990A (en) * 1998-05-18 1999-12-07 Motorola, Inc. Communicator having reconfigurable resources

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1336248A4 *

Also Published As

Publication number Publication date
WO2002056481A2 (fr) 2002-07-18
WO2002056481A9 (fr) 2003-05-30
CN1484887A (zh) 2004-03-24
EP1336248A4 (fr) 2005-04-20
CN1248417C (zh) 2006-03-29
EP1336248A2 (fr) 2003-08-20
AU2002249827A1 (en) 2002-07-24

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