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WO1999044231A1 - Appareil d'inspection de tranches a semi-conducteurs - Google Patents

Appareil d'inspection de tranches a semi-conducteurs Download PDF

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Publication number
WO1999044231A1
WO1999044231A1 PCT/GB1999/000536 GB9900536W WO9944231A1 WO 1999044231 A1 WO1999044231 A1 WO 1999044231A1 GB 9900536 W GB9900536 W GB 9900536W WO 9944231 A1 WO9944231 A1 WO 9944231A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
inspection machine
interface
inspection
accept
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/GB1999/000536
Other languages
English (en)
Inventor
Brian Davidson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Europe Ltd
Original Assignee
Shin Etsu Handotai Europe Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Europe Ltd filed Critical Shin Etsu Handotai Europe Ltd
Publication of WO1999044231A1 publication Critical patent/WO1999044231A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Definitions

  • the present invention relates to apparatus employed in the manufacture of wafers for use in the semiconductor industry, particularly, but not exclusively, silicon single crystal wafers. More particularly, the invention relates to improvements in apparatus for the inspection of wafers for quality control purposes during the manufacturing process .
  • the inspection of wafers commonly involves the use of different apparatus for checking different properties of the wafers, such as flatness, thickness, resistivity and surface defects. It is known to use a first item of equipment to check flatness, thickness and resistivity. An example of such equipment is known as the ADE 9600. It is also known to use a second item of equipment to perform automatic surface inspection of the wafer. An example of such equipment is known as an ORP .
  • the first item of equipment typically comprises: at least one station for receiving a batch of wafers which are to be inspected, the wafers being contained in cassettes or baskets, an alignment station at which individual wafers are aligned to a predetermined orientation (using the orientation flat or orientation notch which is formed in each wafer, as is well known in the art) ; at least one inspection station at which at least one inspection operation is carried out; at least one station for receiving wafers which are judged to be acceptable following inspection; at least one station for receiving wafers which are rejected following inspection; and robot handling means for transferring wafers between the various stations.
  • the second item of equipment typically comprises a camera unit, which is used to generate an image of the wafer under inspection, and a processor unit, which processes the image generated by the camera and makes a judgement as to whether the wafer ought to be accepted or rejected.
  • a wafer fails inspection by the visual inspection 3 machine, it can be rejected prior to further inspection by the first machine.
  • a manual "reject" signal is input to the first machine via a keypad by the operator and the wafer is transferred from the alignment station to the reject station by the robot handling means. If the wafer passes visual inspection by the visual inspection machine, a manual "accept” command is input to the first machine in a similar manner. The wafer is then transferred from the alignment station to the inspection station (s) and inspection by the first machine proceeds in the normal manner.
  • the first inspection machine and the visual inspection machine are quite separate items of equipment which are not designed to cooperate with one another and which are not directly connected to one another.
  • the arrangement described above enables the alignment system of the first machine to be employed for the purposes of the visual inspection system.
  • manual input is required to the first machine following visual inspection in order for the inspection process to proceed. This necessarily reduces the overall efficiency of the inspection process.
  • a wafer inspection system comprising: a first inspection machine including a wafer alignment station, at least one wafer inspection station, wafer loading, accept and reject stations and means for transferring wafers between said stations; and a visual inspection machine including a camera unit arranged to generate images of wafers located at the alignment station of said first inspection machine A and a processor unit connected to said camera unit and adapted to process said images and to generate accept and reject signals according to the result of said processing; characterised in that: the system further includes interface means interconnecting said first inspection machine and said processor unit of said visual inspection machine, said interface means being adapted to receive said accept and reject signals generated by said processor unit, to convert said signals into a format capable of interpretation by said first inspection machine, and to transmit said converted signals to said first inspection machine.
  • the system further includes sensor means associated with said alignment station and adapted to detect the presence of a wafer at said alignment station and to transmit a signal to said processor unit indicating the presence of a wafer at said alignment station.
  • said sensor means is connected to said processor unit via said interface means, said interface means including timer means adapted to send a start signal to said processor means after a predetermined time period has elapsed following receipt of said signal from said sensor means, said time period being selected to be sufficient to allow the wafer to be properly aligned at the alignment station.
  • said interface means is adapted to be connected to an existing I/O port of said processor unit and to an existing keypad connector port of said first inspection machine, and to convert said accept and reject signals received from said processor unit so as to mimic manually input keystrokes which would 5 normally be transmitted to said keypad connector port from a keypad.
  • interface apparatus for use in a wafer inspection system in accordance with the first aspect of the invention, comprising an interface unit including a first input means for receiving a first signal from a wafer detection sensor means, timer means responsive to said first signal for outputting a start signal after a predetermined time period following receipt of said first signal, a first output means for outputting said start signal, second and third input means for receiving respective accept and reject signals, first and second signal conversion means for converting said accept and reject signals into a format mimicking keypad keystrokes, and second output means for outputting said converted signals.
  • the interface apparatus further includes wafer detection sensor means adapted to be mounted on said alignment station of said first wafer inspection machine, said wafer detection sensor means being connected to said first input means of said interface unit.
  • the interface apparatus further includes connector means for connecting said first output means and said second and third input means to an I/O port of said visual inspection machine and for connecting said second output means to a keypad connector port of said first inspection machine.
  • Fig. 1 is a perspective view of wafer inspection apparatus incorporating an interface unit in accordance with the invention
  • Fig. 2 is a circuit diagram of the interface unit of Fig. 1.
  • a wafer inspection system includes a first wafer inspection machine, such as an ADE 9600, comprising a main wafer- handling and inspection unit 10 and a control console 12, and a visual inspection machine, such as an ORP, comprising a camera unit 14 and a processor unit 16.
  • the inspection unit 10 includes an alignment station 18, inspection station (s) 20, stations for receiving wafer cassettes 22, 24, 26 for loading batches of wafers into the unit 10 and for receiving accepted and rejected wafers, and a robot handling arm 28.
  • the visual inspection camera unit 14 is located over the alignment station 18 and is connected by a cable or the like (not shown) to the processor unit 16.
  • a wafer located at the alignment station 18 would be imaged by the camera unit 14 and the image would be processed by the processor unit 16, which would display an accept or reject signal depending on the outcome of the visual inspection.
  • An operator would then manually input a corresponding accept or reject signal to the first inspection machine 7 10, 12, by means of a keypad connected to a keypad port on the first machine.
  • an interface unit 30 which connects the visual inspection processor 16 directly to the first inspection machine 10, 12 so as to provide a greater degree of automation in the use of the overall inspection system.
  • the interface unit has a first input/output (I/O) port 32 connected by a first cable 34 to an existing I/O port (not shown) of the visual inspection processor unit, and a second I/O port 36 connected by a second cable 38 to an existing keypad connection port (not shown) of the first inspection machine 10,12.
  • I/O input/output
  • a sensor 40 which is mounted on or adjacent to the alignment station 18 of the first inspection machine 10 and which is adapted to detect the presence of a wafer at the alignment station.
  • the sensor 40 may be of any suitable type, such as an optical sensor.
  • the sensor 40 is also connected to the first I/O port of the interface unit 30, by a further cable indicated schematically by broken line 42.
  • the system in accordance with the invention operates as follows.
  • a batch of wafers is loaded into the first inspection machine 10.
  • the robot arm 28 transfers a first wafer to the alignment station 18.
  • the sensor 40 detects the presence of the wafer and transmits a signal to the interface unit 30 (input "OPTO" on I/O port 32, Fig. 2) .
  • the signal starts a timer (IC1 and associated circuitry, Fig. 2) in the interface unit 30.
  • the timer 8 provides a predetermined delay (suitably 20 seconds) while the wafer is aligned by the alignment station 18.
  • the timer Once the delay period has elapsed, the timer generates an output signal which energises a first relay 44, which in turn transmits a "Start" signal to the visual inspection processor 16.
  • Components IC4 serve to convert the transient output from the timer into a square wave suitable for controlling the relay 44.
  • the processor unit processes the image of the pre-aligned wafer generated by the camera unit 14, and generates either an Accept signal or a Reject signal depending on the results of the inspection process. These signals are transmitted via the I/O port of the processor unit 16 to respective pins of the first I/O port of the interface unit 30.
  • the Accept and Reject signals control the operation of respective pairs of ganged relays 46 and 48.
  • the relays are in turn connected to the second I/O port 36 of the interface unit 30, and thence to the keyboard connector port of the first inspection machine 10. In each case, one of the relays is normally closed and the other is normally open.
  • This arrangement enables the output signals from the interface unit 30 to the first inspection machine 10 to mimic the keystroke signals which the first inspection machine 10 would normally receive from a manually operated keypad; i.e. an Accept or Reject keystroke followed by an "Enter” or “Carriage Return” keystroke.
  • the invention thus allows the first inspection machine 10,12 and the visual inspection machine 14,16 to operate together in a fully integrated manner, without the need for manual intervention by an operator and without any modification of either of the inspection 9 machines 10,12 and 14,16, other than the mounting of the sensor 40 on the alignment station 18 of the first machine 10,12.
  • the function of the sensor 40 could be performed by a sensor forming an integral part of the first inspection machine. However, this would require a degree of internal modification of the first machine to enable such a sensor to communicate with the processor unit of the visual inspection machine.
  • the interface unit could also be incorporated into either the first inspection machine or the visual inspection machine. Again, this would require a degree of modification to the relevant machine.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

Système d'inspection pour tranches à semi-conducteurs, qui comporte une première machine d'inspection (10) comprenant un poste d'alignement (18) de tranches, au moins un poste d'inspection (20) de tranches, des postes de chargement, d'acceptation et de rejet de tranches, et des moyens (28) destinés à transférer les tranches entre lesdits postes, ainsi qu'une machine d'inspection visuelle comportant une caméra (14) disposée de manière à produire des images des tranches situées au poste d'alignement de la première machine d'inspection et un processeur (16) connecté à la caméra et adapté pour traiter lesdites images et produire des signaux d'acceptation et de rejet selon le résultat du traitement. Ledit système comporte en outre une interface (30) interconnectant la première machine d'inspection et le processeur de la machine d'inspection visuelle. Ladite interface est adaptée pour recevoir les signaux d'acceptation et de rejet produits par le processeur, pour convertir lesdits signaux dans un format que la première machine d'inspection sera capable d'interpréter et pour transmettre les signaux convertis à la première machine d'inspection. La présente invention concerne encore une interface destinée à être utilisée avec ledit système.
PCT/GB1999/000536 1998-02-25 1999-02-22 Appareil d'inspection de tranches a semi-conducteurs Ceased WO1999044231A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9803842.5 1998-02-25
GBGB9803842.5A GB9803842D0 (en) 1998-02-25 1998-02-25 Semiconductor wafer inspection apparatus

Publications (1)

Publication Number Publication Date
WO1999044231A1 true WO1999044231A1 (fr) 1999-09-02

Family

ID=10827484

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1999/000536 Ceased WO1999044231A1 (fr) 1998-02-25 1999-02-22 Appareil d'inspection de tranches a semi-conducteurs

Country Status (2)

Country Link
GB (1) GB9803842D0 (fr)
WO (1) WO1999044231A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004008118A1 (fr) * 2002-07-12 2004-01-22 Aoti Operating Company, Inc. Procede et appareil de detection
WO2004008119A1 (fr) * 2002-07-17 2004-01-22 Aoti Operating Company, Inc. Procede et appareil de detection
WO2004010121A1 (fr) * 2002-07-19 2004-01-29 Aoti Operating Company, Inc Procede de detection et dispositif correspondant

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644172A (en) * 1984-02-22 1987-02-17 Kla Instruments Corporation Electronic control of an automatic wafer inspection system
GB2197948A (en) * 1986-10-29 1988-06-02 Electroplating Eng Automatic inspection of ic lead frames
JPS63216354A (ja) * 1987-03-05 1988-09-08 Mitsubishi Electric Corp 半導体装置の外観検査装置
JPH09167788A (ja) * 1995-12-14 1997-06-24 Shin Etsu Handotai Co Ltd ウェーハの検査方法およびハンドリング装置
DE19610124A1 (de) * 1996-03-14 1997-09-18 Siemens Ag Einrichtung zur Überprüfung von elektrischen Bauteilen, insbesondere integrierten Schaltungen

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644172A (en) * 1984-02-22 1987-02-17 Kla Instruments Corporation Electronic control of an automatic wafer inspection system
GB2197948A (en) * 1986-10-29 1988-06-02 Electroplating Eng Automatic inspection of ic lead frames
JPS63216354A (ja) * 1987-03-05 1988-09-08 Mitsubishi Electric Corp 半導体装置の外観検査装置
JPH09167788A (ja) * 1995-12-14 1997-06-24 Shin Etsu Handotai Co Ltd ウェーハの検査方法およびハンドリング装置
DE19610124A1 (de) * 1996-03-14 1997-09-18 Siemens Ag Einrichtung zur Überprüfung von elektrischen Bauteilen, insbesondere integrierten Schaltungen

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 013, no. 005 (E - 701) 9 January 1989 (1989-01-09) *
PATENT ABSTRACTS OF JAPAN vol. 097, no. 010 31 October 1997 (1997-10-31) *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004008118A1 (fr) * 2002-07-12 2004-01-22 Aoti Operating Company, Inc. Procede et appareil de detection
WO2004008119A1 (fr) * 2002-07-17 2004-01-22 Aoti Operating Company, Inc. Procede et appareil de detection
WO2004010121A1 (fr) * 2002-07-19 2004-01-29 Aoti Operating Company, Inc Procede de detection et dispositif correspondant

Also Published As

Publication number Publication date
GB9803842D0 (en) 1998-04-22

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