TWI799710B - 用於基板表面處理之方法及裝置 - Google Patents
用於基板表面處理之方法及裝置 Download PDFInfo
- Publication number
- TWI799710B TWI799710B TW109118160A TW109118160A TWI799710B TW I799710 B TWI799710 B TW I799710B TW 109118160 A TW109118160 A TW 109118160A TW 109118160 A TW109118160 A TW 109118160A TW I799710 B TWI799710 B TW I799710B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrates
- surface treatment
- treatment
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/48—Ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Crystallography & Structural Chemistry (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Laminated Bodies (AREA)
- Physical Vapour Deposition (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| WOPCT/EP2014/063303 | 2014-06-24 | ||
| PCT/EP2014/063303 WO2015197112A1 (de) | 2014-06-24 | 2014-06-24 | Verfahren und vorrichtung zur oberflächenbehandlung von substraten |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202034392A TW202034392A (zh) | 2020-09-16 |
| TWI799710B true TWI799710B (zh) | 2023-04-21 |
Family
ID=50981536
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107142528A TWI698923B (zh) | 2014-06-24 | 2015-04-08 | 用於基板表面處理之群集裝置 |
| TW109118160A TWI799710B (zh) | 2014-06-24 | 2015-04-08 | 用於基板表面處理之方法及裝置 |
| TW104111308A TWI647751B (zh) | 2014-06-24 | 2015-04-08 | 基板表面處理之方法及裝置 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107142528A TWI698923B (zh) | 2014-06-24 | 2015-04-08 | 用於基板表面處理之群集裝置 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW104111308A TWI647751B (zh) | 2014-06-24 | 2015-04-08 | 基板表面處理之方法及裝置 |
Country Status (8)
| Country | Link |
|---|---|
| US (5) | US10083854B2 (zh) |
| EP (3) | EP4102544A1 (zh) |
| JP (1) | JP2017523603A (zh) |
| KR (2) | KR102306977B1 (zh) |
| CN (4) | CN111549328A (zh) |
| SG (1) | SG11201610455TA (zh) |
| TW (3) | TWI698923B (zh) |
| WO (1) | WO2015197112A1 (zh) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111549328A (zh) | 2014-06-24 | 2020-08-18 | Ev 集团 E·索尔纳有限责任公司 | 用于衬底的表面处理的方法和设备 |
| EP3238241B1 (de) | 2014-12-23 | 2020-03-04 | EV Group E. Thallner GmbH | Verfahren und vorrichtung zur vorfixierung von substraten |
| DE102015108901A1 (de) | 2015-06-05 | 2016-12-08 | Ev Group E. Thallner Gmbh | Verfahren zum Ausrichten von Substraten vor dem Bonden |
| US10373830B2 (en) * | 2016-03-08 | 2019-08-06 | Ostendo Technologies, Inc. | Apparatus and methods to remove unbonded areas within bonded substrates using localized electromagnetic wave annealing |
| JP2020508564A (ja) | 2017-02-21 | 2020-03-19 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | 基板を接合する方法および装置 |
| JP7182105B2 (ja) * | 2019-05-16 | 2022-12-02 | パナソニックIpマネジメント株式会社 | Iii族窒化物半導体デバイスの製造方法 |
| JP7424274B2 (ja) * | 2020-11-11 | 2024-01-30 | 株式会社Sumco | 貼り合わせウェーハ及び貼り合わせウェーハの製造方法 |
| KR20240087682A (ko) | 2021-10-19 | 2024-06-19 | 에베 그룹 에. 탈너 게엠베하 | 전자 구성요소의 생산 및 제조를 위한 방법 및 장치 |
| CN117916872A (zh) | 2021-10-19 | 2024-04-19 | Ev 集团 E·索尔纳有限责任公司 | 用于转移及准备组件的方法及装置 |
| FR3134227A1 (fr) * | 2022-04-04 | 2023-10-06 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de collage d’un premier substrat au niveau d’une surface présentant une nanotopologie élastique |
| CN120826767A (zh) | 2023-03-21 | 2025-10-21 | Ev 集团 E·索尔纳有限责任公司 | 用于对衬底进行表面处理的方法和用于将这种衬底与另外的衬底键合的方法以及用于执行这种方法的设备 |
| JP2025084380A (ja) * | 2023-11-22 | 2025-06-03 | 住友金属鉱山株式会社 | 接合半導体基板および接合半導体基板の製造方法 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030141502A1 (en) * | 2000-08-09 | 2003-07-31 | Ziptronix | Method of epitaxial-like wafer bonding at low temperature and bonded structure |
| US20070072391A1 (en) * | 2003-12-23 | 2007-03-29 | Commissariat A L'energie Atomique | Method of sealing two plates with the formation of an ohmic contact therebetween |
| US20110207293A1 (en) * | 2008-10-31 | 2011-08-25 | Thomas Signamarcheix | Method of producing a hybrid substrate having a continuous buried eectrically insulating layer |
| TW201308446A (zh) * | 2011-07-28 | 2013-02-16 | Soitec Silicon On Insulator | 轉移單晶半導體層至支撐基板之方法 |
| CN103460339A (zh) * | 2011-01-31 | 2013-12-18 | 须贺唯知 | 接合面制作方法、接合基板、基板接合方法、接合面制作装置以及基板接合体 |
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| JP2752371B2 (ja) | 1988-05-16 | 1998-05-18 | 株式会社日本自動車部品総合研究所 | 半導体装置の製造方法 |
| US5441776A (en) | 1993-11-08 | 1995-08-15 | Sterling; Rodney D. | Silicon dioxide bonding layers and method |
| JP2891093B2 (ja) * | 1994-02-17 | 1999-05-17 | 日本電気株式会社 | 半導体集積回路の製造方法 |
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| JP3003796B2 (ja) * | 1997-01-23 | 2000-01-31 | 日本電気株式会社 | Mos型半導体装置の製造方法 |
| DE19881924D2 (de) * | 1997-12-22 | 2001-01-04 | Unaxis Trading Ag Truebbach | Vakuumbehandlungsanlage |
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| FR2983342B1 (fr) | 2011-11-30 | 2016-05-20 | Soitec Silicon On Insulator | Procede de fabrication d'une heterostructure limitant la formation de defauts et heterostructure ainsi obtenue |
| SG186759A1 (en) * | 2012-01-23 | 2013-02-28 | Ev Group E Thallner Gmbh | Method and device for permanent bonding of wafers, as well as cutting tool |
| JP2013251405A (ja) * | 2012-05-31 | 2013-12-12 | Tadatomo Suga | 金属領域を有する基板の接合方法 |
| US9177780B2 (en) * | 2012-10-02 | 2015-11-03 | Applied Materials, Inc. | Directional SiO2 etch using plasma pre-treatment and high-temperature etchant deposition |
| JP5835200B2 (ja) * | 2012-12-04 | 2015-12-24 | 住友金属鉱山株式会社 | 表面電極付透明導電ガラス基板及びその製造方法、並びに薄膜太陽電池及びその製造方法 |
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| US9640510B2 (en) | 2013-07-05 | 2017-05-02 | Ev Group E. Thallner Gmbh | Method for bonding metallic contact areas with solution of a sacrificial layer applied on one of the contact areas |
| EP3859766A1 (de) | 2014-04-01 | 2021-08-04 | EV Group E. Thallner GmbH | Verfahren und vorrichtung zur oberflächenbehandlung von substraten |
| JP6211987B2 (ja) * | 2014-04-22 | 2017-10-11 | 株式会社神戸製鋼所 | Znめっき鋼板の熱間成形用金型 |
| CN111549328A (zh) * | 2014-06-24 | 2020-08-18 | Ev 集团 E·索尔纳有限责任公司 | 用于衬底的表面处理的方法和设备 |
| US10249498B2 (en) * | 2015-06-19 | 2019-04-02 | Tokyo Electron Limited | Method for using heated substrates for process chemistry control |
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2014
- 2014-06-24 CN CN202010552512.4A patent/CN111549328A/zh active Pending
- 2014-06-24 CN CN202210360120.7A patent/CN114695134A/zh active Pending
- 2014-06-24 EP EP22188480.2A patent/EP4102544A1/de active Pending
- 2014-06-24 CN CN202010552277.0A patent/CN111549327A/zh active Pending
- 2014-06-24 KR KR1020207029737A patent/KR102306977B1/ko active Active
- 2014-06-24 SG SG11201610455TA patent/SG11201610455TA/en unknown
- 2014-06-24 WO PCT/EP2014/063303 patent/WO2015197112A1/de not_active Ceased
- 2014-06-24 EP EP14732219.2A patent/EP3161855B9/de active Active
- 2014-06-24 KR KR1020167035007A patent/KR102182789B1/ko active Active
- 2014-06-24 JP JP2016572535A patent/JP2017523603A/ja active Pending
- 2014-06-24 EP EP17164931.2A patent/EP3217421A1/de not_active Ceased
- 2014-06-24 US US15/315,900 patent/US10083854B2/en active Active
- 2014-06-24 CN CN201480079844.8A patent/CN107078028A/zh active Pending
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2015
- 2015-04-08 TW TW107142528A patent/TWI698923B/zh active
- 2015-04-08 TW TW109118160A patent/TWI799710B/zh active
- 2015-04-08 TW TW104111308A patent/TWI647751B/zh active
-
2018
- 2018-08-22 US US16/108,719 patent/US10490439B2/en active Active
-
2019
- 2019-09-25 US US16/581,851 patent/US10796944B2/en active Active
-
2020
- 2020-08-31 US US17/007,082 patent/US11348825B2/en active Active
-
2022
- 2022-03-14 US US17/693,812 patent/US11776842B2/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030141502A1 (en) * | 2000-08-09 | 2003-07-31 | Ziptronix | Method of epitaxial-like wafer bonding at low temperature and bonded structure |
| TW556251B (en) * | 2000-08-09 | 2003-10-01 | Ziptronix Inc | a method of epitaxial-like wafer bonding at low temperature and bonded structure |
| US20070072391A1 (en) * | 2003-12-23 | 2007-03-29 | Commissariat A L'energie Atomique | Method of sealing two plates with the formation of an ohmic contact therebetween |
| US20110207293A1 (en) * | 2008-10-31 | 2011-08-25 | Thomas Signamarcheix | Method of producing a hybrid substrate having a continuous buried eectrically insulating layer |
| CN103460339A (zh) * | 2011-01-31 | 2013-12-18 | 须贺唯知 | 接合面制作方法、接合基板、基板接合方法、接合面制作装置以及基板接合体 |
| TW201308446A (zh) * | 2011-07-28 | 2013-02-16 | Soitec Silicon On Insulator | 轉移單晶半導體層至支撐基板之方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20200020572A1 (en) | 2020-01-16 |
| EP3217421A1 (de) | 2017-09-13 |
| EP3161855A1 (de) | 2017-05-03 |
| US10083854B2 (en) | 2018-09-25 |
| KR20200122410A (ko) | 2020-10-27 |
| TW201907461A (zh) | 2019-02-16 |
| TWI698923B (zh) | 2020-07-11 |
| US10490439B2 (en) | 2019-11-26 |
| EP4102544A1 (de) | 2022-12-14 |
| TW201601207A (zh) | 2016-01-01 |
| EP3161855B9 (de) | 2018-04-11 |
| KR20170023820A (ko) | 2017-03-06 |
| WO2015197112A1 (de) | 2015-12-30 |
| JP2017523603A (ja) | 2017-08-17 |
| CN114695134A (zh) | 2022-07-01 |
| CN111549328A (zh) | 2020-08-18 |
| CN107078028A (zh) | 2017-08-18 |
| US20200402840A1 (en) | 2020-12-24 |
| US11348825B2 (en) | 2022-05-31 |
| KR102182789B1 (ko) | 2020-11-26 |
| SG11201610455TA (en) | 2017-01-27 |
| TW202034392A (zh) | 2020-09-16 |
| US20180366366A1 (en) | 2018-12-20 |
| EP3161855B1 (de) | 2017-12-20 |
| CN111549327A (zh) | 2020-08-18 |
| US20170098572A1 (en) | 2017-04-06 |
| KR102306977B1 (ko) | 2021-09-30 |
| US11776842B2 (en) | 2023-10-03 |
| US20220216098A1 (en) | 2022-07-07 |
| US10796944B2 (en) | 2020-10-06 |
| TWI647751B (zh) | 2019-01-11 |
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