[go: up one dir, main page]

TWI258635B - Undercoating material for wiring, embedded material, and wiring formation method - Google Patents

Undercoating material for wiring, embedded material, and wiring formation method Download PDF

Info

Publication number
TWI258635B
TWI258635B TW092133232A TW92133232A TWI258635B TW I258635 B TWI258635 B TW I258635B TW 092133232 A TW092133232 A TW 092133232A TW 92133232 A TW92133232 A TW 92133232A TW I258635 B TWI258635 B TW I258635B
Authority
TW
Taiwan
Prior art keywords
photoresist
layer
forming
pattern
film
Prior art date
Application number
TW092133232A
Other languages
Chinese (zh)
Other versions
TW200416482A (en
Inventor
Etsuko Nakamura
Kazumasa Wakiya
Original Assignee
Tokyo Ohka Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2002343869A external-priority patent/JP3914492B2/en
Priority claimed from JP2002343867A external-priority patent/JP3914490B2/en
Priority claimed from JP2002343868A external-priority patent/JP3914491B2/en
Priority claimed from JP2002343870A external-priority patent/JP3914493B2/en
Application filed by Tokyo Ohka Kogyo Co Ltd filed Critical Tokyo Ohka Kogyo Co Ltd
Publication of TW200416482A publication Critical patent/TW200416482A/en
Application granted granted Critical
Publication of TWI258635B publication Critical patent/TWI258635B/en

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/091Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/11Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/075Silicon-containing compounds
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S430/00Radiation imagery chemistry: process, composition, or product thereof
    • Y10S430/145Infrared
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S430/00Radiation imagery chemistry: process, composition, or product thereof
    • Y10S430/146Laser beam

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Materials For Photolithography (AREA)

Abstract

This invention provides an undercoating layer material and a filler material containing a resin component having at least a substituent group which is capable of releasing a terminal group to form a sulfonic acid residue upon application of predetermined energy, and a solvent. The resin component has at least a repeating unit represented by formula (1), wherein n is an integer of 1 or more, X represents a C1 to C10 linear or branched alkyl chain, an aromatic or alicyclic alkyl chain or an alkyl ester chain, and Y is a substituent group forming a sulfonic acid residue upon application of predetermined energy.

Description

1258635 (1) 玫、發明說明 【發明所屬之技術領域】1258635 (1) Rose, invention description [Technical field to which the invention belongs]

本發明係有關於’形成電路於半導體基板上之際適用 的下層膜形成材料、包埋材料、及使用其之電路形成方法 。在此下層膜指,(a )形成光阻層於基板上前先形成於 該基板上’光阻圖型化時可防曝光光之來自基板面的反射 光射入光阻,提升圖型之解析度的下層膜,(b)其特徵 爲:用以形成電路之微影術用之光阻層由有機膜所成之下 層膜及含矽之上層光阻膜二層構成,以提高光阻之圖型精 度的含矽二層光阻合適下層膜,(c)其特徵爲:用以形 成電路之微影術用光阻層具至少由有機膜所成之下層膜、 中間層膜及光阻上層膜所成之多層構造,以提高光阻的圖 型精度之多層光阻製程的合適下層膜。而包埋材料指 )用以形成至少由形成於基板上之低介電體層之第一蝕刻 空間及連通該第一蝕刻空間同時與該第一蝕刻空間形狀及 尺寸不同之第二蝕刻空間構成的雙大馬士革構造之蝕刻空 間包埋材料。 【先前技術】 如所周知,半導體基板係於矽晶圓等基板上層合有介 電體層(絕緣體層)而成,藉由圖型化於該半導體基板之 上述介電體層中之導體層(電路層)之形成,構成半導體 電路構造。 上述電路層之形成,有大別爲二之方法的採用。第一方 -5 - (2) 1258635 法係,於上述介電體層上均勻形成導體層,於該導體層上形 成光阻,以圖型光照射(曝光)該光阻經顯像形成光阻圖 型,以該光阻圖型爲遮罩,以蝕刻處理將上述導體層圖型化 形成電路層,去除上述光阻圖型後,更層合以介電體層,於 介電體層中構成電路層。The present invention relates to an underlayer film forming material, an embedding material, and a circuit forming method using the same for forming a circuit on a semiconductor substrate. In the lower layer film, (a) the photoresist layer is formed on the substrate before forming the photoresist layer. When the photoresist pattern is formed, the reflected light from the substrate surface can be prevented from entering the photoresist, and the pattern is improved. The lower layer film of resolution, (b) is characterized in that: the photoresist layer for lithography used to form the circuit is composed of a film formed by an organic film and a layer of a photoresist layer containing a top layer of germanium to improve the photoresist The pattern-accuracy of the second layer of photoresist is suitable for the underlayer film, and (c) is characterized in that the photoresist layer for lithography used to form the circuit has at least an underlayer film, an interlayer film and light formed by the organic film. A suitable underlayer film of a multilayer photoresist process that resists the multilayer structure of the upper film to improve the pattern accuracy of the photoresist. The embedding material is configured to form a first etching space formed by at least a low dielectric layer formed on the substrate, and a second etching space that communicates with the first etching space and is different in shape and size from the first etching space. Double Damascus structured etching space embedding material. [Prior Art] As is well known, a semiconductor substrate is formed by laminating a dielectric layer (insulator layer) on a substrate such as a germanium wafer, and patterned by a conductor layer in the dielectric layer of the semiconductor substrate (circuit The formation of the layer constitutes a semiconductor circuit structure. The formation of the above circuit layer has the use of a method that is quite different. The first side-5 - (2) 1258635 method, uniformly forming a conductor layer on the dielectric layer, forming a photoresist on the conductor layer, and irradiating (exposing) the photoresist by pattern light to form a photoresist In the pattern, the photoresist pattern is used as a mask, and the conductor layer is patterned into a circuit layer by etching, and after removing the photoresist pattern, a dielectric layer is further laminated to form a circuit in the dielectric layer. Floor.

第二方法係,於上述介電體層上形成光阻圖型,以該光 阻圖型爲遮罩,經蝕刻處理形成電路溝(trench )於上述介 電體層中,去除上述光阻圖型後,包埋導體材料於電路溝中 ,於其上層合以介電體層,形成半導體電路構造。 電路構造之多層化時,係重複上述各方法之電路層形成 過程,層合多數電路層,各電路層形成過程之間,即須有介 層電路形成過程。該介層電路形成過程係於作爲下部電路層 與上部電路層之間的層間絕緣層之介電體層形成介層孔,於 該介層孔以氣相法沈積導體材料,或包埋導體材料,以形成 電連接下部電路層及上部電路層的介層電路之過程。In a second method, a photoresist pattern is formed on the dielectric layer, and the photoresist pattern is used as a mask, and a circuit trench is formed in the dielectric layer by etching to remove the photoresist pattern. The conductor material is embedded in the circuit trench, and the dielectric layer is laminated thereon to form a semiconductor circuit structure. In the multilayering of the circuit structure, the circuit layer forming process of each of the above methods is repeated, and a plurality of circuit layers are laminated, and a circuit formation process is required between the circuit layer forming processes. The via circuit forming process is formed by forming a via hole as a dielectric layer of an interlayer insulating layer between the lower circuit layer and the upper circuit layer, and depositing the conductor material or embedding the conductor material in a vapor phase manner in the via hole. To form a process of electrically connecting the lower circuit layer and the via circuit of the upper circuit layer.

利用上述二電路形成方法之任一時皆係,將光阻層曝光 而圖型化時曝光光透過光阻層,其透過光於下層表面反射, 產生反射光射入光阻層的不應曝光部份之現象。因該反射光 之射入光阻層,光阻之圖型解析度惡化。因而,向來有形成 光阻層於半導體基板上之前,以含具吸收曝光光之特性的材 料之樹脂組成物塗布於基板上形成下層膜,於該下層膜之上 形成光阻層的方法之採用。著眼於此下層膜之該目標作用, 其亦被稱作反射防止膜。 該反射防止膜之材料,向來有種種提議。例如,如曰本 -6- (3) 1258635 專利特開平10 - 319601號公報所記載,有含有異氰酸酯基及 溶劑之樹脂組成物的提議。 又,如特表2 0 0 0 — 5 1 2 3 3 6號公報所記載,有光吸收性聚 合物之開發,該聚合物含具羥基苯乙烯單乙之聚合物,該單 兀具有含磺酸酯之特定取代基。如特表2000 - 512402號公報 所記載,有含上述光吸收性聚合物及溶劑而成的反射防止膜 形成材料之提議。 而具曝光光之反射防止特性的下層膜,於主要目的之反 射防止特性以外,必須有以光阻圖型爲遮罩,其下部導體層 或介電體層之蝕刻處理結束後,可藉其手段去除之特性。 如此,從發揮反射防止膜之功能後下層膜的去除之觀點 ,試探討上述習知下層膜,則首先上述特開平10 一 3 19601號 公報所揭示之反射防止膜材料,樹脂成分係用有異氰酸酯基 之聚合物,該樹脂成分不溶於光阻用之剝離液。因此,該特 開平10 — 3 19601號公報所揭示之技術係,上層光阻圖型以剝 離液去除後,殘留之下層膜則施以〇2電漿打磨去除。 上述特表2000— 512336號公報及特表2000-51 2402號公 報所揭示之樹脂成分,亦不溶於光阻用剝離液,以剝離液去 除光阻圖型後,仍係藉〇2電漿打磨去除殘留之下層膜。 如所周知,半導體電路構造中,覆蓋電路層以與其它電 路層電阻層之介電體層,爲不影響電路層之電特性,須盡可 能具低電容率。該介電體的電容率低者,具體而言,電容率 k在3.0以下者已漸成主流。如此的低電容率之材料對02電漿 打磨之耐抗性低,經暴露於〇2電漿’表面易於劣化,有電 -7- (4) 1258635 容率之加大等。 於使用如此之低介電體層的半導體基板形成上述習知反 射防止膜,形成電路層時,經用以去除反射防止膜之〇2電 漿打磨滲蝕介電體層等,易起其電容率加大之劣化,結果, 有於電路層之電特性產生不良影響之問題。 半導體電路構造體之製造當中,如上述,爲於半導體上 經蝕刻形成電路層,形成包埋電路層用之電路溝,以微影術 作光阻、下層膜之圖型化。該微影過程之控制因子有,產生 曝光光的步進機之電流値、電壓値之控制、鏡頭之焦距的調 整、光罩之精度、安裝位置精度、以及光阻組成物之塗布特 性、硬化特性等諸多因子存在,這些控制因子因某原因變動 ,則會發生圖型化不良,須修正微影過程。此時,將半導體 基板廢棄,使用新半導體基板,則浪費資源,並對環境有不 良影響。因此,相關製程中,微影術進行不完美之光阻層及 下層膜須予去除,回收半導體基板。如此的半導體基板之再 生、回收過程中,下層膜之去除處理稱爲再加工處理,考慮 半導體電路構造體的製造之經濟性時,乃重要之處理過程。 從如此的再加工處理之觀點探討上述習知反射防止膜,則習 知反射防止膜,其去除非用02電漿打磨不可,有再加工處 理後半導體基板之特性於劣化之問題而不適當。 另一方面,如上述之具電路構造的裝置,高積體化已係 經常性課題,有電路的更微細化之要求。電路之微細化必須 提升微影用之光阻的圖型解析度,並提升以曝光得之光阻圖 型作爲遮罩的蝕刻之電路層或電路溝的圖型解析度。光阻層 -8- (5) 1258635 之膜厚愈薄,愈能提升使用曝光裝置及電路圖型光罩於光阻 轉印圖型之精度。另一方面,光阻層之膜厚若薄,則以光阻 圖型爲遮罩的下層之蝕刻過程中,難以保持光阻層的光阻耐 抗性,易對蝕刻之電路層或電路溝之解析度有不良影響。爲 提高光阻耐抗性、膜厚以偏厚爲佳。如此,爲使用光阻之微 影精度的提高,光阻膜厚之設定,有背道而馳之要求。解決 讓問題,提高使用光阻的微影精度之技術,有使用含矽之二 層光阻的電路形成方法,及使用多層光阻的電路形成方法( 特開平10 — 92740號公報)之提供。 上述前者之電路形成方法,光阻並非單層,而係以二層 構造,光阻膜厚增厚同時圖型轉印精度提高之微影技術。該 技術首先係於基板上形成有機高分子材料所成的厚膜之下層 膜,於其上形成氧電漿蝕刻耐抗性高的含矽光阻材料所成之 薄膜的光阻上層膜。然後,轉印電路圖型於光阻上層膜,形 成上層光阻圖型。其次,以所得上層光阻圖型爲遮罩,以氧 電漿蝕刻將光阻下層膜圖型化。以此,可得全體膜厚較厚, 而圖型轉印精度高之光阻膜。 上述含有矽之二層光阻的構成材料,有例如,特開2002 — 033257號公報之揭示。該特開2002 — 033257號公報中,下 層膜稱爲第一光阻層,上層光阻層稱作第二光阻層。 上述第一光阻層之構成材料,一般係用淸漆樹脂、酚樹 脂、甲酚樹脂等縮合高分子化合物,側鏈有苯基等芳環、或 萘基、蒽基等縮合芳環之乙烯基聚合物,並亦適用於各種習 知光阻。 -9- (6) 1258635 又有,用於上述第二光阻層之含矽感光性組成物,可用 已知物之陳述。 而上述含矽二層光阻製程,係以其光阻圖型爲遮罩,其 下部之導體層或介電體層之蝕刻處理結束後,須以某手段去 除。特開2002 - 03 3 25 7號公報中,係以該專利特有之濕式剝 離處理去除含矽之上層光阻膜,殘留之下層膜以02電漿打 磨去除。 如所周知,半導體電路構造中,覆蓋電路層以與其它電 路層電隔離之介電體層,爲不於電路層有電特性之影響,須 具層可能低之電容率。該介電體的電容率低者,具體而言, 電容率k在3.0以下者已漸成主流。如此之低電容率的材料, 對〇2電漿打磨之耐抗性低,經暴露於〇2電漿,表面容易劣 化,電容率亦加大。 於使用如此之低介電體層的半導體基板形成上述習知含 矽二層光阻所成之光阻圖型,形成電路層時,因用以去除基 板上之下層膜的〇2電漿打磨介電體層被滲蝕,其電容率加 大之劣化容易發生,結果,有於電路層之電特性產生不良影 響之問題。 又,半導體電路構造體之製造當中,如上述,爲於半導 體上經蝕刻形成電路層,並形成包埋電路層用之電路溝,係 以光阻,下層膜之微影加工進行圖型化。該微影過程之控制 因子,有產生曝光光之步進機的電流値、電壓値之控制,透 鏡焦距之調整,光阻之粗度,其安裝位置精度,以及光阻組 成物之塗布特性,硬化特性等諸多因子存在,這些控制因子 -10 - (7) 1258635 由於某原因而變動,圖型化即不良,產生必須矯正微影過程 之情況。此時,將半導體基板廢棄,使用新的半導體基板, 則浪費資源並對環境有不良影響。因此,相關製程中,微影 進行不順之光阻層及下層膜須予以除,回收半導體基板。如 此的半導體基板之再生、回收過程的下層膜去除處理稱爲再 加工處理,考慮半導體電路構造體之製造的經濟性時,係重 要處理過程,從如此之再加工處理之觀點探討上述習知下層 膜,則習知下層膜之去除非用〇2電漿打磨不可,有再加工 處理後半導體基板特性易於劣化之問題而不適當。 而光阻層實質上係二層構造之技術,不同於使用上述含 矽二層光阻之技術,已知有爲防曝光光之反射,於光阻層下 設下層膜之技術。該下層膜係由曝光光之吸收特性高的樹脂 組成物構成,吸收上層光阻之圖型化光以免其抵達基板面, 獲致不產生曝光光之反射光的效果。形成該下層膜之材料應 亦可轉用以形成上述含矽二層光阻之下層膜。假如該反射防 止膜可不用〇2電漿打磨去除,則使用上述含矽二層光阻的 電路形成方法之問題即可解決。 上述反射防止膜之材料,向來有種種材料之提議。例如 有,含具亞胺基磺酸基之聚合物及溶劑的樹脂組成物之提議 (特開平10 — 319601號公報)。 並有含具羥基苯乙烯單元之聚合物的光吸收性聚合物之 開發,該單元具有含磺酸酯之特定取代基(特表2000 -5 1 2336號公報),含該光吸收性聚合物及溶劑之反射防止 膜形成材料之提議(特表2000 — 5124〇2號公報)。 • 11 - (8) 1258635 揭示於上述特開平1〇 - 3 19601號公報之反射防止膜材料 ,樹脂成分係用有亞胺基磺酸基之聚合物,該樹脂成分不溶 於光阻用之剝離液。因此,揭示於該特開平10 - 3 19601號公 報之技術係,以剝離液去除上層之光阻圖型後,殘留之下層 膜施以〇2電漿打磨去除。 又,上述特表2000 — 5 12336號公報及特表2000 — 512402 號公報揭示之樹脂成分皆不爲光阻用剝離液所溶,以剝離液 去除光阻圖型後仍須以〇2電漿打磨去除殘餘之下層膜。 因此,將習知反射防止膜轉用於含矽二層光阻之下層膜 ,伴隨下層膜之去除的問題仍無法解決。 上述的後者之電路形成方法(特開平10 - 92740號公報 ),亦即,多層光阻製程,因光阻並非單層,係以多層構 造爲之,(1)最初將圖型由光罩轉印之最上層光阻薄膜, 微影術中之分解能及聚焦深度一倂改善,(2 )上述最上層 膜之下,形成有多層的薄膜干涉效果小,抗鈾刻性高之反射 防止膜等,可得圖型轉印精度高,乾式鈾刻耐抗性優之光阻 圖型的技術。該技術首先係於基板上形成複合反射防止膜。 該複合反射防止膜係例如由碳膜及矽氧化膜構成,必要時於 這些之間設氮化矽阻障層之多層膜。於該多層膜上形成膜厚 薄之光阻上層膜。然後,以微影術將電路圖型轉印於光阻上 層膜,形成上層光阻圖型。其次,以所得上層光阻圖型爲遮 罩,蝕刻加工中間層矽氧化膜,將上述圖型轉印。繼之,以 上述上層光阻圖型及中間層圖型爲遮罩,蝕刻加工下層膜碳 膜,將電路圖型轉印。最後去除上述上層光阻圖型及中間層 - 12- 1258635 Ο) 圖型,得抗乾式蝕刻性良好,圖型轉印精度高之碳膜(下層 膜)圖型。以該下層膜圖型碳膜圖型作爲遮罩,依圖型蝕 刻基板。 而上述多層光阻內,最後殘留之下層膜(碳膜)圖型 ,其下部之導體層或介電體層之蝕刻加工的圖型化結束時, 須以某手段去除。特開平1〇 - 92740號公報係以〇2電漿打磨 去除。 如所周知,半導體電路構造中,覆蓋電路層作電路層間 · 之電隔離的介電體層,爲不於電路層之電特性造成影響,須 胃 盡可能具低電容率。該介電體的電容率之低,具體而言,電 容率k須在3.0以下。而如此之低電容率材料,對〇2電漿打磨 耐抗性低,暴露於〇2電漿,表面即容易劣化,電容率亦加 大0In any of the above two circuit forming methods, when the photoresist layer is exposed and patterned, the exposure light is transmitted through the photoresist layer, and the transmitted light is reflected on the surface of the lower layer to generate an unexposed portion in which the reflected light is incident on the photoresist layer. The phenomenon of share. As the reflected light enters the photoresist layer, the pattern resolution of the photoresist deteriorates. Therefore, before the photoresist layer is formed on the semiconductor substrate, a resin composition containing a material having the property of absorbing exposure light is applied onto the substrate to form an underlayer film, and a method of forming a photoresist layer on the underlayer film is employed. . Focusing on this target action of the underlying film, it is also referred to as an anti-reflection film. There are various proposals for the material of the antireflection film. For example, there is a proposal for a resin composition containing an isocyanate group and a solvent as described in JP-A-6-319601. Further, as disclosed in JP-A-2-200- 5 1 2 3 3, there is development of a light-absorbing polymer containing a polymer having a hydroxystyrene monoethyl group having a sulfonate. Specific substituents for the acid ester. As disclosed in Japanese Laid-Open Patent Publication No. 2000-512402, there is a proposal for forming an antireflection film forming material comprising the above light absorbing polymer and a solvent. The underlayer film having the reflection preventing characteristic of the exposure light must have a photoresist pattern as a mask in addition to the reflection preventing property of the main purpose, and the etching process of the lower conductor layer or the dielectric layer may be completed by means of the method. Remove the characteristics. In the above-mentioned conventional underlayer film, the anti-reflection film material disclosed in Japanese Laid-Open Patent Publication No. Hei No. Hei. No. Hei. No. Hei. The base polymer is insoluble in the stripping solution for photoresist. Therefore, in the technique disclosed in Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. Hei. No. 10-19601, after the upper photoresist pattern is removed by the stripping liquid, the remaining underlayer film is removed by plasma polishing. The resin component disclosed in the above-mentioned JP-A-2000-512336 and JP-A-2000-51 2402 is also insoluble in the resist stripping solution, and after removing the photoresist pattern by the stripping solution, it is still polished by the 电2 plasma. The residual underlayer film is removed. As is well known, in the construction of a semiconductor circuit, the dielectric layer covering the circuit layer and the other circuit layer resistive layer should have a low permittivity as much as possible without affecting the electrical characteristics of the circuit layer. When the permittivity of the dielectric body is low, specifically, the permittivity k is 3.0 or less. Such a low-permittivity material has low resistance to 02 plasma grinding, and is easily deteriorated upon exposure to the 〇2 plasma's surface, and has an increased capacity of -7-(4) 1258635. The above-mentioned conventional anti-reflection film is formed on a semiconductor substrate using such a low dielectric layer, and when the circuit layer is formed, the dielectric layer is etched by the plasma for removing the anti-reflection film, and the permittivity is increased. The deterioration is large, and as a result, there is a problem that the electrical characteristics of the circuit layer are adversely affected. In the manufacture of a semiconductor circuit structure, as described above, a circuit layer is formed by etching on a semiconductor to form a circuit trench for embedding a circuit layer, and a pattern of a photoresist and a lower film is formed by lithography. The control factors of the lithography process include the current 値 of the stepper for generating exposure light, the control of the voltage 値, the adjustment of the focal length of the lens, the accuracy of the reticle, the accuracy of the mounting position, and the coating characteristics of the photoresist composition, and hardening. There are many factors such as characteristics. If these control factors change for some reason, the patterning will occur and the lithography process must be corrected. At this time, when the semiconductor substrate is discarded and a new semiconductor substrate is used, resources are wasted and the environment is adversely affected. Therefore, in the related process, the imperfect photoresist layer and the underlying film are removed by lithography, and the semiconductor substrate is recovered. In the process of regenerating and recovering such a semiconductor substrate, the removal process of the underlayer film is referred to as a rework process, and an important process is considered in consideration of the economics of the manufacture of the semiconductor circuit structure. When the above-mentioned conventional antireflection film is examined from the viewpoint of such rework processing, a conventional antireflection film is not required, and it is not preferable to remove the non-used 02 plasma, and the characteristics of the semiconductor substrate after the reprocessing are not deteriorated. On the other hand, in the above-described apparatus having a circuit structure, high integration has been a frequent problem, and there is a demand for further miniaturization of circuits. The miniaturization of the circuit must improve the pattern resolution of the photoresist for lithography and enhance the pattern resolution of the etched circuit layer or circuit trench using the exposed photoresist pattern as a mask. Photoresist layer -8- (5) The thinner the film thickness of 1258635, the better the accuracy of using the exposure device and the circuit pattern mask on the photoresist transfer pattern. On the other hand, if the film thickness of the photoresist layer is thin, it is difficult to maintain the photoresist resistance of the photoresist layer during the etching process of the lower layer with the photoresist pattern as a mask, and it is easy to etch the circuit layer or circuit trench. The resolution has an adverse effect. In order to improve the resistance to light resistance, the film thickness is preferably thick. Thus, in order to improve the precision of the lithography using the photoresist, the setting of the thickness of the photoresist film has a contrary requirement. The technique for improving the lithography accuracy of the use of the photoresist is provided by a circuit forming method using a two-layer photoresist including a germanium, and a circuit forming method using a multilayer photoresist (Japanese Laid-Open Patent Publication No. Hei No. Hei No. Hei No. Hei No. Hei No. Hei No. Hei. In the circuit forming method of the former, the photoresist is not a single layer, but is a two-layer structure, and the photoresist film is thickened while the pattern transfer precision is improved. The technique is firstly to form a thick film underlayer film formed of an organic polymer material on a substrate, and a photoresist upper film formed of a film containing a ruthenium-containing photoresist having high resistance to oxygen plasma etching is formed thereon. Then, the transfer circuit pattern is formed on the photoresist upper film to form an upper photoresist pattern. Next, the resulting upper photoresist pattern is used as a mask, and the photoresist underlayer film is patterned by oxygen plasma etching. As a result, a photoresist film having a large thickness and a high pattern transfer precision can be obtained. The constituent material of the above-mentioned two-layered photoresist containing ruthenium is disclosed, for example, in JP-A-2002-033257. In Japanese Laid-Open Patent Publication No. 2002-033257, the underlayer film is referred to as a first photoresist layer, and the upper photoresist layer is referred to as a second photoresist layer. The constituent material of the first photoresist layer is generally a condensed polymer compound such as enamel resin, phenol resin or cresol resin, and an aromatic ring such as a phenyl group or a condensed aromatic ring such as a naphthyl group or a fluorenyl group in the side chain. Base polymers are also suitable for use in a variety of conventional photoresists. -9- (6) 1258635 Further, a ruthenium-containing photosensitive composition for the above second photoresist layer can be represented by a known one. The above-mentioned germanium-containing two-layer photoresist process is masked by its photoresist pattern, and after the etching process of the lower conductor layer or the dielectric layer is completed, it must be removed by some means. In Japanese Laid-Open Patent Publication No. 2002- 03 3 25 No. 7, a photoresist film having a top layer containing ruthenium is removed by a wet stripping treatment peculiar to the patent, and the remaining underlayer film is removed by grinding with 02 plasma. As is well known, in semiconductor circuit construction, the dielectric layer covering the circuit layer electrically isolated from other circuit layers is not affected by the electrical characteristics of the circuit layer, and may have a low permittivity. When the permittivity of the dielectric body is low, specifically, the permittivity k is 3.0 or less. Such a low permittivity material has low resistance to 〇2 plasma grinding. After exposure to 〇2 plasma, the surface is easily deteriorated and the permittivity is also increased. In the semiconductor substrate using such a low dielectric layer, the photoresist pattern formed by the above-mentioned conventional germanium-containing two-layer photoresist is formed, and when the circuit layer is formed, the 〇2 plasma polishing medium for removing the underlying film on the substrate is formed. The electric layer is eroded, and the deterioration of the permittivity is likely to occur, and as a result, there is a problem that the electrical characteristics of the circuit layer are adversely affected. Further, in the manufacture of the semiconductor circuit structure, as described above, the circuit layer is formed by etching on the semiconductor, and the circuit trench for embedding the circuit layer is formed, and the photoresist is patterned by lithography of the underlying film. The control factor of the lithography process is the current 値 of the stepper for generating exposure light, the control of the voltage 値, the adjustment of the focal length of the lens, the thickness of the photoresist, the mounting position accuracy, and the coating characteristics of the photoresist composition. Many factors such as hardening characteristics exist. These control factors -10 - (7) 1258635 change for some reason, and the patterning is poor, resulting in the need to correct the lithography process. At this time, when the semiconductor substrate is discarded and a new semiconductor substrate is used, resources are wasted and the environment is adversely affected. Therefore, in the related process, the lithographic photoresist layer and the underlying film are removed, and the semiconductor substrate is recovered. The underlayer film removal process for the process of regenerating and recovering such a semiconductor substrate is referred to as a rework process, and in consideration of the economics of the manufacture of the semiconductor circuit structure, it is an important process, and the above-mentioned lower layer is discussed from the viewpoint of such rework processing. In the case of the film, it is not known that the removal of the underlayer film is not performed by the 〇2 plasma, and the problem that the characteristics of the semiconductor substrate are easily deteriorated after the rework treatment is not appropriate. The technique in which the photoresist layer is substantially a two-layer structure is different from the technique using the above-described ytterbium-containing two-layer photoresist, and a technique for preventing reflection of exposure light and providing an underlayer film under the photoresist layer is known. The underlayer film is composed of a resin composition having high absorption characteristics of exposure light, and absorbs the patterned light of the upper photoresist to prevent it from reaching the substrate surface, thereby achieving the effect of not generating reflected light of the exposure light. The material forming the underlayer film should also be transferred to form the above-mentioned underlayer film containing the second layer of photoresist. If the reflection preventing film can be removed without using 〇2 plasma polishing, the problem of the above-described circuit forming method including the bismuth two-layer photoresist can be solved. The material of the above-mentioned antireflection film has been proposed as various materials. For example, there is a proposal of a resin composition containing a polymer having an iminosulfonic acid group and a solvent (Japanese Laid-Open Patent Publication No. Hei No. Hei 10-319601). And development of a light-absorbing polymer containing a polymer having a hydroxystyrene unit, the unit having a specific substituent containing a sulfonic acid ester (Japanese Patent Publication No. 2000-511 2336) containing the light-absorbing polymer And proposals for the anti-reflection film forming material of the solvent (Japanese Patent Publication No. 2000-5124-2). The anti-reflection film material disclosed in Japanese Laid-Open Patent Publication No. Hei No. Hei. No. 3-19601, wherein the resin component is a polymer having an imidosulfonic acid group, and the resin component is insoluble in the peeling of the photoresist. liquid. Therefore, the technique disclosed in Japanese Laid-Open Patent Publication No. Hei 10-3-19601, after removing the photoresist pattern of the upper layer by the stripping solution, removes the remaining underlayer film by 〇2 plasma polishing. Further, the resin components disclosed in the above-mentioned Japanese Patent Publication No. 2000-512336 and No. 2000-512402 are not dissolved by the resist stripping solution, and the stripping liquid must be removed by the 〇2 plasma after removing the photoresist pattern. Sanding removes residual underlayer film. Therefore, the transfer of the conventional anti-reflection film to the underlayer film containing the bismuth layer of the photoresist is still unresolved with the removal of the underlying film. The latter method of forming a circuit of the latter (i.e., Japanese Laid-Open Patent Publication No. Hei 10-92740), that is, a multilayer photoresist process, in which the photoresist is not a single layer, and has a multilayer structure, (1) initially converting the pattern from the reticle The uppermost photoresist film is printed, and the decomposition energy and depth of focus in lithography are improved. (2) Under the uppermost film, a multi-layered film has a small interference effect, and an anti-uranium anti-reflection film is high. It can obtain the technology of high transfer precision and dry uranium engraving resistance and excellent resistance pattern. This technique first forms a composite anti-reflection film on a substrate. The composite antireflection film is made of, for example, a carbon film and a tantalum oxide film, and if necessary, a multilayer film of a tantalum nitride barrier layer is provided between these. A thin film upper photoresist film is formed on the multilayer film. Then, the circuit pattern is transferred to the photoresist upper film by lithography to form an upper photoresist pattern. Next, using the obtained upper photoresist pattern as a mask, the intermediate layer tantalum oxide film was etched and the pattern was transferred. Then, the underlying photoresist pattern and the intermediate layer pattern are used as masks, and the underlying film carbon film is etched to transfer the circuit pattern. Finally, the above-mentioned upper photoresist pattern and the intermediate layer - 12 - 1258635 Ο) are removed, and the carbon film (lower film) pattern with good dry etching resistance and high pattern transfer precision is obtained. The underlying film pattern carbon film pattern is used as a mask, and the substrate is etched according to the pattern. In the above-mentioned multilayer photoresist, the pattern of the underlying film (carbon film) remaining at the end, and the patterning of the etching process of the lower conductor layer or the dielectric layer is completed by some means. JP-A-11-92740 is removed by grinding with 〇2 plasma. As is well known, in a semiconductor circuit structure, a dielectric layer covering the circuit layer as an electrically isolated dielectric layer does not affect the electrical characteristics of the circuit layer, and the stomach must have a low permittivity as much as possible. The dielectric material has a low permittivity, and specifically, the capacitance k must be 3.0 or less. Such a low permittivity material has low resistance to 〇2 plasma polishing, and is exposed to 〇2 plasma, and the surface is easily deteriorated, and the permittivity is also increased.

於使用如此之低介電體導體層的半導體基板形成上述習 知多層光阻所成之光阻圖型,形成電路層時,因用以去除基 板上之下層膜的〇2電漿打磨介電體層受滲蝕,易於產生其 電容率加大之劣化’結果,造成對電路層之電特性產生不良 影響之問題。 又,半導體電路構造體的製造當中,如上述,爲以蝕刻 形成電路層於半導體上,形成包埋電路層用之電路溝,以光 阻、下層膜之微影加工進行圖型化。該微影過程之控制因子 有,產生曝光光之步進機的電流値、電壓値之控制,透鏡之 焦距的調整、光罩之精度、其安裝位置精度,以及光阻組成 物之塗布特性、硬化特性等諸多因子存在,這些控制因子由 -13 - (10) 1258635 於某原因而變動,則圖型化不良,產生非調整微影過程不可 之情況。該情況下,半導體基板之廢棄,使用新半導體基板 ,乃資源之浪費,也對環境有不良影響。因此,相關製程中 ,得知微影之進行有瑕疵時,須去除殘留在基板上之光阻, 回收半導體基板。如此的半導體基板之再生、回收過程中不 良光阻之去除處理稱爲再加工處理,考慮半導體電路構造體 的製造之經濟性時,係重要處理過程。從如此之再加工處理 之觀點探討上述習知下層膜時,習知下層膜,其去除非用 〇2電漿打磨不可,有再加工處理後之半導體基板的特性容 易劣化之問題而不適當。 又,於支承如上述之電路層的層間絕緣層使用低介電體 層時屢屢發生之所謂中毒(poisoning)現象,最近於光阻 圖型之形成過程已成爲問,有待解決。 上述之中毒現象,在使用低介電體層於層間絕緣層時容 易發生,而上述習知下層材料無法避免其發生。因此使用低 介電體層的電路形成製程中,爲保持使用後之易於去除,並 可抑制中毒現象之下層膜材料的開發,目前仍受期待。 而光阻層係實質上層膜(二層)構造之技術,已知有 不同於使用多層光阻之技術,爲防曝光光之反射,於光阻層 下設下層膜之技術。該下層膜係由曝光光之吸收特性高的樹 脂組成物構成’吸收上層光阻之圖型化光以防其抵達基板面 ,發揮使曝光光的反射光不產生之作用。假若該反射防止膜 可不用〇2電漿打磨而去除,並能抑制中毒所致對光阻膜之 不良影響,則使用上述多層光阻的電路形成方法之問題即可 -14 - (11) 1258635 解決。 上述反射防止膜材料向來有種種材料之提議。有例如含 有具亞胺基磺酸基之聚合物及溶劑的樹脂組成物之提議(特 開平10 — 3 19601號公報)。 並有含具羥基苯乙烯單元的聚合物之光吸收性聚合物之 開發,該單元具含磺酸酯基之特定取代基(特表2000 -5 1 2336號公報),含該光吸收性聚合物及溶劑之反射防止 膜形成材料之提議(特表2〇〇〇— 512402號公報)。 揭示於上述特開平10 - 3 19601號公報之反射防止膜材料 ,樹脂成分係用,有亞胺基磺酸基之聚合物,該樹脂成分不 溶於光阻用之剝離液。因此,揭示於該特開平1 0 - 3 1 9 6 0 1號 公報之技術,係以剝離液去除上層之光阻圖案後,施以02 電漿打磨去除殘餘之下層膜。 上述特表2000 — 51 23 36號公報及特表20 00 — 5 12402號公 報所揭示之樹脂成分亦係不溶於光阻用剝離液,仍須在以剝 離液去除光阻圖型後,以〇2電漿打磨去除殘餘之下層膜。 因此,轉用習知反射防止膜作爲下層膜,仍無法解決隨 下層膜之去除而來的問題。 而若著眼於半導體積體電路之基本電路構造,則該基本 電路構造,如所周知,係直接或間接形成於半導體基板上之 下層電路層,及該下層電路層上介以層間絕緣膜 形成的上層電路層,以貫通上述層間絕緣膜而形成之介層電 路連接之構造。該電路構造之多數化、多層化’即可形成半 導體積體電路之多層電路構造。 - 15 - (12) 1258635 用以利用耐電遷移性優之銅實現如此之多層電路_ @ 的方法,已知有雙大馬士革製程。該雙大馬士革製程係形 成至少由形成於基板上之低介電體層的第一蝕刻空間,及與 該第一蝕刻空間連通,同時與該第一蝕刻空間形狀、尺寸不 同的第二蝕刻空間構成的雙大馬士革構造。包埋導體材料 於該雙大馬士革構造,即實現上述電路構造。 茲參照第1A至1D圖及第2E至2H圖型說明該雙大馬士革 製程之基本過程。 首先,如第1A圖,於基板1上形成層間絕緣膜2。構成 該層間絕緣膜2之材料係用Si02、碳摻雜氧化物(SiON )、 SOG (旋塗玻璃)等。於該層間絕緣膜2上形成光阻膜3,加 以圖型化。以該圖型化之光阻膜3作爲遮罩作層間絕緣膜2之 選擇性蝕刻,繼之去除光阻層3,如第1 B圖,形成電路溝( trench ) 4。其次,於如上形成電路溝4之層間絕緣膜2表面 ,沈積阻障金屬5,於電路溝4內面,形成用以提升包埋於該 電路溝4之銅與層間絕緣膜2之粘合性,同時防止銅之往層間 絕緣膜2中擴散之阻障金屬膜。然後,如第i C圖,以電鍍等 包埋銅於電路溝4內,形成下層電路層6。 其次,以化學硏磨(CMP )去除此時附著於層間絕緣膜 2表面之銅,及殘餘的阻障金屬5,層間絕緣層2之表面於平 坦化後,於其上依次層合以第一低介電體層7、第一蝕刻停 止膜8、第二低介電體層9及第二蝕刻停止膜10。其次,於上 述第二蝕刻停止膜1 0上,形成具有介層孔形成用之圖型的光 阻遮罩1 1。其次,如第1 D圖,利用上述光阻遮罩進行蝕刻 -16 - (13) 1258635 ,形成貫通第二蝕刻停止膜1 Ο,第二低介電體層9,第一蝕 刻停止膜8及第一低介電體層7,抵達下層電路層6之表面的 介層孔12。繼之,如第2Ε圖,於上述介層孔12充塡光阻Α光 阻層3等之包埋材13。蝕刻該包埋材13,如第2F圖,於介層 孔12底部僅留下特定厚度,更於上述第二蝕刻停止膜10上, 形成具有溝形成用之圖型的光阻遮罩14。利用該光阻遮罩14 ,如第2G圖,蝕刻第二蝕刻停止膜1〇及第二低介電體層9形 成溝15,同時去除餘留在介層孔12底部之包埋材13。然後, 包埋銅於上述介層孔12及溝15,如第2H圖,形成介層電路 16及上層電路層17。經此,下層電路層6與上層電路層17以 介層電路16電連接之多層電路構造即實現。 經上述製程得之多層電路構造中,溝對應於第一蝕刻空 間或第二蝕刻空間,介層孔對應於第二蝕刻空間或第一蝕刻 空間。因此,上述第1圖之製程中,溝15及連通該溝15之下 介層孔1 2構成雙大馬士革構造。 上述雙大馬士革構造形成方法中,有包埋材之使用,該 包埋材之作用如下。亦即,形成介層孔後,以蝕刻形成溝之 際,介層孔之底部基板露出,存在於基板表面之下層電路層 ,受到用以形成溝之蝕刻氣體損傷,即會引起電路不良等。 因而,以包埋材充塡於介層孔,保護溝形成過程中之下層電 路層。 該包埋材向來係用光阻組成物,以光阻組成物充塡於介 層孔時,會產生氣泡而包埋不充分,故有使用熱交聯性化合 物溶於有機溶劑之溶液,作爲新包埋材之提議(特開2002 - -17 - (14) 1258635 03 3257號公報)。 然而,以該有機膜用作包埋材之構造中,包埋材之作用 後殘留於介層孔內之包埋材的去除不易,有須以氧電漿打磨 作去除處理之問題。此時,打磨氣體(主要係氧系氣體) 有損傷低介電體層之虞。該損傷有,低介電體層之Si - R哈 變爲Si— Ο Η結合,或電容率(k)之加大。 形成電路層時使用光阻,其圖型化係以曝光爲之,但已 知若其曝光光由光阻之下層表面反射,該反射光射入光阻之 非曝光部,會有使圖型解析度變差之問題。爲防該反反射, 已知有於光阻層之下設下層膜之技術,因該下層膜係由曝光 光之吸收特性高的樹脂組成物構成,吸收上層光阻之圖型化 光以免抵達光阻下層之表面,達到使曝光光不產生反射光之 作用。形成該下層反射防止膜之材料應亦可轉用於上述雙大 馬士革構造形成用之包埋材料。若該反射防止膜不用〇2電 漿打磨即可去除,則上述雙大馬士革構造形成方法中之問題 就能解決。 上述反射防止膜之材料,向來有種種材料之提議。例如 有含具亞胺基磺酸基之聚合物及溶劑的樹脂組成物之提議( 特開平10 — 319601號公報)。 又有含具羥基苯乙烯單元之聚合物的光吸性聚合物之 開發,該單元有含磺酸酯之特定取化基(特表2000 — 5 12336 號公報),有含該光吸收性聚合物之反射防止膜形成材料 之提議(特表2000 — 5 12402號公報)。 上述特開平10 - 3 1960 1號公報揭示之反射防止膜材料, ^ 18 - (15) 1258635 樹脂成分係用有亞胺基磺酸基之聚合物,該樹脂成分不溶於 光阻用之剝離液。因此,該特開平10— 319601號公報揭示之 技術中,上層之光阻圖型以剝離液去除後,殘餘之下層膜係 施以02電漿打磨去除。 又,上述特表2000 — 5 12336號公報及特表2000 — 512402 號公報揭示之樹脂成分,亦不溶於光阻用剝離液,光阻圖型 以剝離液去除液,殘餘之下層膜仍須以〇2電漿打磨去除。 因此,以習知反射防止膜轉用於雙大馬士革構造形成用 % 包埋材料,仍無法解決伴隨包埋材料之去除的問題。 ^ 對此,考慮以旋塗玻璃材料用作雙大馬士革構造形成用 包埋材料。以旋塗玻璃材料用於包埋材料,有例如美國專利 第63 29 1 1 8號公報之揭示。該旋塗玻璃材料因能以剝離液去 除,殘留包埋材之去除無須使用〇2電漿打磨,可避開低介 電體層劣化之問題。In the semiconductor substrate using such a low dielectric conductor layer, the photoresist pattern formed by the above-mentioned conventional multilayer photoresist is formed, and when the circuit layer is formed, the dielectric is polished by the 〇2 plasma for removing the underlying film on the substrate. The body layer is eroded and is prone to the deterioration of its permittivity, resulting in a problem that adversely affects the electrical characteristics of the circuit layer. Further, in the manufacture of the semiconductor circuit structure, as described above, a circuit layer is formed on the semiconductor by etching, and a circuit trench for embedding the circuit layer is formed, and patterning is performed by lithography of the photoresist or the underlying film. The control factors of the lithography process are: current 値, voltage 値 control of the stepper for generating exposure light, adjustment of the focal length of the lens, accuracy of the reticle, accuracy of mounting position, and coating characteristics of the photoresist composition, There are many factors such as hardening characteristics. These control factors are changed by -13 - (10) 1258635 for some reason, and the patterning is poor, which makes the non-adjusting lithography process impossible. In this case, the disposal of the semiconductor substrate and the use of a new semiconductor substrate are wasteful of resources and adversely affect the environment. Therefore, in the related process, when it is known that the lithography is defective, the photoresist remaining on the substrate must be removed to recover the semiconductor substrate. Such a process of removing the defective photoresist during the process of recycling and recovering the semiconductor substrate is called a rework process, and is an important process in consideration of the economics of the manufacture of the semiconductor circuit structure. When the above-mentioned conventional underlayer film is examined from the viewpoint of such rework processing, the conventional underlayer film is not removed by the use of the non-ruthenium 2 plasma, and the problem that the characteristics of the semiconductor substrate after the rework treatment are easily deteriorated is not appropriate. Further, the so-called poisoning phenomenon which occurs frequently when a low dielectric layer is used for supporting the interlayer insulating layer of the above-mentioned circuit layer has recently become a problem in the formation of a photoresist pattern and needs to be solved. The above poisoning phenomenon is apt to occur when a low dielectric layer is used in the interlayer insulating layer, and the above-mentioned underlying material cannot be prevented from occurring. Therefore, in the circuit formation process using a low dielectric layer, it is still expected to be easy to remove after use and to suppress the development of a film material under poisoning. While the photoresist layer is a technique of a substantially layer (two-layer) structure, a technique different from the technique of using a multilayer photoresist, in order to prevent reflection of exposure light, a technique of providing an underlayer film under the photoresist layer is known. This underlayer film is composed of a resin composition having high absorption characteristics of exposure light, and absorbs the patterned light of the upper layer resist to prevent it from reaching the substrate surface, and functions to prevent the reflected light of the exposure light from being generated. If the anti-reflection film can be removed without grinding with 〇2 plasma, and the adverse effect on the photoresist film caused by poisoning can be suppressed, the problem of the circuit formation method using the above multilayer photoresist can be -14 - (11) 1258635 solve. The above-mentioned antireflection film material has been proposed as a variety of materials. There is a proposal of a resin composition containing, for example, a polymer having an iminosulfonic acid group and a solvent (Japanese Laid-Open Patent Publication No. Hei No. Hei No. Hei. And development of a light-absorbing polymer containing a polymer having a hydroxystyrene unit having a specific substituent containing a sulfonate group (Japanese Patent Publication No. 2000-511 2336) containing the light absorbing polymerization Proposal for anti-reflection film forming materials of materials and solvents (Japanese Patent Publication No. 2-512402). The anti-reflection film material disclosed in Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. Therefore, the technique disclosed in Japanese Laid-Open Patent Publication No. Hei No. Hei No. Hei. No. Hei. No. Hei. No. Hei. The resin component disclosed in the above-mentioned publication No. 2000-51 23 36 and the special publication No. 20 00 - 5 12402 is also insoluble in the photoresist stripping solution, and must be removed after removing the photoresist pattern with the stripping solution. 2 plasma grinding to remove residual underlayer film. Therefore, the use of the conventional antireflection film as the underlayer film does not solve the problem of removal with the underlayer film. However, if attention is paid to the basic circuit configuration of the semiconductor integrated circuit, the basic circuit configuration is, as is well known, formed directly or indirectly on the lower circuit layer on the semiconductor substrate, and the lower circuit layer is formed by interlaminar insulating film. The upper circuit layer has a structure in which a via circuit formed by penetrating the interlayer insulating film is connected. This circuit structure is multi-layered and multilayered to form a multilayer circuit structure of a semiconductor body circuit. - 15 - (12) 1258635 A method for realizing such a multilayer circuit using copper with excellent electromigration resistance is known as a dual damascene process. The dual damascene process system forms a first etching space formed by at least a low dielectric layer formed on a substrate, and a second etching space which is in communication with the first etching space and has a shape and size different from the first etching space. Double damascene structure. The embedding conductor material is constructed in the double damascene structure to realize the above circuit configuration. The basic process of the dual damascene process is illustrated with reference to Figures 1A through 1D and Figures 2E through 2H. First, as shown in FIG. 1A, an interlayer insulating film 2 is formed on the substrate 1. The material constituting the interlayer insulating film 2 is SiO 2 , carbon doped oxide (SiON ), SOG (spin on glass) or the like. A photoresist film 3 is formed on the interlayer insulating film 2, and is patterned. The patterned photoresist film 3 is used as a mask for selective etching of the interlayer insulating film 2, followed by removal of the photoresist layer 3, as shown in Fig. 1B, to form a trench 4 . Next, on the surface of the interlayer insulating film 2 on which the circuit trench 4 is formed as described above, a barrier metal 5 is deposited on the inner surface of the circuit trench 4 to form adhesion for enhancing the adhesion of the copper and the interlayer insulating film 2 embedded in the circuit trench 4. At the same time, the barrier metal film which diffuses copper into the interlayer insulating film 2 is prevented. Then, as shown in Fig. 2C, copper is buried in the circuit trench 4 by electroplating or the like to form the lower circuit layer 6. Next, the copper adhered to the surface of the interlayer insulating film 2 at this time and the residual barrier metal 5 are removed by chemical honing (CMP), and the surface of the interlayer insulating layer 2 is planarized, and then laminated thereon in order. The low dielectric layer 7, the first etch stop film 8, the second low dielectric layer 9, and the second etch stop film 10. Next, on the second etch stop film 10, a photoresist mask 11 having a pattern for forming via holes is formed. Next, as shown in FIG. 1D, etching is performed by the photoresist mask - 16 - (13) 1258635, forming a second etch stop film 1 Ο, a second low dielectric layer 9, a first etch stop film 8 and A low dielectric layer 7 reaches the via 12 of the surface of the underlying circuit layer 6. Then, as shown in Fig. 2, the embedding material 13 such as the photoresist layer 3 is filled in the via hole 12. The embedding material 13 is etched, as shown in Fig. 2F, leaving only a specific thickness at the bottom of the via hole 12, and a photoresist mask 14 having a pattern for trench formation is formed on the second etch stop film 10. With the photoresist mask 14, as shown in Fig. 2G, the second etch stop film 1A and the second low dielectric layer 9 are etched to form the trenches 15, while the embedding material 13 remaining at the bottom of the via holes 12 is removed. Then, copper is buried in the via hole 12 and the trench 15, and as shown in Fig. 2H, the via circuit 16 and the upper circuit layer 17 are formed. Thereby, the multilayer circuit structure 6 and the upper circuit layer 17 are electrically connected to each other by the multilayer circuit structure. In the multilayer circuit structure obtained by the above process, the trench corresponds to the first etching space or the second etching space, and the via hole corresponds to the second etching space or the first etching space. Therefore, in the above-described process of Fig. 1, the trench 15 and the via hole 12 under the trench 15 constitute a double damascene structure. In the above method for forming a double damascene structure, there is a use of an embedding material, and the function of the embedding material is as follows. That is, after the via hole is formed, the underlying substrate of the via hole is exposed by etching, and the underlying circuit layer exists on the surface of the substrate, which is damaged by the etching gas for forming the trench, which may cause a circuit failure or the like. Therefore, the embedding material is filled in the via hole to protect the underlying circuit layer during the trench formation process. The embedding material is always a photoresist composition, and when the photoresist composition is filled in the via hole, bubbles are generated and the embedding is insufficient. Therefore, a solution in which a thermally crosslinkable compound is dissolved in an organic solvent is used. Proposal for new embedding materials (JP-2002- -17 - (14) 1258635 03 3257). However, in the structure in which the organic film is used as an embedding material, the removal of the embedding material remaining in the interlaminar pores after the action of the embedding material is not easy, and it is necessary to perform the removal treatment by oxygen plasma polishing. At this time, the polishing gas (mainly an oxygen-based gas) is damaged by the low dielectric layer. The damage is such that the Si-R of the low dielectric layer becomes Si- Η Η, or the permittivity (k) is increased. When a circuit layer is formed, a photoresist is used, and the patterning is performed by exposure, but it is known that if the exposure light is reflected by the surface of the underlying layer of the photoresist, the reflected light is incident on the non-exposed portion of the photoresist, and the pattern is formed. The problem of poor resolution. In order to prevent this anti-reflection, a technique of providing an underlayer film under the photoresist layer is known, and the underlayer film is composed of a resin composition having high absorption characteristics of exposure light, and absorbs pattern light of the upper layer photoresist to avoid arrival. The surface of the lower layer of the photoresist is such that the exposure light does not produce reflected light. The material forming the underlying anti-reflection film should also be transferred to the embedding material for forming the above dual damascene structure. If the anti-reflection film can be removed without grinding with 〇2, the problem in the method of forming the double damascene structure described above can be solved. The material of the above-mentioned antireflection film has been proposed as various materials. For example, there is a proposal of a resin composition containing a polymer having an iminosulfonic acid group and a solvent (JP-A-10-319601). There is also the development of a light-absorbing polymer containing a polymer having a hydroxystyrene unit, which unit has a specific sulfonate-containing group (Japanese Patent Publication No. 2000-5512), which contains the light absorbing polymer. Proposal for the anti-reflection film forming material of the object (Japanese Patent Publication No. 2000-512402). The anti-reflection film material disclosed in Japanese Laid-Open Patent Publication No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. . Therefore, in the technique disclosed in Japanese Laid-Open Patent Publication No. Hei 10-319601, after the upper photoresist pattern is removed by the stripping liquid, the residual underlayer film is removed by 02 plasma polishing. Further, the resin component disclosed in the above-mentioned Japanese Patent Publication No. 2000-512336 and Japanese Patent Publication No. 2000-512402 is also insoluble in the resist stripping liquid, and the resist pattern is a stripping liquid removing liquid, and the residual underlayer film must still be 〇 2 plasma grinding to remove. Therefore, the conventional use of the antireflection film for the use of the % embedding material for the formation of the double damascene structure still does not solve the problem of the removal of the embedding material. ^ In this regard, it is considered to use a spin-on glass material as an embedding material for the formation of a double damascene structure. A spin-on glass material is used for the embedding material, as disclosed in, for example, U.S. Patent No. 63 29 1 1 8 . The spin-on glass material can be removed by the stripping solution, and the residual embedded material can be removed without using the 〇2 plasma to avoid the problem of degradation of the low dielectric layer.

然而,以低介電體層用於支承電路層之層間絕緣層時屢 屢發生所謂中毒現象,其於雙大馬大革構造之形成過程中最 近已成問題,該問題在使用上述旋塗玻璃材料於包埋材時, 更在使用先前之須以〇2電漿打磨去除型之包埋材料時,亦 同樣發生問題,有待解決。 上述之中毒,於第2G圖之電路形成製程之過程中得的 第二蝕刻空間15之形狀造成嚴重瑕疵。第3圖係,蝕刻空間 正常及空間形狀產生瑕疵時之示意圖。第3 A圖係無中毒現 象發生,溝(第二蝕刻空間)15可正常形成時重要部位之 放大俯視圖,第3 B圖係發生中毒現象,溝(第二飽刻空間 -19- (16) 1258635 )1 5之形狀不良時的重要部位之放大俯視圖。第3圖中,與 第1及2圖之元件相同的構成元件係附以同一符號,說明簡化 。又,第3B圖之倍率大於第3A圖。由圖可見,發生中毒現 象時,因產生自低介電體層9之鹼性物質使包埋材及光阻層 劣化,以致光阻圖型被覆於介層孔(第一餓刻空間)12, 溝15之形狀大亂。 如上中毒現象,在以低介電體層用於層間絕緣層時容易 發生’而上述習知雙大馬士革構造形成用包埋材料並無法抑% 制其發生。因此,使用低介電體層的雙大馬士革構造形成製 程中,保持塡入於蝕刻空間之特性,使用後之去除容易性, 並能抑制中毒現象之包埋材,目前尙有待開發。 【發明內容】However, the so-called poisoning phenomenon occurs frequently when the low dielectric layer is used to support the interlayer insulating layer of the circuit layer, which has recently become a problem in the formation of the double damascene structure, which is embedded in the use of the above-mentioned spin-on glass material. In the case of materials, the same problems have occurred in the use of the 包2 plasma-cleaning type of embedding material, which still needs to be solved. In the above poisoning, the shape of the second etching space 15 which is obtained during the circuit forming process of Fig. 2G causes a serious flaw. Fig. 3 is a schematic diagram showing the etching space in a normal and spatial shape. The third A picture shows no poisoning phenomenon, the enlarged top view of the important part when the groove (second etching space) 15 can be formed normally, and the poisoning phenomenon occurs in the third B picture (the second saturated space -19- (16) 1258635 ) An enlarged plan view of important parts when the shape of the 1 5 is poor. In the third embodiment, the same components as those of the first and second figures are denoted by the same reference numerals and the description will be simplified. Moreover, the magnification of FIG. 3B is larger than that of FIG. 3A. It can be seen from the figure that when the poisoning phenomenon occurs, the embedding material and the photoresist layer are deteriorated due to the alkaline substance generated from the low dielectric layer 9, so that the photoresist pattern is coated on the via hole (first hungry space) 12, The shape of the groove 15 is disorderly. The above poisoning phenomenon is apt to occur when a low dielectric layer is used for the interlayer insulating layer. The conventional embedding material for forming a double damascene structure cannot be prevented from occurring. Therefore, in the double damascene structure forming process using a low dielectric layer, the characteristics of being trapped in the etching space, the ease of removal after use, and the embedding material capable of suppressing poisoning phenomenon are currently to be developed. [Summary of the Invention]

本發明鑒於上述習知問題,其第一課題在提供,曝光 光吸收性高,對通常用於光阻顯像過程之2.38重量%TMAH 顯像液之耐抗性優,使用後可用光阻剝離液去除,基板之 再加工處理容易的下屬膜材料。 本發明之第二課題在提供,對光阻顯像液之耐抗性優 ,使用後可用光阻剝離液去除’基板之再加工處理亦容易 的含矽二層光阻製程用下層膜材料。 本發明之第三課題在提供,對光阻顯像液之耐抗性優 ,圖型化特性良好,並對鹼性化合物具耐抗性,可抑制中 毒所致之於光阻圖型的不良影響,更於使用後可用光阻剝 離液去除的,基板之再加工處理容易之多層光阻下層膜材 -20- (17) 1258635 本發明之第四課題在提供,保持往蝕刻空間之埋入特 性,使用後之去除容易性,同時可抑制中毒現象之雙大馬 士革構造形成用包埋材料。 本發明更以提供,使用上述下層材料、包埋材料之電 路形成方法爲課題。 本發明人等爲解決上述課題,一再精心、實驗探討得 知,以含有至少具施加特定能量末端基脫離產生磺酸殘基 % 之取代基的樹脂作爲樹脂成分構成下層膜材料,即可得良 ^ 好作用及效果。 又,本發明人等得知,以含有至少具施加特定能量而 末端基脫離產生磺酸殘基的取代基之樹脂作爲樹脂成分構 成包埋材料,即可保持往蝕刻空間之埋入特性、使用後之 去除容易生,同時抑制中毒現象。The present invention has been made in view of the above problems, and a first object thereof is to provide high light absorption of an exposure light, excellent resistance to a 2.38 wt% TMAH developing solution generally used for a photoresist development process, and peeling off by a photoresist after use. The liquid film is removed, and the sub-membrane material which is easy to be processed by the substrate is easily processed. A second object of the present invention is to provide an underlayer film material for a ruthenium-containing two-layer photoresist process which is excellent in resistance to a photoresist developing solution and which can be removed by a photoresist stripping solution after use. The third object of the present invention provides an excellent resistance to a photoresist developing solution, good patterning property, resistance to an alkaline compound, and suppression of a defect caused by poisoning in a resist pattern. The effect is more than the use of the photoresist stripping solution after use, and the multilayer reprocessing of the substrate is easy to process. The fourth layer of the present invention is provided to maintain the embedding into the etching space. The embedding material for forming a double damascene structure which can be easily removed after use and which can suppress poisoning. Further, the present invention provides a method of forming a circuit using the above-mentioned underlying material and embedding material. In order to solve the above problems, the inventors of the present invention have repeatedly and experimentally discovered that it is possible to form a lower layer film material by using a resin containing at least a substituent having a specific energy end group derived from a sulfonic acid residue to be removed as a resin component. ^ Good effect and effect. In addition, the present inventors have found that a resin containing at least a substituent having a specific energy and a terminal group derived from a sulfonic acid residue can be used as a resin component to constitute an embedding material, thereby maintaining the embedding property in the etching space and using the resin. After the removal is easy to produce, while inhibiting poisoning.

亦即,使用如上述之下層膜材料形成的下層膜對用以 將曝光後之光阻層顯像的2.38重量%之TMAH顯像液的耐抗 性高,並於特定能量之施加下,形成的下層膜之樹脂成分 的末端基有一部份磺酸基化,變成於水溶性胺、四級錢氧 化物具相溶性。這些含水溶性胺、四級銨氫氧化物之溶液 ,因可用於光阻剝離液,該下層膜經光阻剝離處理,及經 含矽上層光阻之剝離處理,即可時剝離。 使用如上述之下層膜材料,施加特定能量形成下層膜 時,形成之下層膜的成分樹脂之末端基已磺酸基化,該磺 酸基成爲末端基,而下層膜即於水溶性胺、四級銨氫氧化 -21 - (18) 1258635 物具相溶性。這些含水溶性胺、四級銨氫氧化物之溶液, 因可用於光阻之剝離液,該下層膜可用光阻剝離液輕易剝 離,不侵襲低介電體層。於是該下層膜可抑制中毒現象所 致光阻圖型之圖型劣化。 如此’本發明人等得知,由「含有至少具施加特定能 量而末端基脫離產生磺酸殘基之取代基的樹脂作爲樹脂成分 的下層膜材料」形成之下層膜,於光阻顯像過程因於通常所 用的2.38重量%TMAH顯像液之耐抗性高,光阻顯像時不劣 化,並因以光阻剝離液可輕易去除,不只過程可予簡化,且 無去除處理所致基板的介電體層之劣化。 亦即’本發明有關之微影加工用下層膜形成材料(下作 本發明之第一下層膜形成材料),係在半導體基板上形成 電路形成圖型化用之光阻前用以形成設於上述基板上之下層 膜的材料’其特徵爲:含有至少具施加特定能量而末端基 脫離產生磺酸殘基之取代基的樹脂成分及溶劑。 使用該下層膜形成材料的電路形成方法(下作本發明之 第一電路形成方法)其特徵爲:包含,於基板上,用上述 微影術用下層膜形成材料,形成下層膜之下層膜形成過程, 於上述下層膜上形成光阻層,於該光阻層施以曝光及顯像處 理’形成特定光阻圖型之光阻圖型形成過程,不爲上述光阻 圖型覆蓋的上述下層膜的露出部份以乾式蝕刻去除之下層膜 圖型化過程’以上述光阻圖型及圖型化下層膜作爲遮罩,蝕 刻上述基板形成特定電路圖型之電路圖形成過程,以及上述 電路圖型形成後殘留於基板上的上述下層膜及光阻圖型以光 -22- (19) 1258635 阻剝離液同時去除之下層膜去除過程。 以該第一下層膜形成材料及第一電路形成方法之特徵構 成,可得以下效果。 (1 )本發明之下層膜形成用材料,於光阻顯像液不 溶。因此,以顯像液可去除之下層膜無法避免的去除部份側 壁側蝕、底切所致尺寸控制性之劣化,不成問題。 (2 ) 因以光阻剝離液可去除,適用作層合以如電容 率(k) 3.0以下之低介電體材料的〇2打磨電漿耐抗性低之材 料的半導體基板之微影製程用下層膜材料。 (3 ) 因微影不良有基板的再生之必要時,因可經對 基板損傷少之濕式處理輕易去除下層膜、基板再生之加工處 理可切實、容易地進行。 又’本發明有關之含矽二層光阻製程用下層膜形成材料 (下作本發明之第二下層膜形成材料)係,構成用以於基 板上高精度形成電路層的含矽二層光阻之下層膜的形成材料 ’其特徵爲:含有至少具施加特定能量而末端基脫離產生 磺酸殘基之取代基的樹脂成分及溶劑。 使用該下層膜形成材料的電路形成方法(下作本發明之 第二電路形成方法),其特徵爲:包含於基板上,使用上 述含矽二層光阻製程用下層膜形成材料,形成光阻下層膜之 下層膜形成過程,於上述下層膜上用含矽光阻材料形成光阻 上層膜,於該光阻上層膜施以曝光及顯像處理,形成特定光 阻圖型之上層光阻圖型形成過程,上述上層光阻圖型未覆蓋 之上述下層膜的露出部以乾式蝕刻去除之下層光阻圖型形成 -23- (20) 1258635 過程’以上述上層光阻圖型及下層光阻圖型爲遮罩,蝕刻上 述基板形成特定電路圖型之電路圖型形成過程,以及上述電 路圖型形成後於基板上殘留之上述下層光阻圖型及上層光阻 圖型以光阻剝離液同時去除之光阻圖型去除過程。 由該第二下層膜形成材料及第二電路形成方法之特徵構 成,可得以下效果。 (1) 本發明之下層膜因可用光阻剝離液去除,適用 作以如電容率(k) 3.0以下之低介電體材料的〇2打磨電漿耐 抗&低之材料層合的半導體基板之微影製程下層材料。 (2 ) 因微影不良有基板再生必要時,因以於基板損 傷少之濕式處理即可輕易去除下層膜,基板再生之再加工處 理可切實、容易地進行。結果,如用〇2電漿打磨時所生的 含矽光阻之變質而難溶化’下層膜之難溶化等使基板再生處 理變困難之情形得以避免。 如上述’本發明人等得知,由「含有至少具施加特定能 量而未端基脫離產生磺酸殘基之取代基的樹脂成分作爲樹脂 成分之下層膜材料」形成之多層光阻用下層膜,因於通常用 在光阻顯像過程之2 · 3 8重量% T M A Η顯像液的耐抗性高,上 層光阻膜的顯像時不劣化,更因可用光阻剝離液輕易去除, 不只過程可予簡化,亦無去除處理所致基板介電體層之劣化 。並得知,可防中毒現象所致光阻圖型之不良。 亦即,本發明有關的多層光阻製程用下層膜形成材料( 下作本發明之第三下層膜形成材料),係成爲用以於基板 上®精度形成電路層的最終圖型之至少有下層膜、中間層膜 -24 - (21) 1258635 及光阻上層膜的微影用多層光阻之構成其上述下層膜的形成 材料’其特徵爲:含有至少具施加特定能量而末端基脫離 產生磺酸殘基之取代基的樹脂成分及溶劑。 使用該下層膜之電路形成方法(下作本發明之第三電路 形成方法),其特徵爲:包含於基板上,用上述多層光阻 製程用下層膜形成材料,形成下層膜之下層膜形成過程,於 上述下層膜上用矽氧化膜材料形成中間層膜的中間層膜形成 過程5於上述中間層膜上形成光阻上層膜,於該光阻上層膜 施以曝光及顯像處理,形成特定光阻圖型之上層光阻圖型形 成過程,上述上層光阻圖型未覆蓋的上述中間層膜露出部份 以乾式蝕刻去除之中間層圖樣形成過程,以上述中間層光阻 圖型爲遮罩經乾式蝕刻去除該遮罩未覆蓋之上述下層膜露出 部份的下層圖型形成過程,以上述下層圖型爲遮罩,蝕刻上 述基板上之層間絕緣層形成特定電路圖型之電路圖型形成過 程,以及上述電路圖型形成後殘留於基板上的上述下層圖型 以光阻劑剝離液去除之下層膜型去除過程。 由該第三下層膜形成材料及第三電路形成方法之特徵構 成5可得以下效果。 (1) 本發明之下層膜因可用光阻剝離液去除,適用 作層合以如電容率(k) 3.0以下之低介電體材料的〇2打磨電 漿耐抗性低之材料的半導體基板微影製程之下層膜材料。 (2 ) 又,因微影不良有回收基板之必要時,因可經 對基板損傷少之濕式處理輕易去除下層膜,基板回收之再加 工處理可切實、容易地進行。結果,如用02電漿打磨所生 -25- (22) 1258635 的,含矽光阻因變質而難溶化,下層膜之難溶化等所致基板 再生處理困難之情形得以避免。 (3) 又再,若倂用多層光阻之下層膜,及雙大馬士 革製程之包埋材,則於低介電體層形成雙大馬士革構造時 容易發生中毒現象所致光阻圖型之劣化得以防止或抑制。 本發明人等爲解決習知包埋材料之問題,本發明人等 精心、實驗探討得知,含有至少具施加特定能量而末端基 脫離產生5貝酸殘基之取代基的樹脂作爲樹脂成分構成包埋 材料,即可保持往蝕刻空間之埋入特性,使用後之去除容 易,同時抑制中毒現象。 亦即,使用如上述之包埋材料形成之下層膜,對用於曝 光後之光阻層的顯像之2.38重量%ΤΜΑΗ顯像液之耐抗性高 ’且施加特定能量時形成之下層膜的樹脂成分之部份末端基 磺酸基化,於水溶性胺、四級銨氫氧化物變成具相溶性。以 這些含有水溶性胺、四級銨氫氧化物之溶液用作剝離液,可 剝離第二蝕刻空間形成後的第一蝕刻空間內之包埋材。 如此,本發明人等得知,由「含有至少具施加特定能量 而末端基脫離產生磺酸殘基之取代基的樹脂作爲樹脂成分的 包埋材料」形成之包埋材,因對通常用於光阻顯像過程之 2.38重量%ΤΜΑΗ顯像液之耐抗性高,光阻顯像時不劣化, 更因以光阻剝離液可輕易去除,不只過程可簡化,不因去除 處理使基板之介電體層劣化,並抑制低介電體層所生鹼性成 分造成的圖型劣化,可高度發揮防中毒特性。 亦即,本發明有關之雙大馬士革構造形成用包埋材料( -26 - (23) 1258635 下作本發明之包埋材料),係用以形成至少由形成於基板 上之低介電體層的第一蝕刻空間,及連通該第一蝕刻空間同 時與該第一蝕刻空間形狀及尺寸不同的第二蝕刻空間構成之 雙大馬士革構造的蝕刻空間包埋材料,其特徵爲:含有至 少具施加特定能量而末端基脫離產生磺酸殘基之取代基的樹 脂成分及溶劑。 使用該包埋材料的雙大馬士革構造形成方法(下作本發 明之第四電路形成方法),其特徵爲:具有於具金屬層之 基板上層合以至少由低介電體層所成之層間絕緣層的層間絕 緣層形成過程,於上述層間絕緣層上形成光阻層,圖型曝光 後,作顯像處理形成光阻圖型,以該光阻圖型爲遮罩進行蝕 刻於上述層間絕緣層形成第一蝕刻空間之第一蝕刻空間形成 過程,於上述層間絕緣層上,以上述本發明之包埋材料塗布 形成包埋材層,同時於上述第一蝕刻空間充塡包埋材之包埋 過程,於上述包埋材層上形成光阻層,於該光阻層以圖型光 照射,以鹼顯像液顯像,形成光阻圖型之光阻圖型形成過程 ,以上述光阻圖型爲遮罩進行蝕刻,將上述第一蝕刻空間上 部之上述層間絕緣層依特定圖型去除,形成與上述第一蝕刻 空間連通的第二鈾刻空間之第二蝕刻空間形成過程,以及, 將殘留於上述第二蝕刻空間的包埋材用剝離液去除之包埋材 料去除過程。 上述構成中,第一鈾刻空間溝或介層孔,第二蝕刻空間 指介層孔或溝。 由本發明之包埋材料及第四電路形成方法之特徵構成, -27 - (24) 1258635 可得以下效果。 (1 ) 用於本發明之包埋材料,因於光阻的圖型化過 程產生自低介電體層之氣態或/及液態鹼成分有高度耐抗性 ’可抑制上述驗成分所生的光阻圖型不良之中毒現象,因而 ’雙大馬士革構造的蝕刻空間之具優異尺寸安定性的圖型化 成爲可能。 (2 ) 因可用光阻剝離液去除,可適用作層合以如電 容率(k) 3。0以下之低介電體材料的〇2打磨電漿之耐抗性的 材料之半導體基板的大馬士革微影製程用之触刻空間包埋材 料’以此,低介電體層之低電容率可保持於適當値至形成電 路層以後。 上述事項,及本發明之其它目的、特徵、優點,可由利 用圖式的以下本發明之詳細說明得知。 【實施方式】 本發明之第一下層膜形成材料(微影用下層膜形成材 料)’如上述’其特徵爲:含有至少具施加特定能量而末 端基脫離產生磺酸殘基之取代基的樹脂成分,及溶劑。 本發明之第二下層膜形成材料(含矽二層光阻製程用 下層膜形成材料),如上述,其特徵爲:含有至少具施加 特疋能量而末端基脫離產生磺酸殘基之取代基的樹脂成分 ,及溶劑。 本發明的第三下層膜形成材料(多層光阻製程用下層 腠形成材料),如上述,其特徵爲:含有至少具施加特定 -28- (25) 1258635 能量而末端基脫離產生磺酸殘基之取代基的樹脂成分,及 溶劑。 本發明之包埋材料(大馬士革構造形成用包埋材料) ’如上述,其特徵爲:含有至少具施加特定能量而末端基 脫離產生磺酸殘基之取代基的樹脂成分,及溶劑。 上述本發明之第一、第二及第三下層膜形成材料,包 埋材料中,上述樹脂成分其特徵爲:至少有下述一般式( 1 )That is, the underlayer film formed using the underlayer film material as described above has high resistance to the 2.38 wt% TMAH developing solution for developing the exposed photoresist layer, and is formed under application of a specific energy. The terminal group of the resin component of the underlayer film is partially sulfonated, and becomes compatible with the water-soluble amine and the quaternary oxide. These solutions containing a water-soluble amine and a quaternary ammonium hydroxide can be used for the photoresist stripping solution, and the underlayer film can be peeled off by a photoresist stripping treatment and a stripping treatment by a photoresist containing an upper layer of germanium. When a lower layer film is formed by applying a specific energy as described above, the terminal group of the component resin forming the underlayer film has been sulfonated, the sulfonic acid group becomes a terminal group, and the lower layer film is a water-soluble amine, four Ammonium hydroxide - 21 - (18) 1258635 is compatible. These solutions containing a water-soluble amine and a quaternary ammonium hydroxide can be easily peeled off by a photoresist stripping solution because of a stripping solution which can be used for photoresist, and do not invade the low dielectric layer. Therefore, the underlayer film can suppress the deterioration of the pattern of the photoresist pattern caused by the poisoning phenomenon. Thus, the inventors of the present invention have found that an underlayer film is formed by a "lower film material containing a resin having at least a specific energy and a terminal group is desorbed from a substituent which generates a sulfonic acid residue as a resin component", and is formed in a photoresist process. Because the commonly used 2.38 wt% TMAH imaging solution has high resistance, the photoresist does not deteriorate during development, and can be easily removed by the photoresist stripping solution, not only the process can be simplified, but also the substrate is not removed. Deterioration of the dielectric layer. That is, the underlayer film forming material for lithography processing (hereinafter referred to as the first underlayer film forming material of the present invention) is formed by forming a photoresist for forming a circuit pattern on a semiconductor substrate. The material of the underlayer film on the substrate is characterized in that it contains a resin component and a solvent having at least a specific energy and a terminal group is desorbed from a substituent which generates a sulfonic acid residue. A circuit forming method using the underlayer film forming material (the first circuit forming method of the present invention) is characterized in that, on the substrate, a material is formed by using the underlayer film of the above lithography to form a film under the underlayer film. a process of forming a photoresist layer on the underlying film, applying an exposure and development process to the photoresist layer to form a photoresist pattern forming process of a specific photoresist pattern, and not forming the lower layer covered by the photoresist pattern The exposed portion of the film is removed by dry etching to remove the underlying film patterning process. The photoresist pattern and the patterned underlayer film are used as masks, the circuit pattern forming process for etching the substrate to form a specific circuit pattern, and the formation of the above circuit pattern are formed. The underlying film and the photoresist pattern remaining on the substrate are then removed by the light-22-(19) 1258635 resist stripping solution while removing the underlying film removal process. The following effects can be obtained by the features of the first underlayer film forming material and the first circuit forming method. (1) The material for forming a layer film of the present invention is insoluble in a photoresist developing solution. Therefore, it is not problematic to remove the side wall side etching and the undercutting dimensional control which are unavoidable by removing the underlying film by the developing liquid. (2) Because the photoresist stripping solution can be removed, it is suitable for laminating a semiconductor substrate of a low-dielectric material such as a low dielectric material having a permittivity (k) of 3.0 or less. Use the underlying film material. (3) When it is necessary to regenerate the substrate due to lithography, the processing of the underlayer film and the substrate regeneration can be easily and easily performed by wet processing with less damage to the substrate. Further, the underlayer film forming material for the two-layer photoresist process according to the present invention (hereinafter referred to as the second underlayer film forming material of the present invention) constitutes a bismuth-containing light for forming a circuit layer with high precision on a substrate. The material for forming the underlayer film is characterized in that it contains a resin component and a solvent having at least a specific energy and a terminal group is desorbed from a substituent which generates a sulfonic acid residue. A circuit forming method using the underlayer film forming material (hereinafter, the second circuit forming method of the present invention) is characterized in that it is included on a substrate, and the underlayer film forming material for the ytterbium-containing two-layer photoresist process is used to form a photoresist Underneath the underlayer film formation process, a photoresist upper layer film is formed on the underlying film by using a ruthenium-containing photoresist material, and the photoresist upper layer film is subjected to exposure and development processing to form a photoresist pattern on the upper surface of the specific photoresist pattern. Forming process, the exposed portion of the underlying film not covered by the upper photoresist pattern is formed by dry etching to remove the underlying photoresist pattern to form a -23-(20) 1258635 process' with the upper photoresist pattern and the lower photoresist The pattern is a mask, the circuit pattern forming process for etching the substrate to form a specific circuit pattern, and the lower photoresist pattern and the upper photoresist pattern remaining on the substrate after the circuit pattern is formed are simultaneously removed by the photoresist stripping liquid. Photoresist pattern removal process. The following effects can be obtained by the features of the second underlayer film forming material and the second circuit forming method. (1) The underlying film of the present invention is removed by a photoresist stripping solution, and is suitable for use as a low dielectric material such as a permittivity (k) of 3.0 or less. 打2 is used to polish plasma resistance and low dielectric laminated semiconductors. The underlying material of the lithography process of the substrate. (2) When it is necessary to regenerate the substrate due to lithography, the underlayer film can be easily removed by wet processing with less damage to the substrate, and the reprocessing of the substrate can be reliably and easily performed. As a result, it is difficult to dissolve the yttrium-containing photoresist which is generated by polishing with 〇2 plasma, and it is difficult to dissolve the underlying film, which makes it difficult to regenerate the substrate. As described above, the inventors of the present invention have found that the underlayer film for a multilayer photoresist formed of a resin component containing at least a specific energy and a terminal group which is free from the terminal to generate a sulfonic acid residue is used as a resin component underlayer film material. Because of the high resistance of 2·38 wt% TMA Η imaging solution which is usually used in the photoresist development process, the upper photoresist film does not deteriorate during development, and is easily removed by the photoresist stripping solution. Not only can the process be simplified, but also the degradation of the substrate dielectric layer caused by the removal process. And learned that it can prevent the poor resistance of the photoresist pattern caused by poisoning. That is, the underlayer film forming material for the multilayer photoresist process according to the present invention (hereinafter referred to as the third underlayer film forming material of the present invention) is at least the lower layer for forming the final pattern of the circuit layer on the substrate. Membrane, interlayer film-24 - (21) 1258635 and the photoresist for lithography of the photoresist upper layer film are formed of the above-mentioned underlayer film forming material, which is characterized in that it contains at least a specific energy and the terminal group is detached to produce sulfonate. A resin component and a solvent of a substituent of an acid residue. A circuit forming method using the underlayer film (the third circuit forming method of the present invention) is characterized in that it is included on a substrate, and a material is formed by using the underlayer film for the multilayer photoresist process to form a film under the underlayer film. An intermediate layer film forming process for forming an intermediate layer film on the underlying film with a tantalum oxide film material forms a photoresist upper layer film on the intermediate layer film, and the photoresist upper layer film is subjected to exposure and development processing to form a specific a photoresist pattern forming process on the upper surface of the photoresist pattern, wherein the exposed portion of the intermediate layer film not covered by the upper photoresist pattern is formed by dry etching to remove the intermediate layer pattern, and the intermediate layer resist pattern is used as a mask The mask is subjected to dry etching to remove the underlying pattern forming process of the exposed portion of the underlying film which is not covered by the mask, and the circuit pattern forming process for forming a specific circuit pattern by etching the interlayer insulating layer on the substrate by using the underlying pattern as a mask And the above-mentioned lower layer pattern remaining on the substrate after the formation of the above circuit pattern is removed by a photoresist stripping solution. The following effects can be obtained by the features of the third underlayer film forming material and the third circuit forming method. (1) The underlying film of the present invention is removed by a photoresist stripping solution, and is suitable for laminating a semiconductor substrate of a material having low resistance to 〇2, such as a low dielectric material having a permittivity (k) of 3.0 or less. Film material under the lithography process. (2) When it is necessary to recover the substrate due to lithography, the underlayer film can be easily removed by wet processing with less damage to the substrate, and the reprocessing process for substrate recovery can be carried out reliably and easily. As a result, if the film containing -25-(22) 1258635 is polished by the 02 plasma, it is difficult to dissolve the yttrium-containing photoresist due to deterioration, and it is difficult to regenerate the substrate due to insolubilization of the underlying film. (3) Furthermore, if a multi-layer photoresist underlayer film and a double damascene process are used, the deterioration of the photoresist pattern is likely to occur due to the poisoning phenomenon caused by the formation of the double damascene structure in the low dielectric layer. Or inhibit. In order to solve the problem of the conventional embedding material, the inventors of the present invention have carefully and experimentally discovered that a resin containing at least a substituent having a specific energy and a terminal group desorbed to generate a 5-shell acid residue is formed as a resin component. By embedding the material, the embedding property to the etching space can be maintained, and the removal is easy after use, and the poisoning phenomenon is suppressed. That is, the underlayer film is formed using the embedding material as described above, and the resistance to the 2.38 wt% ΤΜΑΗ imaging liquid for the development of the exposed photoresist layer is high, and the underlayer film is formed when a specific energy is applied. A part of the terminal group of the resin component is sulfonated, and the water-soluble amine and the quaternary ammonium hydroxide become compatible. These solutions containing a water-soluble amine and a quaternary ammonium hydroxide are used as a stripping solution to peel off the embedded material in the first etching space after the second etching space is formed. As described above, the present inventors have found that an embedding material formed of "an embedding material containing a resin having at least a specific energy and a terminal group desorbing a substituent which generates a sulfonic acid residue as a resin component" is generally used for The resistance of the photo-resistance process is 2.38 wt%, the resistance of the developing solution is high, the photoresist is not deteriorated, and the photoresist stripping liquid can be easily removed. The process can be simplified, and the substrate is not removed by the removal process. The dielectric layer is deteriorated, and the pattern deterioration caused by the alkaline component of the low dielectric layer is suppressed, and the anti-poisoning property can be exhibited to a high degree. That is, the embedding material for forming a double damascene structure according to the present invention (the embedding material of the present invention under -26 - (23) 1258635) is used to form at least a low dielectric layer formed on the substrate. An etching space embedding material of the double damascene structure formed by the etching space and the second etching space which is different from the shape and size of the first etching space, and is characterized in that at least a specific energy is applied The terminal group is separated from the resin component and solvent which generate a substituent of the sulfonic acid residue. A method for forming a double damascene structure using the embedding material (the fourth circuit forming method of the present invention) is characterized in that: an interlayer insulating layer formed by laminating at least a low dielectric layer on a substrate having a metal layer In the interlayer insulating layer forming process, a photoresist layer is formed on the interlayer insulating layer, and after the pattern is exposed, a development process is performed to form a photoresist pattern, and the photoresist pattern is used as a mask for etching to form the interlayer insulating layer. a first etching space forming process of the first etching space, and coating the embedding material layer on the interlayer insulating layer by using the embedding material of the present invention, and embedding the embedding material in the first etching space Forming a photoresist layer on the embedding material layer, irradiating the photoresist layer with pattern light, and developing with an alkali developing solution to form a photoresist pattern type photoresist pattern forming process, and the photoresist pattern is formed by the photoresist pattern The mask is etched, and the interlayer insulating layer on the upper portion of the first etching space is removed according to a specific pattern to form a second etching space of the second uranium engraved space in communication with the first etching space. Cheng investment material, and the remaining space to the second etching is removed by the stripping liquid embedding material removal process. In the above configuration, the first uranium engraved space trench or via hole, and the second etched space refers to via hole or trench. According to the characteristics of the embedding material of the present invention and the fourth circuit forming method, -27 - (24) 1258635 can obtain the following effects. (1) The embedding material used in the present invention, because of the patterning process of the photoresist, the gaseous state of the low dielectric layer or the liquid alkali component is highly resistant, and the light generated by the above-mentioned components can be suppressed. The patterning type is poorly poisoned, and thus the patterning of the excellent dimensional stability of the etching space of the double damascene structure becomes possible. (2) Due to the removal of the available photoresist stripping solution, it can be applied as a semiconductor substrate for laminating a material of a low dielectric material such as a permittivity (k) of 3.0 or less. The etched space embedding material is used for the lithography process. Thus, the low permittivity of the low dielectric layer can be maintained after proper formation to form the circuit layer. The above matters, as well as other objects, features and advantages of the present invention, will become apparent from the Detailed Description of the invention. [Embodiment] The first underlayer film forming material (underlayer film forming material for lithography) of the present invention is characterized in that it contains a substituent having at least a specific energy and a terminal group is detached to generate a sulfonic acid residue. Resin component, and solvent. The second underlayer film forming material (the underlayer film forming material for a germanium two-layer photoresist process) of the present invention is characterized in that it contains a substituent having at least a characteristic energy applied and a terminal group is detached to generate a sulfonic acid residue. Resin composition, and solvent. The third underlayer film forming material (the underlayer germanium forming material for a multilayer photoresist process) of the present invention, as described above, is characterized in that it contains at least a specific -28-(25) 1258635 energy and the terminal group is detached to generate a sulfonic acid residue. The resin component of the substituent, and the solvent. The embedding material (embedded material for forming a damascene structure) of the present invention is characterized in that it contains a resin component having at least a specific energy and a terminal group is desorbed from a substituent which generates a sulfonic acid residue, and a solvent. In the above first, second and third underlayer film forming materials of the present invention, in the embedding material, the resin component is characterized by at least the following general formula (1)

(式中η表1以上之整數,X係碳原子數1至10之直鏈 或分枝烷基鏈、芳香性或脂環式環狀烷基鏈、烷基酯鏈, Υ系受特定能量之施加產生磺酸殘基之取代基。) 之重複單元。 爲產生上述磺酸殘基而施加之特定能量,可係例如, 以80 °C以上之加熱處理等產生磺酸殘基。如此的特定能量 之施加可由剝離處理時之加熱及鹼的搭配作用更加促進。 上述一般式(1)之取代基Y,以—S03R或—S03_R24 (式中1及R2係一價之有機基)爲佳。 上述有機基Ri,以碳原子數1至10之烷基,或羥基烷 -29- (26) 1258635 基之中選出的一種爲佳。 上述有機基R2,以選自烷醇胺,及烷基胺中之至少一 種爲佳。 上述至少具施加特定能量而末端基脫離產生磺酸殘基 之取代基的樹脂成分,亦可用上述任一樹脂成分,與丙嫌 酸或甲基丙烯酸或該等之衍生物之共聚物或混合樹脂。 樹脂成分係用上述共聚物或混合樹脂時,其聚合比或 混合比若在可保有對2 · 3 8重量% T M A Η顯像液具耐抗性,能 以光阻剝離液去除之效果的範圍內,即無特殊限制。 上述至少具施加特定能量而末端基脫離產生磺酸殘基 之取代基的樹脂成分,亦可用。 對上述任一樹脂成分與丙烯酸或甲基丙烯酸或該等之 衍生物的共聚物或混合樹脂,以下述一般式(2 )(wherein n is an integer of 1 or more, X is a linear or branched alkyl chain having 1 to 10 carbon atoms, an aromatic or alicyclic cyclic alkyl chain, an alkyl ester chain, and the lanthanide is subjected to specific energy A repeating unit that applies a substituent that produces a sulfonic acid residue. The specific energy to be applied to the above-mentioned sulfonic acid residue may be, for example, a heat treatment at 80 ° C or higher to generate a sulfonic acid residue. The application of such specific energy can be further promoted by the combination of heating and alkali in the stripping treatment. The substituent Y of the above general formula (1) is preferably -S03R or -S03_R24 (wherein 1 and R2 are monovalent organic groups). The above-mentioned organic group Ri is preferably one selected from the group consisting of an alkyl group having 1 to 10 carbon atoms or a hydroxy alkane-29-(26) 1258635 group. The above organic group R2 is preferably at least one selected from the group consisting of an alkanolamine and an alkylamine. The resin component which has at least a specific energy and the terminal group is desorbed from the substituent which generates a sulfonic acid residue may be a copolymer or mixed resin of any one of the above-mentioned resin components with a acrylic acid or methacrylic acid or such a derivative. . When the above-mentioned copolymer or mixed resin is used as the resin component, the polymerization ratio or the mixing ratio thereof is such that it can withstand the resistance of 2·38% by weight of TMA Η developing solution and can be removed by the photoresist stripping solution. There is no special restriction. The above resin component having at least a specific energy and a terminal group derived from a substituent which generates a sulfonic acid residue can be used. For the copolymer or mixed resin of any of the above resin components with acrylic acid or methacrylic acid or such derivatives, the following general formula (2)

…(2) (式中η表1以上之整數,r3係選自氫原子、氟原子、 羥基 '羧基、碳原子數1至5之羥基烷基、碳原子數1至5之 烷基氧基烷基中之至少一種,Z係碳原子數工至1〇之直鏈或 分枝烷基鏈’方杳性或脂環式環狀烷基鏈,烷基酯鏈。) 之重複單元共聚之共聚物’或以具上述一般式(2)之重複 '30- (27) 1258635 單元的樹脂化合物混合之混合樹脂所成的樹脂成分 使用上述一般式(2 )之衍生物調製共聚物, 聚物爲樹脂成分構成下層膜材料,則樹脂成分之單 蒽,該蒽尤以於使用KrF準分子雷射的微影加工中 性高,故較佳。 用於本發明之下層膜形成材料的溶劑,若係用 下層膜形成材料者即無特殊限制,可以使用。 具體而言,有例如丙酮、丁酮、環戊酮、環己 基異丙基酮、2 —庚酮、1,1,^一三甲基丙酮等酮 二醇、乙二醇單甲醚、乙二醇單乙醚、乙二醇單丁 二醇單乙酸酯、乙二醇單甲醚乙酸酯、乙二醇單乙 酯、二乙二醇、二乙二醇單乙酸酯、二乙二醇單甲 乙二醇單乙醚、二乙二醇單丁醚、丙二醇、丙二醇 、二丙二醇單甲醚、甘油、1,2—丁二醇、1,3 — 、2 ’ 3 —丁二醇等多元醇類及其衍生物;如二噁烷 類;乳酸乙酯、乙酸甲酯、乙酸乙酯、乙酸丁酯、 甲酯、丙酮酸乙酯' 3—甲氧基丙酸甲酯、3—乙氧 乙酯等酯類;二甲亞碾等亞硕類;二甲碾、二乙硕 一羥基乙基)硕、四亞甲硕等硕類;N,N-二甲基 、N—甲基甲醯胺、N,N—二甲基乙醯胺、N—甲基 、N,N—二乙基乙醯胺等醯胺類;N—甲基一2—吡 、N —乙基一 2 一吡咯烷酮、n —羥基甲基一 2 -吡咯每 一羥基乙基—2-吡咯烷酮等內醯胺類;-丙內酯 丁內酯、7 —戊內酯、δ —戊內酯、7 —己內酯、ε 以其共 元即含 吸收特 於習知 酮、甲 類;乙 醚、乙 醚乙酸 醚、二 單甲醚 丁二醇 之環醚 丙酮酸 基丙酸 、雙(2 甲醯胺 乙醯胺 咯烷酮 ξ酮、Ν X ry —— —己內 -31 - (28) 1258635 酯等內酯類;1,3—二甲基一 2—咪唑啶酮、1,3-二乙基 一 2-咪唑啶酮、1,3-二異丙基一 2-咪唑啶酮等咪唑啶酮 類等。這些可用一種,亦可混合二種以上使用。 本發明有關之下層膜形成材料可含交聯劑,如此之交聯 劑若可使本發明用之樹脂成分交聯即無特殊限制,而以具胺 基及/或亞胺基之含氮化合物,存在於該含氮化合物中的全 部胺基及/或亞胺基,至少二氫原子經羥基烷基及/或烷氧基 烷基取代之含氮化合物爲佳。 上述取代基之數,係含氮化合物中2以上,實質上6以下 〇 具體而言,有例如三聚氰胺系化合物、尿素系化合物、 胍胺系化合物、乙醯胍胺系化合物、苯并胍胺系化合物、甘 脲系化合物、琥珀醯胺系化合物、乙烯尿素化合物等中,胺 基及/或亞胺基之二以上氫原子,以羥甲基或烷氧基甲基或 其二者取代之化合物等。 這些含氮化合物可例如,使上述三聚氰胺系化合物、尿 素系化合物、胍胺系化合物、乙醯胍胺系化合物 '苯并胍胺 系化合物、甘脲系化合物、琥珀醯胺系化合物、乙烯尿素系 化合物等,於沸水中與福馬林反應羥甲基化,或更使之與低 級醇,具體而言,甲醇、乙醇、正丙醇、異丙醇、正丁醇、 異丁醇等反應烷氧基化而得。 上述交聯劑若用上述羥基烷基及/或烷氧基烷基,與單 羥基單羧酸之縮合反應物,則因可得光阻圖案下部之形狀改 善(足狀之防止)效果而較佳。 -32- (29) 1258635 上述單羥基單羧酸,以羥基及羧基各結合於同一碳原子 ’或相鄰之二碳原子者,於足狀之防止較佳。 使用與單羥基單羧酸之縮合反應物時,對縮合前之交聯 劑1莫耳,以用0.01至6莫耳,較佳者爲0.1至5莫耳之比率, 將單羥基羧酸縮合反應而得之反應物的使用,因可得足狀之 防止的效果而較佳。 於本發明之第一、第二及第三下層膜形成材料,包埋材 料中,上述交聯劑可用一種,亦可混合二種以上使用。 更可於必要時’於本發明有關之第一下層膜形成材料及 包埋材料添加高吸光性成分、酸性化合物、界面活性劑◊又 於本發明之第二及第三下層膜形成材料,可於必要時添加高 吸光性成分、酸性化合物、界面活性劑。 上述高吸光性成分之添加效果係,曝光光的吸收特性之 更加提升。該高吸光性成分若係對照射於光阻層之曝光光具 rti吸收特性,能防止曝光光由基板反射所生之駐波,基板表 面之高低差所致散射即可’無特殊限制。如此之物有例如, 水楊醒系化合物、二苯基酮系化合物、苯并三D坐系化合物、 氰基丙烯酸酯系化合物、偶氮系化合物、多烯系化合物、蒽 酉昆系化合物、硕系化合物(較佳者爲雙苯基硕系论合物) 、亞硕系化合物(雙苯基亞硕系化合物)、蒽系化合物等 ,任一皆可使用。這些可用一種,亦可混合二種以上使用. 其中以具有選自羥基、羥基烷基 '烷氧基烷基、及羧基 中之至少一種取代基的蒽系化合物、雙苯基硕系化合物、雙 苯基亞硕系化合物及一苯基酮系化合物因吸收特性高,以由 -33 - (30) 1258635 這些之中選用至少一種爲佳。其中特佳者係例如,蒽系化合 物或雙苯基硕系化合物。這些可單獨使用,亦可組合二種以 上使用。 上述酸性化合物之添加效果在於,足狀之防止特性的提 升。如此之酸性化合物有,具含硫之酸殘基的無機酸、有機 酸或該等之酯等,以活性光線產生酸之化合物(酸產生劑, 例如_鹽)等。配合該酸性化合物時之配合量,本發明之 第一下層膜形成材料及包埋材料中,係配合全部固體成分 100質量份之30質量份,較佳者爲以20質量份爲上限,於本 發明之第二及第三下層膜形成材料,係對全部固體成分100 質份〇·〇1至30質量份,0.1至20質量份較佳。太少則不得添 加效果,若超過上述上限値則有光阻圖型下部產生底切之虞 〇 上述界面活性劑之添加效果,在於下層膜材料的塗布性 之提升,於包埋材料則在於其塗布性之提升及往蝕刻空間之 埋入的提升。如此之界面活性劑有例如,SURFLON SC -103、SR— 100 (以上,旭硝子(股)製)、ef— 351 (東北 肥料(股)製)、FLOURAD Fc— 431、FLUORAD Fc— 135 FLUORAD Fc- 98 > FLOURAD Fc- 430 ^ FLUORAD Fc- 176 (以上,住友3]y[(股)製),MEGAFAC R09 (大日本 油墨(股)製)等氟系界面劑。 該界面活性劑之添加量,較佳者爲設定於不及下層膜材 料中全部固體成分之200ppm的範圍。 其次,參照第4圖再度說明本發明之第一電路形成方法 -34 - (31) 1258635 。本發明之第一電路形成方法,首先係於矽晶圓等基板1 ο 1 a 上層合介電體層101b而成之半導體基板1〇1上,使用上述本 發明之微影用下層膜形成材料,形成下層膜102 (下層膜形 成過程(a ))。 其次,於上述下層膜102上形成光阻層103,於該光阻層 103施以曝光及顯像處理,形成特定光阻圖型103 (光阻圖型 形成過程(b ))。 上述光阻圖型1〇4未覆蓋之上述下層膜102之露出部份以 乾式蝕刻去除(下層膜圖型化過程(c))。 以上述光阻圖型104及圖型化下層膜1〇2爲遮罩,蝕刻上 述基板101之介電體層101b形成特定電路圖型105 (電路圖型 形成過程(d ))。 形成上述電路圖型105後之基板101上殘留之上述下層膜 102及光阻圖型104以光阻剝離液同時去除(下層膜去除過程 (e ) ) ° 本發明之電路形成方法,其特徵爲:含這些過程(a) 至(e )。上述電路圖型105,例如,經導體材料之包埋,形 成電路層。該方法之說明係假定最簡單之電路構造,當然亦 適用於多層電路層所成,各上下層以介層電路電連接之構造 的多層電路構造。本發明方法之構成係示以必要最低限之過 程。且該方法係假定爲所謂大馬士革製程,而爲得多層構造 時,即必然須採用雙大馬士革製程。該雙大馬士革製程,其 特徵爲:稱作溝之配線溝與介層孔連接而形成。形成順序 有先形成溝,再形成介層孔,及反之先形成介層孔,再形成 -35- (32) 1258635 溝者。本發明可採用其任一。 其次參照第5圖說明本發明之第二電路形成方法。本發 明之第二電路形成方法係,首先, 於矽晶圓等基板201a上至少層合以介電體層201b而成之 半導體基板201上,使用上述本發明之含矽二層光阻製程用 下層膜形成材料,形成光阻下層膜202 (下層膜形成過程(a ))。 其次於上述下層膜202上形成光阻材料所成之光阻上層 膜203,於該光阻上層膜203施以曝光及顯像處理,形成特定 光阻圖型204 (上層光阻圖型形成過程(b ))。 上述上層光阻圖型204未覆蓋之上述下層膜202之露出部 份以乾式蝕刻去除,形成下層光阻圖型205 (下層光阻圖型 形成過程(c ))。 以上述上層光阻圖型204及下層光阻圖型205爲遮罩,蝕 刻上述基板201之介電體層201b形成特定電路圖型206 (電路 圖型形成過程(d))。 於形成上述電路圖型20 6後之基板201上所殘留之上述下 層光阻圖型205及上層光阻圖型204以光阻剝離液同時去除( 光阻圖型去除過程(e ))。 本發明之電路形成方法,其特徵爲:含這些過程(a ) 至(e)。於上述電路圖型206,例如,經導體材料之包埋, 形成電路層。本方法之說明係假定最簡單之電路構造,當然 亦適用於多層電路層所成,各上下電路層以介層電路電連接 之構造的多層電路構造。本發明方法之構成係示以必要最低 -36- (33) 1258635 限之過程。該方法係假定爲所謂大馬士革製程,爲得多層構 造’即必然須採用雙大馬士革製程。該雙大馬士革製程,其 特徵爲:稱爲溝之電路溝與介層孔連接而形成,形成順序 有’先形成溝,再形成介層孔,及反之先形成介層孔,再形 成溝。本發明可適用於任一。 其次,參照第6A至6D圖及第7E至7H圖,更詳細說明本 發明之第三電路形成方法。本發明之第三電路形成方法係, 首先, 如第6A圖,於矽晶圓等之基板3018上層合介電體層 30 lb而成之半導體基板301上,使用上述本發明之多層光阻 下層膜形成材料,形成厚膜之光阻下層膜3〇2 (下層膜形成 過程(Ο )。 其之,如第6B圖,於上述下層膜302上用旋塗玻璃材料 形成中間層膜303 (中間層膜形成過程(b ))。 其次,如第6C圖,於上述中間層膜303上形成光阻材料 所成之光阻上層膜3〇4,於該光阻上層膜施以曝光及顯像處 理,形成特定光阻圖型305 (上層光阻圖型形成過程(c ) )° 其次,如第6D圖,以上述上層光阻圖型305爲遮罩以乾 式触刻加工上述中間層膜303,形成中間層圖型306 (中間層 圖型形成過程(d ))。 其次,如第7E圖,以上述中間層圖型306爲遮罩,以乾 式蝕刻加工上述下層膜302,形成下層圖型307 (下層圖型形 成過程(e ))。 -37- (34) 1258635 其次,如第7E圖,以上述下層圖型307爲遮罩,蝕刻上 述基板301之介電體層301b,形成特定電路圖型308 (電路圖 型形成過程(Ο )。 然後,如第7G圖,於形成上述電路圖型308後之基板 301上所殘留之上述下層光阻圖型307以光阻剝離液去除(光 阻圖型去除過程(g ))。 最後,如第7H圖,於上述電路圖型308,以氣相法沈積 導體材料,或以導體材料之包埋,形成電路層309 (電路層 形成過程(b ))。 本發明之第三電路形成方法,其特徵爲:至少含這些 過程(a )至(g )。該方法之說明係假定最簡單之電路構 造,當然亦適用於多層電路層所成,各上下層之電路層以介 層電路電連接構造的多層電路構造。本發明方法之構成,係 示以必要最低限之過程。該方法係假定爲所謂大馬士革製程 ’爲得多層構造時,必然須採用雙大馬士革製程,該雙大 馬士革製程,其特徵爲:稱作溝之電路溝與介層孔連接而 形成’形成順序有,先形成溝,再形成介層孔,及反之先 形成介層孔,再形成溝者。本發明可適用於其任一。 其次,參照第8A至8D圖及第9E至91圖更詳細說明本 發明之第四電路形成方法(雙大馬士革構造形成方法)之 一例。 首先,如第8A圖,於基板401上形成低介電體層(層 間絕緣層)402。於該低介電體層402上形成光阻膜40 3, 予以圖型化。以該圖型化之光阻膜403爲遮罩選擇性蝕刻 -38- (35) 1258635 低介電體層402,繼之去除光阻膜403,如第8B圖,形成電 路溝(trench ) 404。其次,於如上形成電路溝404之低介 電體層402之表面上,沈積以阻障金屬405,於電路溝404 之內面,形成用以提升包埋於電路溝404內之銅與低介電 體層402之粘合性,同時防止銅之氐介電體層402中擴散之 阻障金屬膜。然後,如第8C圖,以電鍍等將銅包埋於電路 溝404內,形成下層電路層406。 其次,以化學硏磨(CMP )去除此時附著於低介電體 層4 02表面之銅及殘餘之阻障金屬405,作低介電體層402 表面之平坦化後,於其上依序層合以第一低介電體層407 、第一蝕刻停止膜408、第二低介電體層409及第二蝕刻停 止膜4 1 0 (層間絕緣層形成過程)。 其次,於上述第二蝕刻停止膜4 1 0上,形成反射防止 膜4 1 1。於該反射防止膜4 1 1上塗布光阻,施以介層孔形成 用之圖型化,形成光阻遮412。其次,如第8D圖,用上述 光阻遮罩4 1 2進行蝕刻,形成貫通反射防止膜4 1 1、第二蝕 刻停止膜410、第二介電體層4〇9、第一鈾刻停止層40 8及 第一低介電體層407,而抵達下層電路層406表面之介層孔 4 1 3 (第一蝕刻空間形成過程)。 繼之,去除上述光阻遮罩412及反射防止膜411後,如 第9 E圖,於上述第二蝕刻停止膜4 1 〇上,塗布上述本發明 之雙大馬士革構造形成用包埋材料,包埋第一蝕刻空間 4 1 3形成包埋材層4 1 4 a,於第一蝕刻空間4 1 3中形成包埋材 4 14b (包埋過程)。 -39- (36) 1258635 如第9 F圖,於該包埋材層4 1 4 a上層合以可用乾式蝕刻 加工之反射防止膜415,於該反射防止膜415上塗布溝形成 用光阻,照射圖型光於該光阻層,以鹼顯像液顯像,形成 光阻圖型4 1 6 (光阻圖型形成過程)。 其次,以該光阻圖型4 1 6爲遮罩,以乾式蝕刻加工光 阻圖型4 1 6未覆蓋之反射防止膜4 1 5的露出部份。繼之,使 用上述光阻圖型416,蝕刻第二鈾刻停止膜410及第二低介 電體層4〇9,形成如第9C圖之溝417 (第二蝕刻空間形成過 程)。 然後,使用剝離液將介層孔413內之包埋材層414a, 以剝離液連同光阻圖型416及反射防止膜415完全去除。此 時’形戶如第9H圖之溝471及介層孔413所成雙大馬士革 構造。 繼之,於上述介層孔413及溝41 7以銅包埋,如第91圖 ’同時形成介層電路418及上層電路層419。藉此,下層電 路層406與上層電路層419以介層電路418電連接的多層電 路構造實現。 上述說明係以先形成介層孔者爲對象,但有先形成溝 者’其可知亦適用本發明方法。 上述說明係於包埋過程後設形成反射防止膜415之過 程’其後的形成光阻圖型4 1 6之過程後,設有以光阻圖型 4 1 6爲遮罩之反射防止膜加工過程,但於本發明方法,並 非特別必要之過程。若設該反射防止膜415,則更可抑制 形成光阻圖型416時之曝光光,加熱之能量於低介電體層 -40 - (37) 1258635 造成不良影響,可更有效防止中毒現象之發生。 各於±述第一電路形成方法之下層膜去除過程(e) ’上述第二電路形成方法的光阻圖型去除過程(e ),上 述第三電路形方法的下層圖型去除過程(g),及上述第 四電路形成方法之包埋材去除過程(h)中其所用之上述 光阻剝離液’係以至少含有選自水溶性胺,及四級銨氫氧 化物中之至少一種爲佳。其中較佳者係用,含四級銨氫氧 化物之光阻剝離液。 上述水溶性胺以選自烷醇胺,及烷基胺之至少一種爲 佳。 含有如此之胺系剝離液之系的剝離劑,亦可更配合以 非胺係水溶性有機溶劑、水、防蝕劑、界面活性劑等。 上述非胺系水溶性有機溶劑有例如,二甲亞硕等亞硕 類;二甲基®、二乙基硕、雙(2—羥基乙基)碾、四亞甲 基碾等硕類;N,N—二甲基甲醯胺、N—甲基甲醯胺、N,N 一二甲基乙醯胺、N—甲基乙醯胺、N,N—二乙基乙醯胺等 醯胺類;N —甲基—2 —吡咯烷酮、N -乙基一 2 —吡咯烷酮、 N —羥基甲基一 2 —吡咯烷酮、N —羥基乙基一 2 —吡略烷酮 等內醯胺類;/3 —丙內酯、7 —丁內酯、7 —戊內醋、5 — 戊內酯、7 —己內酯、ε—己內酯等內酯類;1,3—二甲基 —2 —味卩坐D定酮|、1’ 3 — 一乙基一 2 —味卩坐卩定酮|、1,3 —二異 丙基一 2 —咪唑啶酮等咪唑啶酮類;乙二醇、乙二醇單甲醚 、乙二醇單乙醚、乙二醇單丁醚、乙二醇單乙酸酯、乙二醇 單甲醚乙酸酯、乙二醇單乙醚乙酸酯、二乙二醇、二乙二醇 • 41 - (38) 1258635 單乙酸酯、二乙二醇單甲醚、二乙二醇單乙醚、二乙二醇單 丁醚、丙二醇、丙二醇單甲醚、二丙二醇單甲醚、甘油、1 ,2— 丁二醇、1,3 — 丁二醇、2,3— 丁二醇等多元醇類及 其衍生物。這些可用一種,亦可混合二種以上使用。 又,本發明方法中,上述下層膜的弩離處理前,亦可設 有以臭氧水及/或雙氧水接觸之過程。臭氧水以用純水中以 臭氧氣體經冒泡等手段溶解者爲佳。臭氧含有濃度可在 lppm以上至飽和濃度之間,雙氧水可用濃度〇·ι至60質量% 之水溶液。接觸方法有浸泡法、浸置法、淋灑法等。經施以 如此之前處理,上述第一電路形成方法中,下層膜及光阻膜 之去除性能可提升,上述第二、三電路形成方法中,光阻下 層膜及光阻上層膜之去除性能可提升。 本發明之第一、四電路形成方法中,用以形成光阻層之 光阻組成物無特殊限制,該光阻組成物可用,對水銀燈之j 線、g線、KrF準分子雷射、ArF準分子雷射,以及F2準分子 雷射等曝光光的通常所用之光阻組成物。 又,本發明第二電路形成方法中,用以形成光阻上層膜 之含矽光阻組成物,可用如同上述特開2002 - 033257號公報 所記載者。 本發明第三電路形成方法中,用以形成光阻上層膜之光 阻組成物可以,KrF、ArF、F2e準分子雷射或電子束用之常 用光阻材料依常法使用。 本發明第一至四電路形成方法中,曝光、顯像處理可用 通常的微影術中常用之製程。 • 42 _ (39) 1258635 本發明第三電路形成方法中,用以形成上述中間層的矽 氧化膜材料,可用各種含矽聚合物。其中以用旋塗玻璃材料 爲合適。如此之旋塗玻璃材料係選自 (A) Si ( OR1) a ( 〇R^) b ( OR3) c ( 〇R^) d (式中R1,R2,R3及R4各自獨立,係碳原子數1至4之 烷基或苯基,a,b,c及 d 係 Osa s4,Osb <4,Os cs4, 0^cU4,且滿足a + b + c + d = 4之條件的整數。)之化合物, (B ) R5Si ( OR6) e ( OR7) f ( 〇R5) £ (式中R5係氫原子或碳原子數1至4之烷基,R6,R7及 R8各係碳原子數1至3之烷基或苯基,e,f及g係Ose $3, ,〇^g<3,且滿足e + f+g = 3之條件的整數。)之化合物 5以及 (C ) R9R10Si ( OR11 ) b ( OR12 ) i (式中R9及R1G係氫原子或碳原子數1至4之烷基,R11 及R12各係碳原子數1至2之烷基或苯基,h及I係0sh^2, ,且滿足h + ^2之條件的整數。)之化合物的至少一種 化合物於水之存在下藉由酸之作用水解而得者。 -43 · (40) 1258635 上述(A )之化合物有例如,四甲氧基矽烷、四乙氧基 矽烷、四丙氧基矽烷、四丁氧基矽烷、四苯氧基矽烷、三甲 氧基單乙氧基矽烷、二甲氧基二乙氧基矽烷、三乙氧基單甲 氧基矽烷、三甲氧基單丙氧基矽烷、單甲氧基三丁氧基矽烷 、單甲氧基三苯氧基矽烷、二甲氧基二丁氧基矽烷、三乙氧 基單丁氧基矽烷、二乙氧基二丙氧基矽烷、三丁氧基單丙氧 基矽烷、二甲氧基單乙氧基單丁氧基矽烷、二乙氧基單甲氧 基單丁氧基矽烷、二乙氧基單丙氧基單丁氧基矽烷、二丙氧 基單甲氧基單乙氧基矽烷、二丙氧基單甲氧基單丁氧基矽烷 二丙氧基單乙氧基單丁氧基矽烷、二丁氧基單甲氧基單乙氧 基矽烷、二丁氧基單乙氧基單丙氧基矽烷、單甲氧基單乙氧 基丙氧基單丁氧基等四烷氧基矽烷或該等之低聚物,其中以 四甲氧基矽烷、四乙氧基矽烷或該等之低聚物爲佳。 上述(B )之化合物有例如,三甲氧基矽烷、三乙氧基 矽烷、三丙氧基矽烷、三苯氧基矽烷、二甲氧基單乙氧基矽 院、二乙氧基單甲氧基砂院、二丙氧基單甲氧基砂院、二丙 氧基單乙氧基矽烷 '二苯氧基單甲氧基矽烷、二苯氧基單乙 氧基砂院、二苯氧基單丙氧基砂院、甲氧基乙氧基丙氧基5夕 烷、單丙氧基二甲氧基矽烷、單丙氧基二乙氧基矽烷、單丁 氧基二甲氧基矽烷、單苯氧基二乙氧基矽烷、甲基三甲氧基 砂院、甲基二乙氧基ϊ夕院、甲基三丙氧基5夕院、乙基三甲氧 基石夕院、乙基二丙氧基砂院、乙基三苯氧基砂院、丙基三甲 氧基砂院、丙基二乙氛基砂院、丙基三苯氧基5夕院、丁基三 甲氧基矽烷、丁基三乙氧基矽烷、丁基三丙氧基矽烷、丁基 -44 - (41) 1258635 三苯氧基矽烷、甲基單甲氧基二乙氧基矽烷、乙基單甲氧基 二乙氧基矽烷、丙基單甲氧基二乙氧基矽烷、丁基單甲氧基 二乙氧基矽烷 '甲基單甲氧基二丙氧基矽烷、甲基單甲氧基 二苯氧基矽烷、乙基單甲氧基二丙氧基矽烷、乙基單甲氧基 二苯氧基矽烷、丙基單甲氧基二丙氧基矽烷、丙基單甲氧基 二苯氧基矽烷、丁基單甲氧基二丙氧基矽烷、丁基單甲氧基 二苯氧基矽烷、甲基甲氧基乙氧基丙氧基矽烷、丙基甲氧基 乙氧丙氧基矽烷、丁基甲氧基乙氧基丙氧基矽烷、甲基單甲 氧基單乙氧基單丁氧基矽烷、乙基單甲氧基單乙氧基單丁氧 基矽烷、丙基單甲氧基單乙氧基單丁氧基矽烷、丁基單甲氧 基單乙氧基單丁氧基矽烷等、其中以三甲氧基矽烷、三乙氧 基矽烷爲佳。 上述(C)之化合物有例如,二甲氧基矽烷、二乙氧基 矽烷、二丙氧基矽烷、二苯氧基矽烷、甲氧基乙氧基矽烷、 甲氧基丙氧基矽烷、甲氧基苯氧基矽烷、乙氧基丙氧基矽烷 、乙氧基苯氧基矽烷、甲基二甲氧基矽烷、甲基甲氧基乙氧 基石夕院、甲基一乙氧基ϊ夕院、甲基甲氧基丙氧基砂院、甲基 甲氧基苯氧基矽烷、乙基二丙氧基矽烷、乙基甲氧基丙氧基 石夕院、乙基二苯氧基5夕院、丙基二甲氧基砂院、丙基甲氧基 乙氧基矽烷、丙基乙氧基丙氧基矽烷、丙基二乙氧氧基矽烷 、丙基二苯氧基矽烷、丁基二甲氧基矽烷、丁基甲氧基乙氧 基矽烷、丁基二乙氧基矽烷、丁基乙氧基丙氧基矽烷、丁基 二丙氧基矽烷、丁基甲基苯氧基矽烷、二甲基二甲氧基矽烷 、二甲基甲氧基乙氧基矽烷、二甲基二乙氧基矽烷、二甲基 •45 - (42) 1258635 二苯氧基矽烷、二甲基乙氧基丙氧基矽烷、二甲基二丙氧基 矽烷、二乙基二甲氧基矽烷、二乙基甲氧基丙氧基矽烷、二 乙基二乙氧基丙氧基矽烷、二丙基二甲氧基矽烷、二丙基二 乙氧基矽烷、二丙基二苯氧基矽烷、二丁基二甲氧基矽烷、 二丁基一乙氧基矽烷、二丁基二丙氧基矽烷、二丁基甲氧基 苯氧基矽烷、甲基乙基二甲氧基矽烷' 甲基乙基二乙氧基矽 烷、甲基乙基二丙氧基矽烷、甲基乙基二苯氧基矽烷、甲基 丙基二甲氧基矽烷、甲基丙基二乙氧基矽烷、甲基丁基二甲 氧基矽烷、甲基丁基二乙氧基矽烷、甲基丁基二丙氧基矽烷 、甲基乙基乙氧基丙氧基矽烷、乙基丙基二甲氧基矽烷、乙 基丙基甲氧基乙氧基矽烷、二丙基二甲氧基矽烷、二丙基甲 氧基乙氧基矽烷、丙基丁基二甲氧基矽烷、丙基丁二乙氧基 矽烷、二丁基甲氧基丙氧基矽烷、丁基乙氧基丙氧基矽烷等 ,其中以二甲基矽烷、二乙氧基矽烷、甲基二甲氧基矽烷爲 佳。 中間層旋塗玻璃材料的乾式蝕刻之蝕刻氣體,係使用以 乞IJ碳系氣體爲主要成分之氣體。 本發明下層膜材料的乾式蝕刻之蝕刻氣體,係使用以氧 葯氣體爲主要成分之氣體。 本發明第四電路形成方法中,電路層用之導體材料以 Cu爲佳,Cu以外亦可用Ci]合金、Al、A1合金等。包埋電路 層係以電鍍法等形成,但無特殊限制。(2) (wherein n is an integer of 1 or more, and r3 is selected from a hydrogen atom, a fluorine atom, a hydroxyl group 'carboxy group, a hydroxyalkyl group having 1 to 5 carbon atoms, and an alkyloxy group having 1 to 5 carbon atoms. At least one of the alkyl groups, a Z-based carbon atom to a straight chain or a branched alkyl chain of '1' or an alicyclic cyclic alkyl chain, an alkyl ester chain.) The copolymer component of the copolymer or the mixed resin of the resin compound having the repeating '30-(27) 1258635 unit of the above general formula (2) is a derivative copolymer of the above general formula (2), a polymer When the underlayer film material is composed of a resin component, the monolayer of the resin component is preferable because the lithography process using a KrF excimer laser is highly neutral. The solvent used for the underlayer film forming material of the present invention is not particularly limited as long as it is an underlayer film forming material, and can be used. Specifically, there are, for example, acetone, methyl ethyl ketone, cyclopentanone, cyclohexyl isopropyl ketone, 2-heptanone, ketone diol such as 1,1,^-trimethylacetone, ethylene glycol monomethyl ether, and B. Glycol monoethyl ether, ethylene glycol monobutyl glycol monoacetate, ethylene glycol monomethyl ether acetate, ethylene glycol monoethyl ester, diethylene glycol, diethylene glycol monoacetate, diethyl Glycol monomethyl glycol monoethyl ether, diethylene glycol monobutyl ether, propylene glycol, propylene glycol, dipropylene glycol monomethyl ether, glycerin, 1,4-butanediol, 1,3 -, 2' 3-butanediol, etc. Polyols and their derivatives; such as dioxanes; ethyl lactate, methyl acetate, ethyl acetate, butyl acetate, methyl ester, ethyl pyruvate 'methyl 3-methoxypropionate, 3- Esters such as ethoxyethyl ester; sub-classes such as dimethyl ya mill; dimethyl mill, bis-hydroxy hydroxyethyl), and so on; N, N-dimethyl, N-A Indoleamines such as carbamide, N,N-dimethylacetamide, N-methyl, N,N-diethylacetamide; N-methyl-2-pyryl, N-ethyl- 2 pyrrolidone, n-hydroxymethyl-2-pyrrol each Intrinsic amines such as phenylethyl 2-pyrrolidone; - propiolactone butyrolactone, 7-valerolactone, δ-valerolactone, 7-caprolactone, ε Ketone, A; ether, ether acetate ether, dimethyl ether butanediol ring ether pyruvate propionic acid, bis (2 carbamide acetoxime oxime ketone, Ν X ry ——内-31 - (28) 1258635 Ester and other lactones; 1,3-dimethyl-2-imidazolidinone, 1,3-diethyl-2-imidazolidinone, 1,3-diisopropyl An imidazolidone or the like such as 2-imidazolidinone, etc. These may be used alone or in combination of two or more. The underlayer film forming material of the present invention may contain a crosslinking agent, and such a crosslinking agent may be used in the present invention. The resin component is crosslinked without any particular limitation, and a nitrogen-containing compound having an amine group and/or an imine group, all of the amine group and/or an imine group present in the nitrogen-containing compound, and at least a dihydrogen atom via the hydroxyl group The alkyl group and/or the alkoxyalkyl group-substituted nitrogen-containing compound is preferred. The number of the above substituents is 2 or more in the nitrogen-containing compound, and is substantially 6 or less. Examples of the melamine-based compound, the urea-based compound, the guanamine-based compound, the acetaminophen-based compound, the benzoguanamine-based compound, the glycoluril-based compound, the succinimide-based compound, and the ethylene-urea compound, and the amine group and And a compound having two or more hydrogen atoms of an imido group substituted with a methylol group or an alkoxymethyl group or both. The nitrogen-containing compound may, for example, be a melamine-based compound, a urea-based compound or a guanamine-based compound. a compound, an acetamide compound, a benzoguanamine compound, a glycoluril compound, an amber amide compound, an ethylene urea compound, etc., is reacted with fumarin in boiling water to form a methylol group, or more The lower alcohol, specifically, alkoxylated by reaction of methanol, ethanol, n-propanol, isopropanol, n-butanol or isobutanol. When the above-mentioned crosslinking agent uses the above-mentioned hydroxyalkyl group and/or alkoxyalkyl group and a condensation reaction product with a monohydroxymonocarboxylic acid, the effect of the shape of the lower part of the photoresist pattern can be improved (prevention of the foot shape). good. -32- (29) 1258635 The above monohydroxymonocarboxylic acid, in which a hydroxyl group and a carboxyl group are bonded to the same carbon atom' or two adjacent carbon atoms, is preferably prevented in the form of a foot. When a condensation reaction with a monohydroxymonocarboxylic acid is used, the monohydroxy carboxylic acid is condensed with a molar ratio of 0.01 to 6 moles, preferably 0.1 to 5 moles, per mole of the crosslinking agent before condensation. The use of the reactant obtained by the reaction is preferred because the effect of preventing the shape of the foot is obtained. In the first, second and third underlayer film forming materials of the present invention, the above-mentioned crosslinking agent may be used alone or in combination of two or more. Further, when necessary, a high light absorbing component, an acidic compound, a surfactant, and a second and third underlayer film forming material of the present invention may be added to the first underlayer film forming material and the embedding material according to the present invention. A highly light absorbing component, an acidic compound, or a surfactant may be added as necessary. The addition effect of the above-mentioned highly light-absorbing component is that the absorption characteristics of the exposure light are further improved. When the highly light-absorbing component has an absorption characteristic of the exposure light irradiated to the photoresist layer, it is possible to prevent the standing wave generated by the reflection of the exposure light from being reflected by the substrate, and scattering due to the difference in height between the surface of the substrate is not particularly limited. Such a substance is, for example, a water waking compound, a diphenyl ketone compound, a benzotriazole compound, a cyanoacrylate compound, an azo compound, a polyene compound, a quinone compound, Any of a master compound (preferably a diphenyl monolithic compound), an aspirite compound (a bisphenyl sub-system), an anthraquinone compound, or the like can be used. These may be used alone or in combination of two or more. Among them, an anthraquinone compound having at least one substituent selected from the group consisting of a hydroxyl group, a hydroxyalkyl 'alkoxyalkyl group, and a carboxyl group, a diphenyl macro compound, and a double The phenyl sub-synthesis compound and the monophenyl ketone-based compound preferably have at least one selected from the group consisting of -33 - (30) 1258635 because of their high absorption characteristics. Among them, particularly preferred are, for example, a lanthanide compound or a diphenyl macro compound. These may be used singly or in combination of two or more. The effect of the addition of the above acidic compound is that the prevention property of the foot is improved. Such acidic compounds include inorganic acids having an acid residue containing sulfur, organic acids or esters thereof, and compounds which generate an acid with an active light (an acid generator such as a salt). In the first underlayer film forming material and the embedding material of the present invention, 30 parts by mass of 100 parts by mass of the total solid content is blended, and preferably 20 parts by mass is used as the upper limit. The second and third underlayer film forming materials of the present invention are preferably from 1 to 30 parts by mass, preferably from 0.1 to 20 parts by mass, based on 100 parts by mass of the total solid content. If the amount is too small, the effect is not added. If the upper limit is exceeded, the undercut of the photoresist pattern is generated. The effect of the above surfactant is increased by the coating property of the underlying film material, and the embedding material is Improvement in coating properties and enhancement of embedding into the etching space. Such a surfactant is, for example, SURFLON SC-103, SR-100 (above, manufactured by Asahi Glass Co., Ltd.), ef-351 (manufactured by Tohoku Fertilizer Co., Ltd.), FLOURAD Fc-431, FLUORAD Fc-135 FLUORAD Fc- 98 > FLOURAD Fc- 430 ^ FLUORAD Fc- 176 (above, Sumitomo 3] y [manufactured by the company), MEGAFAC R09 (manufactured by Dainippon Ink Co., Ltd.) and other fluorine-based interface agents. The amount of the surfactant added is preferably in the range of 200 ppm which is less than the total solid content of the underlying film material. Next, the first circuit forming method of the present invention - 34 - (31) 1258635 will be described again with reference to Fig. 4. In the first circuit forming method of the present invention, first, the underlying film forming material for lithography of the present invention is used on the semiconductor substrate 1?1 in which the dielectric layer 101b is laminated on the substrate 1 1 1 a such as a germanium wafer. The underlayer film 102 is formed (lower film formation process (a)). Next, a photoresist layer 103 is formed on the underlayer film 102, and an exposure and development process is applied to the photoresist layer 103 to form a specific photoresist pattern 103 (photoresist pattern forming process (b)). The exposed portion of the underlying film 102 which is not covered by the above-described photoresist pattern type 1 4 is removed by dry etching (lower film patterning process (c)). The dielectric pattern 101b of the substrate 101 is etched to form a specific circuit pattern 105 (circuit pattern forming process (d)) by using the photoresist pattern 104 and the patterned lower film 1〇2 as masks. The underlayer film 102 and the photoresist pattern 104 remaining on the substrate 101 after the circuit pattern 105 is formed are simultaneously removed by the photoresist stripping liquid (lower film removing process (e)). The circuit forming method of the present invention is characterized in that: These processes (a) to (e) are included. The above circuit pattern 105 is, for example, embedded in a conductor material to form a circuit layer. The description of the method assumes the simplest circuit configuration, and is of course also applicable to a multilayer circuit structure in which the upper and lower layers are electrically connected by a via circuit. The construction of the method of the invention is illustrated by the necessary minimum. Moreover, the method is assumed to be a so-called Damascus process, and in the case of a multi-layer structure, a double damascene process is necessarily required. The dual damascene process is characterized in that a wiring groove called a trench is connected to a via hole. The order of formation is to form a trench first, then form a via hole, and conversely form a via hole first, and then form a -35- (32) 1258635 trench. The present invention can employ either of them. Next, a second circuit forming method of the present invention will be described with reference to Fig. 5. In the second circuit forming method of the present invention, first, the lower layer of the germanium-containing two-layer photoresist process of the present invention is used on the semiconductor substrate 201 formed by laminating at least the dielectric layer 201b on the substrate 201a such as a germanium wafer. The film forming material forms a photoresist underlayer film 202 (lower film forming process (a)). Next, a photoresist upper layer film 203 formed of a photoresist material is formed on the underlying film 202, and the photoresist upper layer film 203 is subjected to exposure and development processing to form a specific photoresist pattern 204 (upper photoresist pattern formation process) (b)). The exposed portion of the underlying film 202 not covered by the upper photoresist pattern 204 is removed by dry etching to form a lower photoresist pattern 205 (lower photoresist pattern forming process (c)). The upper layer resist pattern 204 and the lower layer resist pattern 205 are used as masks, and the dielectric layer 201b of the substrate 201 is etched to form a specific circuit pattern 206 (circuit pattern forming process (d)). The lower photoresist pattern 205 and the upper photoresist pattern 204 remaining on the substrate 201 after the circuit pattern 20 is formed are simultaneously removed by a photoresist stripping solution (photoresist pattern removing process (e)). The circuit forming method of the present invention is characterized by comprising these processes (a) to (e). The circuit pattern 206 is formed, for example, by embedding a conductor material to form a circuit layer. The description of the method assumes the simplest circuit configuration, and is of course also applicable to a multilayer circuit structure in which the upper and lower circuit layers are electrically connected by a via circuit. The composition of the method of the present invention is shown in the process of the minimum necessary -36- (33) 1258635. This method is assumed to be a so-called Damascus process, which is a multi-layer structure, which necessitates the use of a dual Damascus process. The dual damascene process is characterized in that a circuit trench called a trench is formed by connecting a via hole, and the formation order has a first trench formed, and then a via hole is formed, and a via hole is formed first, and then a trench is formed. The invention is applicable to either. Next, the third circuit forming method of the present invention will be described in more detail with reference to Figs. 6A to 6D and Figs. 7E to 7H. In the third circuit forming method of the present invention, first, as shown in FIG. 6A, the multilayer photoresist underlayer film of the present invention is used on the semiconductor substrate 301 in which the dielectric layer 30 lb is laminated on the substrate 3018 of the wafer or the like. Forming a material to form a thick film photoresist underlayer film 3〇2 (lower layer film formation process (Ο). As shown in FIG. 6B, an intermediate layer film 303 is formed on the underlying film 302 by spin-on glass material (intermediate layer) Film formation process (b)). Next, as shown in FIG. 6C, a photoresist upper film 3〇4 formed of a photoresist material is formed on the interlayer film 303, and an exposure and development process is performed on the photoresist upper film. Forming a specific photoresist pattern 305 (upper photoresist pattern formation process (c)). Next, as shown in FIG. 6D, the intermediate layer film 303 is dry-etched by the above-mentioned upper photoresist pattern 305 as a mask. An intermediate layer pattern 306 is formed (intermediate layer pattern forming process (d)). Next, as shown in Fig. 7E, the lower layer film 302 is processed by dry etching using the above intermediate layer pattern 306 as a mask to form a lower layer pattern 307. (Lower pattern formation process (e)) -37- (34) 1258635 Second, As shown in FIG. 7E, the dielectric layer 301b of the substrate 301 is etched by using the lower layer pattern 307 as a mask to form a specific circuit pattern 308 (circuit pattern forming process (Ο). Then, as shown in FIG. 7G, the circuit pattern is formed. The lower photoresist pattern 307 remaining on the substrate 301 after the type 308 is removed by a photoresist stripping solution (photoresist pattern removing process (g)). Finally, as shown in Fig. 7H, in the above circuit pattern 308, gas is used. The conductor material is deposited by a phase method or embedded in a conductor material to form a circuit layer 309 (circuit layer forming process (b)). The third circuit forming method of the present invention is characterized in that at least these processes (a) to ( g) The description of the method assumes the simplest circuit configuration, and of course applies to a multilayer circuit structure in which the circuit layers of the upper and lower layers are electrically connected by a via circuit. The composition of the method of the present invention is The process of showing the necessary minimum. This method is assumed to be a so-called Damascus process. When it is a multi-layer structure, it is necessary to adopt a dual damascene process. The double damascene process is characterized by: The circuit trench is connected to the via hole to form a 'forming sequence, first forming a trench, then forming a via hole, and conversely forming a via hole first, and then forming a trench. The present invention can be applied to any of them. 8A to 8D and 9E to 91 illustrate in more detail an example of the fourth circuit forming method (double damascene structure forming method) of the present invention. First, as shown in Fig. 8A, a low dielectric layer (interlayer insulating) is formed on the substrate 401. a layer 402 is formed on the low dielectric layer 402 and patterned. The patterned photoresist film 403 is selectively etched by a mask -38- (35) 1258635 low dielectric Body layer 402, followed by removal of photoresist film 403, as shown in FIG. 8B, forms a circuit trench 404. Next, on the surface of the low dielectric layer 402 on which the circuit trench 404 is formed, a barrier metal 405 is deposited on the inner surface of the circuit trench 404 to form copper and low dielectric embedded in the circuit trench 404. The adhesion of the bulk layer 402 while preventing the diffusion of the barrier metal film in the copper dielectric layer 402. Then, as shown in Fig. 8C, copper is buried in the circuit trench 404 by electroplating or the like to form the lower circuit layer 406. Next, the copper adhered to the surface of the low dielectric layer 04 and the residual barrier metal 405 at this time are removed by chemical honing (CMP), and the surface of the low dielectric layer 402 is planarized, and then laminated thereon. The first low dielectric layer 407, the first etch stop film 408, the second low dielectric layer 409, and the second etch stop film 4 10 (interlayer insulating layer forming process). Next, on the second etching stopper film 410, a reflection preventing film 4 1 1 is formed. A photoresist is applied to the anti-reflection film 4 1 1 , and a pattern for forming a via hole is formed to form a photoresist mask 412. Next, as shown in FIG. 8D, the photoresist mask 4 1 2 is etched to form a through-reflection prevention film 4 1 1 , a second etch stop film 410, a second dielectric layer 4〇9, and a first uranium stop layer. 40 8 and the first low dielectric layer 407 reach the via hole 4 1 3 on the surface of the lower circuit layer 406 (first etching space forming process). Then, after removing the photoresist mask 412 and the anti-reflection film 411, the embedding material for forming a double damascene structure of the present invention is applied to the second etch-stop film 4 1 如 as shown in FIG. 9E. The first etching space 4 1 3 is buried to form an embedding material layer 4 1 4 a, and an embedding material 4 14b is formed in the first etching space 4 1 3 (embedding process). -39- (36) 1258635, as shown in FIG. 9F, an anti-reflection film 415 which can be processed by dry etching is laminated on the embedding material layer 4 1 4 a, and a photoresist for trench formation is coated on the anti-reflection film 415. The illuminating pattern is applied to the photoresist layer and developed with an alkali developing solution to form a photoresist pattern 4 16 (photoresist pattern forming process). Next, the exposed portion of the anti-reflection film 4 1 5 which is not covered by the photoresist pattern 4 16 is processed by dry etching using the photoresist pattern 4 16 as a mask. Subsequently, the second uranium stop film 410 and the second low dielectric layer 4〇9 are etched using the photoresist pattern 416 to form a trench 417 as shown in Fig. 9C (second etching space forming process). Then, the embedding material layer 414a in the via hole 413 is completely removed with the stripping liquid together with the photoresist pattern 416 and the anti-reflection film 415 using a stripping solution. At this time, the shape of the dwelling is formed into a double damascene structure such as the groove 471 and the mesopores 413 of the ninth. Then, the via hole 413 and the trench 41 7 are embedded in copper, and a via circuit 418 and an upper circuit layer 419 are simultaneously formed as shown in Fig. 91. Thereby, the lower circuit layer 406 and the upper circuit layer 419 are realized by a multilayer circuit structure in which the via circuit 418 is electrically connected. The above description is directed to those who first form a via hole, but it is known that the trench is formed first. The above description is based on the process of forming the anti-reflection film 415 after the embedding process, and the process of forming the photoresist pattern 416 after the embedding process is provided, and the anti-reflection film processing with the photoresist pattern type 4 16 as a mask is provided. The process, but not the process of the invention, is not particularly necessary. When the anti-reflection film 415 is provided, the exposure light when the photoresist pattern 416 is formed can be suppressed, and the heating energy is adversely affected by the low dielectric layer 40 - (37) 1258635, which can more effectively prevent the occurrence of poisoning. . Each of the first circuit formation methods under the layer film removal process (e) 'the second circuit formation method of the photoresist pattern removal process (e), the third circuit shape method of the lower layer pattern removal process (g) And the above-mentioned photoresist stripping liquid used in the embedding material removing process (h) of the fourth circuit forming method is preferably at least one selected from the group consisting of water-soluble amines and quaternary ammonium hydroxides. . Among them, a preferred one is a photoresist stripping solution containing a quaternary ammonium hydroxide. The above water-soluble amine is preferably at least one selected from the group consisting of an alkanolamine and an alkylamine. The release agent containing such an amine-based release liquid may be further blended with a non-amine-based water-soluble organic solvent, water, an anti-corrosion agent, a surfactant, and the like. The non-amine-based water-soluble organic solvent is, for example, a sub-class such as dimethyl sulfene; a dimethyl group, a diphenyl group, a bis(2-hydroxyethyl) mill, a tetramethylene mill or the like; , N-dimethylformamide, N-methylformamide, N,N-dimethylacetamide, N-methylacetamide, N,N-diethylacetamide N-methyl-2-pyrrolidone, N-ethyl-2-pyrrolidone, N-hydroxymethyl-2-pyrrolidone, N-hydroxyethyl-2-pyrolidone, etc.; - lactones, 7-butyrolactone, 7-pentane vinegar, 5-valerolactone, 7-caprolactone, ε-caprolactone and other lactones; 1,3-dimethyl-2 Sedative D-ketone|, 1' 3 - ethyl 2- 2 - misoprostol, 1,3 -diisopropyl-2-imidazolidinone, etc.; ethylene glycol, B Glycol monomethyl ether, ethylene glycol monoethyl ether, ethylene glycol monobutyl ether, ethylene glycol monoacetate, ethylene glycol monomethyl ether acetate, ethylene glycol monoethyl ether acetate, diethylene glycol , diethylene glycol • 41 - (38) 1258635 monoacetate, diethylene glycol monomethyl ether Diethylene glycol monoethyl ether, diethylene glycol monobutyl ether, propylene glycol, propylene glycol monomethyl ether, dipropylene glycol monomethyl ether, glycerin, 1,4-butanediol, 1,3-butanediol, 2,3- Polyols such as butanediol and derivatives thereof. These may be used alone or in combination of two or more. Further, in the method of the present invention, the process of contacting the underlayer film with ozone water and/or hydrogen peroxide may be carried out before the separation treatment. Ozone water is preferably dissolved in pure water by means of bubbling or the like by ozone gas. The ozone concentration may be between 1 ppm or more and the saturated concentration, and the hydrogen peroxide may be used in an aqueous solution having a concentration of 〇·1 to 60% by mass. The contact method includes a soaking method, a dipping method, a shower method, and the like. After the treatment is performed as described above, in the first circuit forming method, the removal performance of the underlying film and the photoresist film can be improved, and in the second and third circuit forming methods, the removal performance of the photoresist underlayer film and the photoresist upper film can be improved. Upgrade. In the first and fourth circuit forming methods of the present invention, the photoresist composition for forming the photoresist layer is not particularly limited, and the photoresist composition is usable, and the j-line, g-line, KrF excimer laser, and ArF of the mercury lamp are used. Quasi-molecular lasers, as well as photoresist compositions commonly used for exposure light such as F2 excimer lasers. Further, in the second circuit forming method of the present invention, the ruthenium-containing photoresist composition for forming the photoresist upper layer film can be used as described in the above-mentioned JP-A-2002-033257. In the third circuit forming method of the present invention, the photoresist composition for forming the photoresist upper layer film may be a conventional photoresist method for KrF, ArF, F2e excimer laser or electron beam. In the first to fourth circuit forming methods of the present invention, the exposure and development processes can be performed by a process commonly used in usual lithography. • 42 _ (39) 1258635 In the third circuit forming method of the present invention, various cerium-containing polymers can be used for the ruthenium oxide film material for forming the above intermediate layer. Among them, spin-on glass materials are suitable. Such a spin-on glass material is selected from (A) Si (OR1) a ( 〇R^) b ( OR3) c ( 〇R^) d (wherein R1, R2, R3 and R4 are each independently, and the number of carbon atoms is An alkyl group of 1 to 4 or a phenyl group, a, b, c and d are Osa s4, Osb < 4, Os cs4, 0^cU4, and an integer satisfying the condition of a + b + c + d = 4. a compound, (B) R5Si (OR6) e ( OR7) f ( 〇R5) £ (wherein R 5 is a hydrogen atom or an alkyl group having 1 to 4 carbon atoms, and R 6 , R 7 and R 8 are each a carbon number of 1 to 3 alkyl or phenyl, e, f and g are Ose $3, , 〇^g < 3, and an integer satisfying the condition of e + f + g = 3.) Compound 5 and (C) R9R10Si (OR11) b ( OR12 ) i (wherein R 9 and R 1 G are a hydrogen atom or an alkyl group having 1 to 4 carbon atoms; R 11 and R 12 are each an alkyl group having 1 to 2 carbon atoms or a phenyl group; h and I are 0 sh 2 2 And at least one compound of the compound satisfying the condition of h + ^2.) is obtained by hydrolysis of an acid by the action of an acid in the presence of water. -43 · (40) 1258635 The compound of the above (A) is, for example, tetramethoxynonane, tetraethoxydecane, tetrapropoxydecane, tetrabutoxydecane, tetraphenoxydecane, trimethoxyl Ethoxy decane, dimethoxydiethoxy decane, triethoxy monomethoxy decane, trimethoxy monopropoxy decane, monomethoxy tributoxy decane, monomethoxy triphenyl Oxydecane, dimethoxydibutoxydecane, triethoxy monobutoxydecane, diethoxydipropoxydecane, tributoxymonopropoxydecane, dimethoxylethane Oxylobutoxy decane, diethoxy monomethoxy monobutoxy decane, diethoxy monopropoxy monobutoxy decane, dipropoxy monomethoxy monoethoxy decane, Dipropoxy monomethoxy monobutoxydecane dipropoxy monoethoxy monobutoxydecane, dibutoxy monomethoxy monoethoxy decane, dibutoxy monoethoxy single a tetraalkoxy decane such as propoxy decane, monomethoxy monoethoxypropoxy monobutoxy or the like, wherein tetramethoxy decane, tetraethoxy decane The preferred such oligomers. The compound of the above (B) is, for example, trimethoxy decane, triethoxy decane, tripropoxy decane, triphenyloxydecane, dimethoxy monoethoxy oxime, diethoxy monomethoxy Base sand, dipropoxy monomethoxy sand, dipropoxy monoethoxy decane 'diphenoxy monomethoxy decane, diphenoxy monoethoxy sand, diphenoxy Monopropoxy sand, methoxyethoxypropoxy-5, monopropoxydimethoxydecane, monopropoxydiethoxydecane, monobutoxydimethoxydecane, Monophenoxy diethoxy decane, methyl trimethoxy sand, methyl diethoxy oxime, methyl tripropoxy 5 cesium, ethyl trimethoxy shixi, ethyl dipropyl Oxygen sand yard, ethyl triphenoxy sand court, propyl trimethoxy sand court, propyl diethoxylate sand garden, propyl triphenyloxy 5 Xiyuan, butyl trimethoxy decane, butyl Triethoxy decane, butyl tripropoxy decane, butyl-44 - (41) 1258635 triphenyloxydecane, methyl monomethoxydiethoxydecane, ethyl monomethoxydiethoxy Base decane Diethoxy decane, butyl monomethoxydiethoxy decane 'methyl monomethoxy dipropoxy decane, methyl monomethoxy diphenoxy decane, ethyl mono methoxy Propoxydecane, ethyl monomethoxydiphenoxydecane, propyl monomethoxydipropoxydecane, propyl monomethoxydiphenoxydecane, butyl monomethoxydipropoxy Baseline, butyl monomethoxydiphenoxydecane, methylmethoxyethoxypropoxydecane, propylmethoxyethoxypropoxydecane, butylmethoxyethoxypropoxydecane , methyl monomethoxy monoethoxy monobutoxy decane, ethyl monomethoxy monoethoxy monobutoxy decane, propyl monomethoxy monoethoxy monobutoxy decane, butyl The monomethoxymethoxy monoethoxy monobutoxydecane or the like is preferably trimethoxydecane or triethoxysilane. The compound of the above (C) is, for example, dimethoxydecane, diethoxydecane, dipropoxydecane, diphenoxydecane, methoxyethoxydecane, methoxypropoxydecane, A Oxyphenoxydecane, ethoxy propoxy decane, ethoxyphenoxydecane, methyl dimethoxy decane, methyl methoxy ethoxy shixi, methyl monoethoxy oxime Institute, methyl methoxypropoxy sand court, methyl methoxy phenoxy decane, ethyl di propoxy decane, ethyl methoxy propoxy oxa sylvestre, ethyl diphenoxy 5 Home, propyl dimethoxy sand, propyl methoxy ethoxy decane, propyl ethoxy propoxy decane, propyl diethoxy decane, propyl diphenoxy decane, butyl Dimethoxydecane, butyl methoxy ethoxy decane, butyl diethoxy decane, butyl ethoxy propoxy decane, butyl dipropoxy decane, butyl methyl phenoxy decane, dimethyl Dimethoxy decane, dimethyl methoxy ethoxy decane, dimethyl diethoxy decane, dimethyl • 45 - (42) 1258635 diphenoxy decane, dimethyl Oxypropoxydecane, dimethyldipropoxydecane, diethyldimethoxydecane, diethylmethoxypropoxydecane, diethyldiethoxypropoxydecane, dipropyl Dimethoxy decane, dipropyl diethoxy decane, dipropyl diphenoxy decane, dibutyl dimethoxy decane, dibutyl monoethoxy decane, dibutyl dipropoxy Decane, dibutylmethoxyphenoxydecane, methylethyldimethoxydecane', methylethyldiethoxydecane, methylethyldipropoxydecane, methylethyldiphenoxydecane , methyl propyl dimethoxy decane, methyl propyl diethoxy decane, methyl butyl dimethoxy decane, methyl butyl diethoxy decane, methyl butyl di propoxy decane , methyl ethyl ethoxy propoxy decane, ethyl propyl dimethoxy decane, ethyl propyl methoxy ethoxy decane, dipropyl dimethoxy decane, dipropyl methoxy Ethoxy decane, propyl butyl dimethoxy decane, propyl butane diethoxy decane, dibutyl methoxy propoxy decane, butyl ethoxy propoxy decane, etc. Among them, dimethyl decane, diethoxy decane, and methyl dimethoxy decane are preferred. The etching gas for dry etching of the intermediate layer spin-coated glass material is a gas containing a ruthenium IJ carbon-based gas as a main component. The etching gas for dry etching of the underlayer film material of the present invention is a gas containing a gas as a main component. In the fourth circuit forming method of the present invention, the conductor material for the circuit layer is preferably Cu, and the Cu alloy, Al, Al alloy or the like may be used in addition to Cu. The embedding circuit layer is formed by electroplating or the like, but is not particularly limited.

可用於上述低介電體層之材料有碳摻雜氧化物(Si〇c )系、甲基矽倍半氧烷(M S Q系)、羥基矽倍半氧烷(H S Q -46 - (43) 1258635 )系低介電體材料。上述碳摻雜氧化物系之低介電體材料 ’具體有,Apllied Materials 公司製之 BLACK DIAMOND (商 品名)、Novelus Systems 公司之CORAL (商品名)、臼本 AS Μ公司製之Aurora (商品名)等。又,上述甲基矽倍半氧 院系之低介電體材料,具體有,東京應化工業(股)製以 、、〇CD T- 9"、、、〇CD T - 11"、、、〇CL· T - 31"、、、〇CL· T— 37〃 、、'〇CL T 一 39"商品名販賣之材料等。上述羥基 石夕倍半氧烷系低介電體材料,具體有,東京應化工業(股 )製以 '、〇CD Τ— 12"、、、〇CL Τ 一 32"商品名販賣之材料 等。 本發明第四電路形成方法中,低介電體層可形成於上述 電路層上,或於電路層上形成阻障膜(蝕刻停止層:SiN、 SiC、SiCN、Ta、TaN等)再形成於其上。低介電體層之煅 燒溫度,通常係於3 5 0 °C以上作硬烘烤。 上述光阻層可經微影法,使用對水銀燈之1線、g線、 KrF準分子雷射、ArF準分子雷射、F2準分子雷射、電子束( EB: Electron Beam)慣用之光阻材料。 本發明第四電路形成方法中,必要時設之上述反射防止 膜可用,能以慣用之CF4系蝕刻氣體,以2 + 〇2系蝕刻氣體去除 之市售材料。由該反射防止膜將曝光光吸收,可防其入射於 下層。市售反射防止膜材料有,東京應化工業(股)製以 '' SWK — EX1D55" 、、、SWK- EX3" 、、'SWK- EX4"、、、 SWK — T5D6CT 、 vv SWK — T7 "等商品名販售之材料, Brewer Science 公司製以 — 42." 、 、、DUV — 44"、 '、 -4/- (44) 1258635 ARC— 28〃 、 " ARC- 29"等商品名販售之材料,Shipley公 司製以'' AR — 3〃 、 AR — 19〃等商品名銷售之材料等。 使用上述反射防止膜時,如上述,形成第二蝕刻空間, 去除第一蝕刻空間內之包埋材後,進行光阻膜及反射防止膜 之去除。 這些反射防止膜,通常係以氧電漿打磨處理去除,此時 ,有於低介電體層造成損傷之虞,打磨處理之採用誠屬不佳 。因而,本發明中,反射防止膜之去除處理,係以藉殘餘的 反射防止膜下層之包埋材層的去除、剝離而實現爲佳。 尤以低介電體層係用羥基矽倍半氧烷系材料時,係以 He、Ar等惰性氣體所生之電漿照射進行處理,作低介電體 層表面之改質。經該表面改質處理,殘餘之反射防止膜及光 阻圖型,可不於低介電體層造成損傷,以氧電漿處理去除。 以下說明本發明之實施例。以下實施例不過係爲妥適說 明本發明之例示,本發明絕非僅限於此。 以下實施例1至5及比較例1係有關本發明之第一下層膜 形成材料及電路形成方法。 (實施例1至4 ) 調製以下(A ) 、( B ) 、( C )及(D )樹脂組成物作 爲下層膜形成材料。 (A )溶解對苯乙烯磺酸乙酯所成之樹脂成分於γ 一 丁內醋/乳酸乙酯(2: 8 )所成之溶劑,固體成分濃度調整 爲6重量%之樹脂組成物。 -48 - (45) 1258635 (B ) 溶解對苯乙烯磺酸乙酯:丙烯酸羥基乙酯(-5 : 5 )所成的樹脂成分,及相當於該樹脂成分的2〇重量%之 CYMEL Π72 (三井Cyanamid公司製四羥甲基甘脲)於乳酸 乙酯所成之溶劑,固體成分濃度調整爲6重量%之樹脂組成 物。Materials which can be used for the above low dielectric layer are carbon doped oxide (Si〇c), methyl sesquioxanes (MSQ), hydroxy sesquioxanes (HSQ-46 - (43) 1258635) Low dielectric material. The above-mentioned carbon-doped oxide-based low dielectric material 'specifically, BLACK DIAMOND (trade name) manufactured by Apllied Materials Co., Ltd., CORAL (trade name) of Novelus Systems, and Aurora (trade name) manufactured by Sakamoto AS Co., Ltd. )Wait. Further, the above-mentioned low dielectric material of the methyl sesquioxane system, specifically, Tokyo Chemical Industry Co., Ltd., 〇CD T- 9",, 〇CD T - 11", 〇CL· T - 31",,,〇CL·T—37〃,, '〇CL T-39", the name of the product sold. The above-mentioned hydroxy sesquioxane-based low dielectric material, specifically, Tokyo Toka Chemical Industry Co., Ltd., ', 〇CD Τ 12", 〇CL Τ 32 32" . In the fourth circuit forming method of the present invention, the low dielectric layer may be formed on the circuit layer, or a barrier film (etch stop layer: SiN, SiC, SiCN, Ta, TaN, etc.) may be formed on the circuit layer. on. The calcination temperature of the low dielectric layer is usually hard baked at above 350 °C. The photoresist layer may be subjected to a lithography method using a photoresist for a mercury lamp, a g-line, a KrF excimer laser, an ArF excimer laser, an F2 excimer laser, or an electron beam (EB: Electron Beam). material. In the fourth circuit forming method of the present invention, if necessary, the above-mentioned antireflection film can be used, and a commercially available material which can be removed by a conventional CF4 etching gas and a 2 + 〇2 etching gas can be used. The reflection preventing film absorbs the exposure light to prevent it from entering the lower layer. Commercially available anti-reflection film materials are available from Tokyo Chemical Industry Co., Ltd. as ''SWK-EX1D55",,, SWK-EX3", 'SWK-EX4",, SWK-T5D6CT, vv SWK-T7 " The materials sold by the trade name, Brewer Science, etc. - 42." , , , DUV — 44", ', -4/- (44) 1258635 ARC— 28〃 , " ARC- 29" Materials sold by Shipley are sold under the trade names of ''AR' 3', AR' 19', etc. When the antireflection film is used, as described above, the second etching space is formed, and after the embedding material in the first etching space is removed, the photoresist film and the antireflection film are removed. These anti-reflection films are usually removed by an oxygen plasma polishing treatment. At this time, the damage caused by the low dielectric layer is not good. Therefore, in the present invention, the removal treatment of the anti-reflection film is preferably carried out by removing or peeling off the embedding material layer of the lower layer of the anti-reflection film. In particular, in the case of a low dielectric layer hydroxy sesquioxane-based material, it is treated by plasma irradiation of an inert gas such as He or Ar to improve the surface of the low dielectric layer. After the surface modification treatment, the residual anti-reflection film and the photoresist pattern can be removed by the oxygen plasma treatment without causing damage to the low dielectric layer. Embodiments of the invention are described below. The following examples are merely illustrative of the invention and the invention is in no way limited thereto. The following Examples 1 to 5 and Comparative Example 1 relate to a first underlayer film forming material and a circuit forming method of the present invention. (Examples 1 to 4) The following resin compositions (A), (B), (C) and (D) were prepared as the underlayer film forming material. (A) A resin composition obtained by dissolving a resin component of ethyl p-styrenesulfonate in γ-butyrolactone/ethyl lactate (2:8), and a resin composition having a solid content concentration adjusted to 6% by weight. -48 - (45) 1258635 (B ) A resin component obtained by dissolving ethyl p-styrenesulfonate: hydroxyethyl acrylate (-5:5), and CYMEL® 72 equivalent to 2% by weight of the resin component ( A solvent composed of a tetramethylol glycoluril manufactured by Mitsui Cyanamid Co., Ltd. in a solvent of ethyl lactate, and a solid content concentration adjusted to 6% by weight.

(C ) 溶解對苯乙烯磺酸乙酯/丙烯酸9 一羥基蒽酯(5 : 5)所成的樹脂成分於r 一 丁丙酯/乳酸乙酯(h 8)所成之 溶劑,調製成固體成分濃度6重量%之樹脂組成物。 (D ) 溶解對苯乙烯磺酸乙酯/丙烯酸羥基乙酯/丙烯酸 9 一羥基蒽酯(4: 3: 3 )所成之樹脂成分,相當於該樹脂的 20重量%2CYMEL 1172(三井Cyanamid (股)製四羥甲基甘 脲),及相當於上述二者之固體成分量的lOOOppm之 MEGAFAC R08 (大日本油墨(股)製氟系界面活性劑)於 乳酸乙酯所成之溶劑,調整固體成分濃度爲6重量%之樹脂 組成物。 各以這些(A ) ( B ) ( C) ( D )之樹脂組成物塗布於 半導體基板上,於20(TC加熱處理90秒,形成膜厚2000埃之 下層膜。 塗布TDUR - P630 (東京應化工業(股)製光阻組成物 )於這些下層膜上,於120°C加熱處理90秒’形成膜厚5000 埃之光阻層。於該光阻層依序施以曝光、曝光後加熱(11〇 °C、90秒)、顯像處理,形成250奈米之光阻圖型。 如上得之光阻圖型未覆蓋之下層膜的露出部份’以使用 氟碳系蝕刻氣體之乾式飩刻去除。以上述光阻圖型,與該光 -49- (46) 1258635 阻圖型同樣圖型化之下層膜爲遮罩,蝕刻其下層基板介電體 層,形成溝或介層孔等之電路構造。 如上形成電路構造後,將基板於二甲亞硕及單乙醇胺之 混合溶劑(混合比=7 : 3 )所成之剝離液於1 〇〇 °c浸泡20分鐘 ,去除光阻圖型及下層膜。 下層膜之剝離處理後的各基板表面以掃猫式顯微鏡觀察 ,評估各電路構造圖型之解析度。結果確認,使用(A )( B ) ( C ) ( D )之任一下層膜材料時,皆可得尺寸控制性優 ,截面形狀良好之矩形圖型。 (實施例5 ) 上述(C)樹脂組成物中,追加配合相當於其樹脂成分 量的3重量%之「光酸產生劑TPS — 109 (綠化學(股)製) 」,調製另一樹脂組成物(C2 )。除使用該樹脂組成物( C2 )以外,如同實施例1形成電路構造。結果,可得尺寸控 制性優,具矩形圖型之電路構造。 (比較例1 ) 以主要成分係交聯劑及吸光性成分之下層膜材料(東京 應化工業公司製:商品名SWK—EX3)塗布於半導體基板上 ,於200°C加熱處理90秒,形成膜厚2000埃之下層膜。塗布 學放大型光阻組成物(東京應化工業公司製:商品名TDUR -P630 )於該下層膜上,於120 °C加熱處理90秒,形成膜厚 5000埃之光阻層。於所得光阻層依序施以曝光、曝光後加熱 -50- (47) 1258635 (11(TC、90秒)、顯像處理,形成250奈米之光阻圖型。 如上得之光阻圖型未覆蓋的下層膜之露出部份’以使用 氟碳系蝕刻氣體之乾式鈾刻去除。以上述光阻圖型,及與該 光阻圖型層同樣圖型化之下層膜爲遮罩,蝕刻其下層之基板 介電體層,形成溝或介層孔等之電路構造。 如上形成電路構造後,以〇2電漿打磨去除殘留在基板上 的光阻圖型及下層膜。 下層膜經打磨去除處理後之各基板表面以掃猫式顯微鏡 觀察,評估各電路構造圖型之解析度。結果,形成電路構造 飲介電體層表面發生腐蝕,其程度推測會於形成電路層後使 裝置特性產生瑕疵。 形成上述電路構造後,隨即試將基板以同樣條件另浸泡 於上述實施例所用之剝離液,殘留之下層膜無法去除。 以下之實施例6至10、比較例2至4係有關於本發明第二 下層膜形成材料及電路形成方法。 (實施例6至9 ) 調製以下的(A ) 、( b ) 、( C )及(D )之樹脂組成 物,作爲下層膜形成材料。 (A ) '溶解對苯乙烯磺酸乙酯所之樹脂成分於r 一丁 內酉旨/乳酸乙醋(2: 8 )所成之溶劑,固體成分濃度調整爲6 重量%之樹脂組成物。 (B ) 溶解對苯乙烯磺酸乙酯:丙烯酸羥基乙酯(=5 : 5) m成的樹脂成分’及相當於該樹脂成分的20重量%之 -51 - (48) 1258635 CYMEL 1172(三井Cyanamid公司製四羥甲基甘脲)於乳酸 乙酯所成之溶劑,固體成分濃度調整爲6重量%之樹脂組成 物。 (C ) 溶解對苯乙烯磺酸乙酯:丙烯酸9 一羥基蒽酯( =5 : 5 )所成的樹脂成分於r 一 丁內酯/乳酸乙酯(2: 8 )所 成之溶劑,固體成分濃度調整爲6重量%之樹脂組成物。 (D ) 溶解對苯乙烯磺酸乙酯:丙烯酸羥基乙酯:丙 烯酸9一羥基蒽酯(=4: 3: 3)所成之樹脂成分,相當於該樹 脂的20重量%之CYMEL 1172 (三井Cyanamid (股)製四羥甲 基甘脲),及相當於上述二者之固體成分量的l〇〇〇ppm之 MEGAFAC R08 (大日本油墨(股)製氟系界面活性劑)於 乳酸乙酯所成之溶劑,固成分濃度調整爲6重量%之樹脂組 成物。 各以這些(A ) ( B ) ( C ) ( D )之樹脂組成物塗布於 半導體基板上,於200°C加熱處理90秒,形成膜厚3000埃之 下層膜。 於這些下層膜上以含矽之光阻組成物塗布,於1 〇 〇 °c加 熱處理90秒,形成膜厚1 500埃之光阻上層膜。於該光阻上層 膜施以曝光、顯像處理、形成上層光阻圖型。 如上得之上層光阻圖型未覆蓋的下層膜之露出部份,以 使用氟碳系蝕刻氣體之乾式蝕刻去除,得下層光阻圖型。以 上述上層光阻圖型及下層光阻圖型爲遮罩,蝕刻其下層之基 板介電體層,形成溝或介層孔等電路構造。 如上形成電路構造後,將基板於二甲亞硕及單乙醇胺之 -52- (49) 1258635 混合溶劑(混合比二7: 3)所成之剝離液於i〇(TC浸泡20分鐘 ,去除上層光阻圖型及下層光阻圖型。(C) Solving a solvent formed by dissolving ethyl p-styrenesulfonate/9-hydroxy decyl acrylate (5:5) in r-butylpropyl ester/ethyl lactate (h 8) to prepare a solid A resin composition having a component concentration of 6 wt%. (D) Dissolving a resin component of ethyl p-styrenesulfonate / hydroxyethyl acrylate / 9-hydroxy decyl acrylate (4:3:3), equivalent to 20% by weight of the resin 2CYMEL 1172 (Mitsui Cyanamid ( Manufactured by tetramethylol glycoluril), and a solvent equivalent to 100% of the solid content of the above, MEGAFAC R08 (a fluorine-based surfactant prepared by Dainippon Ink Co., Ltd.) was adjusted in a solvent made of ethyl lactate. A resin composition having a solid content concentration of 6% by weight. Each of the resin compositions of (A) (B) (C) (D) was applied onto a semiconductor substrate, and subjected to a heat treatment for 20 seconds at TC for 90 seconds to form a film having a film thickness of 2000 Å. Coating TDUR-P630 (Tokyo should The photoresist (manufactured by the chemical industry) is heat-treated at 120 ° C for 90 seconds on these underlying films to form a photoresist layer having a film thickness of 5000 angstroms. The photoresist layer is sequentially exposed to light after exposure and exposure. (11 ° ° C, 90 seconds), development processing, forming a 250 nm photoresist pattern. The photoresist pattern obtained above does not cover the exposed portion of the underlying film 'dry type using fluorocarbon etching gas In the above-mentioned photoresist pattern, the underlying film is masked by the same pattern as the light-49-(46) 1258635 resistance pattern, and the underlying substrate dielectric layer is etched to form a trench or a via hole. Circuit structure. After forming the circuit structure as described above, the substrate is immersed in a mixed solvent of dimethyl sulfoxide and monoethanolamine (mixing ratio = 7:3) at 1 ° C for 20 minutes to remove the photoresist pattern. Type and underlayer film. The surface of each substrate after peeling treatment of the underlying film was observed by a scanning cat microscope. The resolution of the circuit structure pattern was confirmed. As a result, it was confirmed that when any of the underlayer film materials of (A)(B)(C)(D) was used, a rectangular pattern having excellent dimensional controllability and a good cross-sectional shape was obtained. Example 5) In the resin composition (C), a photoacid generator TPS-109 (manufactured by Green Chemical Co., Ltd.) was added in an amount of 3% by weight based on the amount of the resin component, and another resin composition was prepared ( C2) A circuit configuration was formed as in Example 1 except that the resin composition (C2) was used. As a result, a circuit configuration having an excellent dimensional control property and a rectangular pattern was obtained. (Comparative Example 1) Cross-linking with a main component The film material (product name SWK-EX3 manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied onto a semiconductor substrate and heat-treated at 200 ° C for 90 seconds to form a film having a film thickness of 2000 Å. A large photoresist composition (trade name: TDUR-P630, manufactured by Tokyo Ohka Kogyo Co., Ltd.) was heat-treated at 120 ° C for 90 seconds on the underlayer film to form a photoresist layer having a film thickness of 5000 angstroms. Pre-exposure, post-exposure heating -50 - (47) 1258635 (11 (TC, 90 seconds), development processing, forming a 250 nm photoresist pattern. The exposed portion of the underlying film that is not covered by the photoresist pattern as described above is a dry uranium using a fluorocarbon-based etching gas. In the above-mentioned photoresist pattern, and under the same pattern as the photoresist pattern layer, the underlying film is masked, and the underlying dielectric layer of the substrate is etched to form a circuit structure such as a trench or a via hole. After forming the circuit structure, the photoresist pattern and the underlying film remaining on the substrate are removed by grinding with 〇2. The surface of each substrate after being polished and removed is observed by a scanning cat microscope, and the structural patterns of each circuit are evaluated. Resolution. As a result, the formation of the circuit structure causes corrosion on the surface of the dielectric layer, which is presumed to cause defects in the device characteristics after the formation of the circuit layer. After the above circuit configuration was formed, the substrate was immediately immersed in the stripping solution used in the above examples under the same conditions, and the remaining underlayer film could not be removed. The following Examples 6 to 10 and Comparative Examples 2 to 4 relate to the second underlayer film forming material and circuit forming method of the present invention. (Examples 6 to 9) The following resin compositions of (A), (b), (C) and (D) were prepared as a lower film forming material. (A) A resin composition obtained by dissolving a resin component of ethyl p-styrenesulfonate in a solvent of r-butyl acetate/ethyl acetate (2:8), and a resin composition having a solid concentration adjusted to 6 wt%. (B) Dissolving ethyl p-styrenesulfonate: a resin component of hydroxyethyl acrylate (=5:5) m and -20% by weight of the resin component -51 - (48) 1258635 CYMEL 1172 (Mitsui A resin composition of tetrahydroxymethyl glycoluril produced by Cyanamid Co., Ltd. in a solvent of ethyl lactate, and a solid content concentration adjusted to 6% by weight. (C) Solvent dissolved in ethyl p-styrenesulfonate: 9-hydroxy decyl acrylate (=5:5) in r-butyrolactone/ethyl lactate (2:8), solid The composition of the component was adjusted to a resin composition of 6% by weight. (D) A resin component obtained by dissolving ethyl p-styrenesulfonate: hydroxyethyl acrylate: 9-hydroxydecyl acrylate (=4:3:3), equivalent to 20% by weight of the resin, CYMEL 1172 (Mitsui Cyanamid (tetramethylol glycoluril) manufactured by Cyanamid, and MEGAFAC R08 (fluorine-based surfactant manufactured by Dainippon Ink Co., Ltd.) in an amount equivalent to 1% by mass of the above two components in ethyl lactate The solvent was prepared, and the solid content was adjusted to a resin composition of 6% by weight. Each of the resin compositions of (A) (B) (C) (D) was applied onto a semiconductor substrate, and heat-treated at 200 °C for 90 seconds to form an underlayer film having a film thickness of 3,000 Å. These underlying films were coated with a photoresist composition containing ruthenium, and heat-treated at 1 〇 〇 °c for 90 seconds to form a photoresist upper film having a film thickness of 1,500 Å. The photoresist upper layer is exposed, developed, and formed into an upper photoresist pattern. The exposed portion of the underlayer film which is not covered by the upper photoresist pattern is removed by dry etching using a fluorocarbon-based etching gas to obtain a lower photoresist pattern. The upper layer photoresist pattern and the lower layer photoresist pattern are used as masks, and the underlying dielectric layer of the substrate is etched to form a circuit structure such as a trench or a via hole. After forming the circuit structure as described above, the substrate was immersed in a mixture of dimethyl sulfoxide and monoethanolamine in a mixed solvent of -52-(49) 1258635 (mixing ratio of 2:7:3) for 20 minutes to remove the upper layer. Photoresist pattern and lower photoresist pattern.

下層膜經剝離處理後之各基板表面以掃瞄式顯微鏡觀察 ,評估各基板之表面狀態。結果確認,使用(A ) ( B ) ( C )(D)之任一下層膜材料時,不見下層膜及上層光阻膜之 殘留物,去除已充分進行。 (實施例1 0 ) 各以上述(A ) ( B ) ( C ) ( D )之樹脂組成物塗布於 半導體基板上,於2 0 0 °C加熱處理9 0秒,形成膜厚3 0 0 0埃下 層膜。 塗布含矽之光阻組成物於這些下層膜上,於1〇0艺加熱 處理90秒,形成膜厚150埃之光阻上層膜。於該光阻上層膜 施以曝光、顯像處理,形成上層光阻圖型。 如上得之上層光阻圖型未覆蓋之下層膜的露出部份,以 使用氟碳系触刻氣體之乾式蝕刻去除,得下層光阻圖型。 將該階段之基板,以二甲亞硕及單乙醇胺的混合溶劑( 混合比=7: 3)所成之剝離液於i〇(Tc浸泡20分鐘,去除上層 光阻圖型及下層光阻圖型。The surface of each substrate after the release treatment of the underlayer film was observed by a scanning microscope, and the surface state of each substrate was evaluated. As a result, it was confirmed that when any of the underlayer film materials of (A) (B) (C) (D) was used, the residue of the underlayer film and the upper photoresist film was not observed, and the removal was sufficiently performed. (Example 10) Each of the resin compositions of the above (A) (B) (C) (D) was applied onto a semiconductor substrate, and heat-treated at 200 ° C for 90 seconds to form a film thickness of 300 Å. An underlayer film. The photoresist composition containing ruthenium was coated on these underlayer films, and heat-treated at 1 Å for 90 seconds to form a photoresist upper film having a film thickness of 150 Å. The upper film of the photoresist is subjected to exposure and development processing to form an upper photoresist pattern. As described above, the exposed portion of the underlying film which is not covered by the upper photoresist pattern is removed by dry etching using a fluorocarbon-based etch gas to obtain a lower photoresist pattern. The substrate at this stage was immersed in a mixture of dimethyl sulfoxide and monoethanolamine (mixing ratio = 7:3) for 10 minutes to remove the upper photoresist pattern and the lower photoresist pattern. type.

下層膜經剝離處理後之各基板表面以掃瞄式顯微鏡觀察 ,評估各基板的表面狀態。其結果係,使用(A ) ( B ) ( C )(D)之任一下層膜材料時,不見上層膜及下層膜之殘留 物,可確認基板之再加工處理的切實進行。 -53- (50) 1258635 (比較例2 ) 除用溶解六甲氧基甲基化三聚氰胺於丙二醇單甲醚乙酸 酯而成之組成物形成下層膜以外,如同上述實施例1至4,形 成電路構造於半導體基板。 如上形成電路構造後,將基板以二甲亞硕及單乙醇胺之 混合溶劑(混合比=7: 3)所成之剝離液於l〇〇°C浸泡20分鐘 ,無法去除上層光阻圖型及下層光阻圖型。 (比較例3 ) 除用溶解六甲氧基甲基化三聚氰胺於丙二醇單甲醚乙酸 酯而成之組成物形成下層膜以外,如同上述實施例1 〇,形成 上層光阻圖型及下層光阻圖型。 將該階段之基板,以二甲亞碾及單乙醇胺之混合溶劑混 合比=7: 3 )所成之剝離於l〇(TC浸泡20分鐘,無法去除上層 光阻圖型及下層光阻圖型。 (比較例4 ) 上述比較例2及3中,取代之光阻剝離液爲的去除處理, 改行藉〇2電漿打磨之去除處理。觀察處理後各基板之表面 ,則含矽光阻組成物所成之上層光阻圖型膜變質成爲殘留物 。因而,爲將殘留物剝離,浸泡基板於鹼剝離液,但無法去 除。 以下之實施例11至15,比較例5,6係有關於本發明第三 下層膜形成材料及電路形成方法。 -54 - (51) 1258635 (實施例11至1 4 ) 調製以下之(A ) 、( B ) 、( c )及(D )樹脂樹脂, 作爲下層膜形成材料。 (A) 溶解對苯乙烯磺酸乙酯所成之樹脂成分,於r 一 丁內酯/乳酸乙醋(2 : 8 )所成之溶劑,調整固體成分濃 度爲6重量%之樹脂組成物。 (B) 溶解對苯乙燃磺酸乙醋:丙稀酸經基乙酯(=5: 5 )所成的樹脂成分’及相當於該樹脂成分量的2 〇重量%之 CYMEL1172(三井Cyanamid公司製四羥甲基甘脲),於乳 酸乙酯所成之溶劑,固體成分濃度調整爲6重量%之樹脂組 成物。 (C ) 溶解對苯乙烯磺酸乙酯:丙烯酸9 一羥基蒽醋( =5 : 5 )所成的樹脂成分,於7 - 丁丙醋/乳酸乙醋(2 : 8) 所成之溶劑,固體成分濃度調整爲6重量%之樹脂組成物。 (D ) 溶解對苯乙烯磺酸乙酯:丙烯酸羥基乙酯:丙 烯酸9-羥基蒽酯(=4: 3: 3)所成之樹脂成分,相當於該樹 脂的20重量%之CYMEL 1 172 (三井Cyan amid (股)製四羥甲 基甘脲),及相當於上述二者的固體成分量的lOOOppm之 MEGAFAC R08 (大日本油墨(股)製氟系界面活性劑), 於乳酸乙酯所成之溶劑’調整固成分濃度爲6重量%之樹脂 組成物。 另一方面,如第10A圖,於表面形成銅電路層501之基 板502上,形成SiN膜所成之第一阻障層5 03作爲第一層,形 -55- (52) 1258635 成低介電體材料(東京應化工業(股)製:商品名〇CD 一 T12 )所成之第一低介電體層504作爲第二層,形成SlN膜所 成之第二阻障層505作爲第三層,更形成低介電體材料(東 京應化工業(股)製:商品名〇CD - T12 )所成之第二低介 電體層506作爲第四層。 其次,如第10B圖,於上述第二低介電體層506上形成光 阻層507 ’以微影法加工該光阻層507得光阻圖型508。以所 得之光阻圖型508爲遮罩,形成貫通上述第一至四層,連通 於上述銅電路層501之介層孔509。形成介層孔509後,去除 光阻圖型508。The surface of each substrate after the release treatment of the underlayer film was observed by a scanning microscope, and the surface state of each substrate was evaluated. As a result, when any of the underlayer film materials of (A) (B) (C) (D) was used, the residue of the upper film and the lower film was not observed, and the rework processing of the substrate was confirmed to be practical. -53- (50) 1258635 (Comparative Example 2) A circuit was formed as in the above Examples 1 to 4 except that a composition obtained by dissolving hexamethoxymethylated melamine in propylene glycol monomethyl ether acetate was used to form an underlayer film. Constructed on a semiconductor substrate. After forming the circuit structure as described above, the substrate was immersed in a mixed solvent of dimethyl sulfoxide and monoethanolamine (mixing ratio = 7:3) at 10 ° C for 20 minutes, and the upper photoresist pattern could not be removed. Lower photoresist pattern. (Comparative Example 3) An upper photoresist pattern and a lower photoresist were formed as in the above Example 1 except that a composition obtained by dissolving hexamethoxymethylated melamine in propylene glycol monomethyl ether acetate was formed to form an underlayer film. Graphic type. The substrate of this stage is separated from the substrate by the mixing ratio of dimethyl sulfite and monoethanolamine = 7:3). The TC is immersed for 20 minutes, and the upper photoresist pattern and the lower photoresist pattern cannot be removed. (Comparative Example 4) In the above Comparative Examples 2 and 3, the removal treatment of the substituted photoresist peeling liquid was carried out by the removal treatment by the plasma polishing. After the surface of each substrate after the treatment, the composition of the photoresist was contained. The upper layer of the photoresist pattern film is degraded into a residue. Therefore, in order to peel off the residue, the substrate is immersed in the alkali stripping solution, but it cannot be removed. Examples 11 to 15 and Comparative Examples 5 and 6 below are related. The third underlayer film forming material and circuit forming method of the present invention - 54 - (51) 1258635 (Examples 11 to 14) The following (A), (B), (c) and (D) resin resins are prepared as The underlayer film forming material. (A) The resin component obtained by dissolving ethyl p-styrenesulfonate, the solvent formed by r-butyrolactone/ethyl lactic acid (2:8), adjusted to a solid concentration of 6 wt% Resin composition. (B) Dissolving p-acetophenone sulfonic acid ethyl acetonate: acrylic acid via base B (=5: 5) The resin component formed and CYMEL1172 (tetramethylol glycoluril manufactured by Mitsui Cyanamid Co., Ltd.) equivalent to 2% by weight of the resin component, a solvent formed by ethyl lactate, and a solid component A resin composition having a concentration adjusted to 6% by weight. (C) A resin component obtained by dissolving ethyl p-styrenesulfonate: acrylic acid 9 monohydroxy vinegar (=5:5), in 7-butane vinegar/lactate B The solvent formed by vinegar (2:8), the resin composition whose solid concentration is adjusted to 6% by weight. (D) Dissolved ethyl p-styrenesulfonate: hydroxyethyl acrylate: 9-hydroxydecyl acrylate (=4) : 3: 3) The resin component formed is equivalent to 20% by weight of the resin, CYMEL 1 172 (tetrakis methyl hydroxyurea manufactured by Mitsui Cyan amid), and the amount of solid components corresponding to the above two 100,000 ppm of MEGAFAC R08 (a fluorine-based surfactant manufactured by Dainippon Ink Co., Ltd.), and a resin composition adjusted to a solid concentration of 6 wt% in a solvent made of ethyl lactate. On the other hand, as shown in Fig. 10A, Forming a first resistance formed by the SiN film on the substrate 502 on which the copper circuit layer 501 is formed. Layer 5 03 is used as the first layer, and the first low dielectric layer 504 formed of a low dielectric material (manufactured by Tokyo Chemical Industry Co., Ltd.: trade name 一CD-T12) is used as the first layer. In the second layer, the second barrier layer 505 formed by the S1N film is formed as the third layer, and the second dielectric layer (the Tokyo Chemical Industry Co., Ltd. product name: CD-T12) is formed into the second layer. The low dielectric layer 506 is used as the fourth layer. Next, as shown in FIG. 10B, the photoresist layer 507 is formed on the second low dielectric layer 506 to form the photoresist pattern 508 by lithography. With the obtained photoresist pattern 508 as a mask, via holes 509 penetrating the first to fourth layers and communicating with the copper circuit layer 501 are formed. After the via hole 509 is formed, the photoresist pattern 508 is removed.

如第10C圖,於形成上述介層孔509,去除光阻圖型508 後之上述第二低介電體層506上,各以上述(A) ( B ) ( C )(〇 )之樹脂組成物塗布,同時包埋上述介層孔,然後於 200 °C加熱處理90秒,於上述第二低介電體層上形成膜厚 3 000埃之下層膜510。於該下層膜5 10上,塗布主要成分係旋 塗玻璃材料之樹脂組成物,形成膜厚1 50埃之中間層膜5 1 1。 更於該中間層膜5 1 1之上,塗布光阻組成物(東京應化工業 (股)製··商品名TArF — P607 1 ),於120°C加熱處理90秒形 戶膜厚400奈米之上層膜512。其次,於上述上層膜512施以 曝光、曝光後加熱(120°C、90秒),作顯像處理,形成溝 形成用之上層光阻圖型5 1 3。 以上述上層光阻圖型513爲遮罩,使用氟碳系蝕刻氣體 ,加工上述中間層膜5 1 1得中間層膜圖型。繼之,以上述中 間層膜圖型爲遮罩,使用氧系蝕刻氣體,如第1 0D圖’加工 -56- (53) 1258635 上述下層膜510形成下層膜圖型514,去除上述中間層光阻圖 型,得用以形成溝之最終光阻圖型。此時,以掃瞄式電子顯 微鏡觀察基板表面’不見中毒之不良影響所致光阻圖型之圖 型不良,亦無構成溝之低介電體層的損傷。 通常之電路層形成製程係,繼之,以上述最終光阻圖型 (下層光阻圖型)爲遮罩’作上述第二低介電體層516之触 刻,如第1 0 E圖,形成深及上述第二阻障層5 0 5的特定圖型之 溝5 1 5。然後,以銅包埋於上述介層孔507及溝5 1 5,形成多 層電路構造。 本實施例乃假定,得上述最終光阻圖型5 1 4後,係確認 有圖型化之不良發生的狀況,如下實行再加工所需之光阻圖 型去除製程。 於調整爲1 0 0 °c之二甲亞硕及單乙醇胺的混合溶劑(混 合比=7 : 3 )所成之光阻剝離液中,將具有上述下層光阻圖 型5 1 4之基板浸泡5 10分鐘,作光阻圖型之剝離處理。剝離處 理後’以掃瞄式顯微鏡觀察基板表面,使用上述樹脂組成物 (A)至(D )之任一作爲下層膜材料時,皆無光阻圖型之 殘留物存在,可確認光阻圖型之剝離去除已切實進行。亦無 光阻剝離處理所致低介電體層506的損傷之觀察。 (實施例1 5 ) 上述(C )樹脂組成物中,追加配合相當於其樹脂成分 量的3重量%之「光酸產生劑TPS - 109 (綠化學(股)製) 」,另調製樹脂組成物(C 2 )。使用該樹脂組成物(C 2 ) -57- (54) 1258635 以外,如同實施例1形成光阻圖型。結果,可得尺寸控制性 優之矩形光阻圖型。確認可由本發明之下層膜材料抑制來自 低介電體層的中毒之影響。又,經光阻圖型剝離處理後之掃 瞄式顯微鏡觀察低介電體層表面,則剝離去除處理後之基板 表面不見有光阻圖型之殘留物,確認去除已充分進行。亦無 低介電體層之損傷。 (比較例5 ) 以溶解六甲氧基甲基化三聚氰胺於丙二醇單甲醇乙酸酯 之樹脂組成物,構成下層膜材料,以〇2電漿打磨處理作下層 圖型之去除以外,如同上述實施例,進行光阻圖型之形成, 及其剝離去除。結果,於溝形用光阻圖型發生中毒,產生無 法形成圖型像之部份。並經圖型之藉〇2電漿打磨的剝離處理 ,於介電體層產生嚴重損傷。 (比較例6 ) 上述比較例5中,以用於上述實施例的光阻剝離液,作 下層型之去除。結果,圖型無法去除。 以下之實施例1 6至2 1,比較例7、8係有關於本發明之包 埋材料及第四電路形成方法。 (實施例16至19) g周製以下之(A ) 、( B ) 、( C )及(D )樹脂組成物 ,作爲包埋材料。 -58 > (55) 1258635 (A ) 溶解對苯乙烯磺酸乙酯所成之樹脂成分於r -丁內酯/乳酸乙酯(2: 8 )所成之溶劑,固體成分濃度調整 爲6重量%之樹脂組成物。 (B )溶解對苯乙烯磺酸乙酯:丙烯酸羥基乙酯(=5 : 5 )所成之樹脂成分,及相當於該樹脂組成物成分量的20重量 %之CYMEL 1 172 (三井Cyanamid公司製四羥甲基甘脲)於乳 酸乙酯所成之溶劑,調整固體成分濃度爲6重量%的樹脂組 成物。 (C )溶解對苯乙烯磺酸乙酯/丙烯酸9 -羥基蒽酯(5 : 5 )所成之樹脂成分於7 - 丁丙酯/乳酸乙酯(2: 8 )所成之 溶劑,固體成分濃度調整爲6重量%之樹脂組成物。 (D)溶解對苯乙烯磺酸乙酯/丙烯酸羥基乙酯/丙烯酸9 一羥基蒽酯(4 : 3 : 3 )所成之樹脂成分,相當於該樹脂的20 重量%之CYMEL 1 172 (三井Cyanamid (股)製四羥甲基甘脲 ),及相當於上述二者的固體成分量的lOOOppm之MEGAFAC R08 (大曰本油墨(股)製氟系界面活性劑)於乳酸乙酯所 成之溶劑,調整固體成分濃度爲6重量%之樹脂組成物。 另一方面,於形成有Cu層之基板上,依序形成第一層 S^N膜所成之阻障層,第二層低介電體層(OCD — T12:東京 應化工業(股)製),第三層SiN所成之阻障層,第四層低 介電體層(OCD — T12;東京應化工業公司製)所成之層間 絕緣層。於該層間絕緣層上塗布光阻組成物(東京應化工業 (股)製:商品名TDUR — P630 ),於120°C加熱處理90秒, 形成膜厚5000埃之光阻層。於該光阻層依序施以曝光、曝光 -59- (56) 1258635 後加熱(110°C、90秒)、顯像處理,形成250奈米之光阻圖 型。以該光阻圖型爲遮罩,蝕刻上述層間絕緣層,形成連通 上述Cu層之介層孔。 於Ji述光阻圖型去除後之上述層間絕緣層上塗布上述樹 脂組成物(A )至(D ),以於層間絕緣層上形成包埋材層 ’同時將包埋材埋入上述介層孔內。然後,於2〇〇 t:加熱煅 燒90秒。 於上述包埋材層上塗布光阻組成物(TDUR — P630:東 京應化工業(股)製),於9(TC加熱處理90秒,形成膜厚 4〇00埃之光阻層。於該光阻層行曝光、曝光後加熱處理( 110 °C、9 0秒),然後施以顯像處理,形成溝形成用光阻 圖型。 此時之溝形成用光阻圖型的形狀,以掃瞄式電子顯微 鏡加以觀察。其結果係,使用(A )至(D )之任一包埋 材奸時,皆無由於中毒的不良影響之圖型不良產生。 又對殘留於基板上之包埋材層,將基板於1 〇 〇艺、2 〇 分鐘浸泡於二甲亞硕及單乙醇胺之混合溶劑(混合比=7 : 3 )所成的剝離液,予以剝離去除。 此時基板上之有無殘留物以掃瞄式電子顯微鏡確認,則 使用(A )至(D )中任一包埋材料時,基、板上皆無殘留物 可見,亦無於低介電體層的損傷之確認。 (實施例20 ) 封使用上述貫施例1 8的樹脂組成物(c )之包埋材料, -60 - (57) 1258635 配合以相當於樹脂成分的3重量%之光酸產生劑TPS - 1 09 ( 綠化學公司製)以外,如同上述實施例形成雙大馬士革構 造。此時的溝形成用光阻圖型並未產生中毒之不良影響所致 的圖型不良。又,亦無剝離處理後之基板上的殘留物之確認 (實施例2 1 )As shown in FIG. 10C, the resin composition of the above (A) (B) (C) (〇) is formed on the second low dielectric layer 506 after forming the via hole 509 and removing the photoresist pattern 508. After coating, the above-mentioned via holes were buried, and then heat-treated at 200 ° C for 90 seconds to form a film 510 having a film thickness of 3 000 Å on the second low dielectric layer. On the underlayer film 5 10, a resin composition of a spin-coated glass material as a main component was applied to form an interlayer film 51 of a film thickness of 150 Å. Further, on the intermediate layer film 51 1 , a photoresist composition (manufactured by Tokyo Ohka Kogyo Co., Ltd., trade name: TArF - P607 1 ) was applied, and heat-treated at 120 ° C for 90 seconds to form a film thickness of 400 nm. The film is 512 above the meter. Next, the upper film 512 is subjected to exposure, post-exposure heating (120 ° C, 90 seconds), and subjected to development processing to form an upper layer photoresist pattern 5 1 3 for groove formation. The intermediate layer film pattern 513 is used as a mask, and the intermediate layer film 51 is processed by using a fluorocarbon-based etching gas to obtain an interlayer film pattern. Then, the intermediate layer film pattern is used as a mask, and an oxygen-based etching gas is used, and the lower layer film 510 is formed into the lower layer film 510 as described in FIG. The resistance pattern is used to form the final photoresist pattern of the trench. At this time, the pattern of the photoresist pattern due to the adverse effect of poisoning was not observed by the scanning electron microscope, and the damage of the low dielectric layer constituting the trench was not observed. The circuit layer forming process system is generally formed, and then the above-mentioned final photoresist pattern (lower photoresist pattern) is used as a mask for the second low dielectric layer 516, as shown in FIG. The groove of the specific pattern of the second barrier layer 505 is 5 1 5 . Then, copper is embedded in the via hole 507 and the trench 5 15 to form a multi-layer circuit structure. In the present embodiment, it is assumed that the pattern of the patterning failure is confirmed after the final photoresist pattern type 51 is obtained, and the photoresist pattern removing process required for the reworking is carried out as follows. Soaking the substrate having the above-mentioned lower photoresist pattern 5 1 4 in a photoresist stripping solution prepared by adjusting a mixed solvent of dimethyl sulfoxide and monoethanolamine (mixing ratio = 7 : 3 ) at 10 ° C 5 10 minutes, stripping treatment of the photoresist pattern. After the peeling treatment, the surface of the substrate was observed by a scanning microscope, and when any of the above resin compositions (A) to (D) was used as the underlayer film material, the residue of the photoresist pattern was not present, and the photoresist pattern was confirmed. The peeling removal has been carried out. There is also no observation of damage to the low dielectric layer 506 caused by the photoresist stripping treatment. (Example 1 5) In the resin composition of the above (C), a photoacid generator TPS-109 (manufactured by Green Chemical Co., Ltd.) was added in an amount of 3% by weight based on the amount of the resin component, and a resin composition was prepared. (C 2 ). A photoresist pattern was formed as in Example 1 except that the resin composition (C 2 ) -57-(54) 1258635 was used. As a result, a rectangular photoresist pattern excellent in size controllability can be obtained. It was confirmed that the influence of poisoning from the low dielectric layer can be suppressed by the underlayer film material of the present invention. Further, when the surface of the low dielectric layer was observed by a scanning microscope after the photoresist pattern peeling treatment, the residue of the resist pattern was not observed on the surface of the substrate after the peeling removal treatment, and it was confirmed that the removal was sufficiently performed. There is also no damage to the low dielectric layer. (Comparative Example 5) The resin composition of hexamethoxymethylated melamine in propylene glycol monomethanol acetate was dissolved to form an underlayer film material, which was removed as a lower layer pattern by 〇2 plasma polishing treatment, as in the above embodiment. , the formation of the photoresist pattern, and the stripping removal. As a result, poisoning occurs in the groove pattern with a photoresist pattern, and a portion in which a pattern image cannot be formed is produced. And the stripping treatment of the pattern by the 电2 plasma grinding causes serious damage in the dielectric layer. (Comparative Example 6) In the above Comparative Example 5, the photoresist stripping liquid used in the above examples was removed as a lower layer type. As a result, the pattern cannot be removed. In the following Examples 1 to 2 1, Comparative Examples 7 and 8 relate to the embedding material of the present invention and the fourth circuit forming method. (Examples 16 to 19) g The following resin compositions (A), (B), (C) and (D) were used as embedding materials. -55 > (55) 1258635 (A ) A solvent prepared by dissolving a resin component of ethyl p-styrenesulfonate in r-butyrolactone/ethyl lactate (2:8), and the solid concentration was adjusted to 6 % by weight of the resin composition. (B) a resin component obtained by dissolving ethyl p-styrenesulfonate: hydroxyethyl acrylate (=5:5), and CYMEL 1 172 (manufactured by Mitsui Cyanamid Co., Ltd.) in an amount equivalent to 20% by weight of the component of the resin composition Tetramethylol glycoluril was added to a solvent of ethyl lactate to adjust a resin composition having a solid concentration of 6 wt%. (C) a solvent obtained by dissolving a mixture of p-styrenesulfonate/9-hydroxydecyl acrylate (5:5) in 7-butpropyl ester/ethyl lactate (2:8), solid content The concentration was adjusted to 6% by weight of the resin composition. (D) A resin component obtained by dissolving ethyl p-styrenesulfonate/hydroxyethyl acrylate/acrylic acid 9-hydroxy oxime ester (4:3:3), equivalent to 20% by weight of the resin, CYMEL 1 172 (Mitsui Cyanamid (tetramethylol glycoluril) manufactured by Cyanamid, and 100 parts by mass of the above-mentioned solid content of MEGAFAC R08 (a fluorine-based surfactant prepared by Otsuka ink) is formed by ethyl lactate. The solvent was adjusted to have a resin composition having a solid concentration of 6 wt%. On the other hand, on the substrate on which the Cu layer is formed, a barrier layer formed by the first layer of the S?N film and a second layer of the low dielectric layer (OCD-T12: manufactured by Tokyo Yinghua Industry Co., Ltd.) are sequentially formed. ), a barrier layer formed of a third layer of SiN, and an interlayer insulating layer of a fourth layer of a low dielectric layer (OCD - T12; manufactured by Tokyo Ohka Kogyo Co., Ltd.). A photoresist composition (manufactured by Tokyo Ohka Kogyo Co., Ltd.: trade name: TDUR - P630) was applied onto the interlayer insulating layer, and heat-treated at 120 ° C for 90 seconds to form a photoresist layer having a film thickness of 5000 Å. The photoresist layer was sequentially exposed, exposed to -59-(56) 1258635, heated (110 ° C, 90 seconds), and developed to form a 250 nm photoresist pattern. The photoresist pattern is used as a mask, and the interlayer insulating layer is etched to form a via hole that communicates with the Cu layer. Coating the resin compositions (A) to (D) on the interlayer insulating layer after the removal of the photoresist pattern to form an embedding material layer on the interlayer insulating layer while embedding the embedding material in the interlayer Inside the hole. Then, it was calcined at 2 Torr: for 90 seconds. A photoresist composition (TDUR-P630: manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied onto the embedding material layer, and a photoresist layer having a film thickness of 4 Å was formed by heat treatment at 9 (TC for 90 seconds). The photoresist layer is exposed to light, heated after exposure (110 ° C, 90 seconds), and then subjected to development processing to form a photoresist pattern for trench formation. At this time, the shape of the trench is formed by a photoresist pattern. Scanning electron microscopy was used to observe the results. When using any of the embedded materials (A) to (D), there was no pattern defect due to the adverse effects of poisoning. For the material layer, the substrate is immersed in a mixed solvent of dimethyl sulfoxide and monoethanolamine (mixing ratio = 7:3) in 1 〇〇 art for 2 minutes, and stripped and removed. The residue was confirmed by a scanning electron microscope. When any of the embedding materials (A) to (D) was used, no residue was observed on the substrate or the plate, and no damage was observed in the low dielectric layer. Example 20) Sealing the embedding material of the resin composition (c) of the above-mentioned Example 18, -60 - ( 57) 1258635 A double damascene structure is formed as in the above embodiment except that the photoacid generator TPS-1 09 (manufactured by Green Chemical Co., Ltd.), which is equivalent to 3% by weight of the resin component, is blended. No pattern defects caused by adverse effects of poisoning. Also, no residue on the substrate after stripping treatment (Example 2 1 )

使用上述樹脂組成物(C )之實施例1 8中,形成反射防 止膜(東京應化工業公司製:商品名SWK— 9L )作爲與光 阻層之中間層以外,以完全同樣之條件形成雙大馬士革構造 。此時之溝形成用光阻圖型,並無中毒之不良影響所致的圖 型不良之發生。又,亦無剝離處理後的基板上之殘留物的確 認。 (比較例7 )In Example 18 using the above-mentioned resin composition (C), an anti-reflection film (manufactured by Tokyo Ohka Kogyo Co., Ltd.: trade name SWK-9L) was formed as an intermediate layer with the photoresist layer, and double was formed under exactly the same conditions. Damascus structure. At this time, the pattern of the groove is formed by a photoresist pattern, and there is no pattern defect caused by the adverse effect of poisoning. Moreover, the residue on the substrate after the peeling treatment was not confirmed. (Comparative Example 7)

包埋材料係以溶解六甲氧基甲基化三聚氰胺於丙二醇單 甲醚乙酸酯的樹脂組成物構成,使用後之包埋材層及第二蝕 刻空間內之包埋材的去除係以〇2電漿打磨處理爲之以外, 如同上述實施例形成雙大馬士革構造。其結果,於溝於成用 光阻圖型發生中毒,產生無法形成圖型像之部份。 (比較例8 ) 以旋塗玻璃材料(東京應化工業(股)製:商品名OCD - T 1 2 )爲包埋材料,使用後之包埋材層及第二蝕刻空間內 -61 - (58) (58)1258635 之包埋材的去除係以Ο. Ο 1重量%緩衝氫氟酸水溶液爲之以外 ,如同上述實施例形成雙大馬士革構造。其結果,於溝形成 用光阻圖型發生中毒,產生圖型像無法形成之部份。 【圖式簡單說明】 第1圖係用以說明經使用習知包埋材料的雙大馬士革 製程的電路形成方法,1Α至1D係利用微影術之電路構造 形成之過程圖。 弟2圖係用以說明’後繪於第1圖的後半之電路形成方 法’ 2 Ε至2 Η係後續於第1圖之D的使用微影術之電路構造 形成過程圖。 第3圖係用以說明,於低介電體層形成雙大馬士革構 造時所發生的中毒現象,3Α係不發生中毒現象,經施以 圖型化的飽刻空間圖型之重要部位的俯視圖,3Β係發生中 毒現象,起圖型化不良之蝕刻空間圖型的重要部位俯視圖 〇 弟4圖係用以說明使用本發明的第—下層膜形成材料 之第一電路形成方法,4Α至π係利用微影術的電路構造 形成過程圖。 第5圖係用以說明,使用本發明之含矽二層光阻製程 用下層膜形成材料(第二下層膜材料)的第二電路形成方 法,5Α至5 Ε係利用微影術之電路構造形成過程圖。 第6圖係用以說明,使用本發明之多層光阻製程用下 層S旲形成材料(穿二下暦臆材ψ、丨 _ . 、弟一卜層膜材枓)的第三電路形成方法, ' 62 ^ (59) 1258635 6 A至6D係利用微影術的電路形成之前半過程圖。 第7圖係用以說明,使用本發明之多層光阻製程用下 層膜形成材料(第三下層膜材料)的第三電路形成方法, 7E、7F係後續於第6D圖的利用微影術之電路形成的後半 過程圖。 第8圖係用以說明經使用本發明包埋材料的雙大馬士 革製程之電路形成方法(第四電路形成方法),8A至8D 係利用微影術的電路構造形成方法過程圖。 第9圖係用以說明後續於第8圖之後半電路形成方法, 9E至91係後續於第8圖的利用微影術之電路構造形成過程 圖。 第1 〇圖係用以說明,以使用本發明之多層光阻製程用 下層膜形成材料(第三下層膜材料)的第三電路成方法用 於形成雙大馬士革構造之實施例,10A至10E係至形成雙大 馬士革構造止之過程圖。 主要元件對照表 1 基板 2 層間絕緣膜層 3 光阻膜 4 電路溝(t r e n c h ) 5 阻障金屬 6 下層電路層 7 第一低介電體層 -63 - 1258635 (60) 8 9 10 11,14 12 13 15 16 17 101a , 201a , 301a 101b , 201b , 301b 101 , 201 , 301 102 , 202 , 302 103 104 , 204 , 305 105 , 206 , 308 203 , 304 205 303 306 307 309 40 1 402 第一蝕刻停止膜 第二低介電體層 第二蝕刻停止膜 光阻遮罩 介層孔 包埋材 溝,第二蝕刻空間 介層電路 上層電路層 基板 介電體層 半導體基板 下層膜 光阻層 光阻圖型 電路圖型 光阻上層膜 下層光阻圖型 中間層膜 中間層圖型 下層圖型 電路層 基板 低介電體層 -64 (61)1258635 403 光阻膜 404 電路溝(t r e n c h ) 405 阻障金屬 406 下層電路層 407 第一低介電體層 408 第一蝕刻停止膜 409 第二低介電體層 410 第二蝕刻停止膜 4 11 反射防止膜 412 光阻遮罩 413 介層孔;第一蝕刻空間 4 14a 包埋材層 4 14 b 包埋材 415 反射防止膜 4 16 光阻圖型 417 溝 4 18 介層電路 4 19 上層電路層 501 銅電路層 502 基板 503 第一阻障層 504 第一低介電體層 505 第二阻障層 506 第二低介電體層 -65- (62) 光阻層 光阻圖型 介層孔 下層膜 中間層膜 上層膜 上層光阻圖型 下層膜圖型 第二低介電體層 溝 - 66·The embedding material is composed of a resin composition in which hexamethoxymethylated melamine is dissolved in propylene glycol monomethyl ether acetate, and the embedding material layer after use and the embedding material in the second etching space are removed by 〇2 In addition to the plasma sanding treatment, a double damascene structure was formed as in the above embodiment. As a result, the groove is poisoned by the photoresist pattern, and a portion incapable of forming a pattern image is generated. (Comparative Example 8) A spin-on glass material (manufactured by Tokyo Chemical Industry Co., Ltd.: trade name OCD-T 1 2) was used as an embedding material, and the embedding material layer and the second etching space were used -61 - ( 58) The removal of the embedding material of (58) 1258635 is carried out in addition to the 1% by weight buffered hydrofluoric acid aqueous solution, forming a double damascene structure as in the above embodiment. As a result, poisoning occurs in the pattern of formation of the groove, and a portion in which the pattern image cannot be formed is generated. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram showing a circuit formation method of a dual damascene process using a conventional embedding material, and a 1D to 1D process diagram formed by a circuit configuration using lithography. The second drawing is for explaining the circuit formation method of the latter half of Fig. 1 '''''''''''''' Fig. 3 is a view showing the poisoning phenomenon occurring when a double damascene structure is formed in a low dielectric layer, and the poisoning phenomenon does not occur in the 3 lanthanum system, and the top view of the important portion of the saturated spatial pattern subjected to patterning is performed. A top view of an important part of the etched space pattern that causes poisoning, and a diagram showing the first circuit forming method using the first underlayer film forming material of the present invention, the 4 Α to π system utilizing micro The circuit structure of the shadow is formed into a process map. Fig. 5 is a view showing a second circuit forming method using the underlayer film forming material (second underlying film material) for the ytterbium-containing two-layer photoresist process of the present invention, and the circuit structure using lithography by 5 Α to 5 Ε Form a process map. Figure 6 is a view showing a third circuit forming method for forming a material for the lower layer S 多层 of the multilayer photoresist process of the present invention (through the second 暦臆 ψ, 丨 _., 弟 卜 层 层 枓), ' 62 ^ (59) 1258635 6 A to 6D is a circuit that uses lithography to form the first half of the process diagram. Fig. 7 is a view showing a third circuit forming method using the underlayer film forming material (third underlayer film material) for the multilayer photoresist process of the present invention, and 7E and 7F are followed by the use of lithography in Fig. 6D. The second half of the circuit is formed. Fig. 8 is a view showing a circuit forming method (fourth circuit forming method) of a double damascene process using the embedding material of the present invention, and 8A to 8D are process diagrams for forming a circuit using lithography. Fig. 9 is a view for explaining a circuit formation method subsequent to the latter half of Fig. 8, and a circuit configuration forming process using lithography subsequent to Fig. 8 of 9E to 91. Fig. 1 is a view showing a third circuit forming method for forming a double damascene structure using the underlayer film forming material (third underlayer film material) for a multilayer photoresist process of the present invention, 10A to 10E The process map to form a double Damascus structure. Main components comparison Table 1 Substrate 2 Interlayer insulating film layer 3 Photoresist film 4 Circuit trench 5 Barrier metal 6 Lower circuit layer 7 First low dielectric layer -63 - 1258635 (60) 8 9 10 11,14 12 13 15 16 17 101a , 201a , 301a 101b , 201b , 301b 101 , 201 , 301 102 , 202 , 302 103 104 , 204 , 305 105 , 206 , 308 203 , 304 205 303 306 309 309 40 1 402 First etching stop Film second low dielectric layer second etch stop film photoresist mask via hole embedding trench, second etch space via layer upper layer circuit layer substrate dielectric layer semiconductor substrate underlayer film photoresist layer photoresist pattern circuit diagram Type photoresist upper film lower layer photoresist pattern intermediate layer film middle layer pattern lower layer pattern circuit layer substrate low dielectric layer -64 (61) 1258635 403 photoresist film 404 circuit trench (trench) 405 barrier metal 406 lower layer circuit Layer 407 first low dielectric layer 408 first etch stop film 409 second low dielectric layer 410 second etch stop film 4 11 anti-reflection film 412 photoresist mask 413 via hole; first etching space 4 14a embedding material layer 4 14 b embedding material 415 anti-reflection film 4 16 photoresist pattern 417 trench 4 18 interlayer circuit 4 19 upper circuit layer 501 copper circuit layer 502 substrate 503 first barrier layer 504 first low medium Electrode layer 505 second barrier layer 506 second low dielectric layer -65- (62) photoresist layer photoresist pattern type interlayer underlayer film intermediate layer film upper layer film upper layer photoresist pattern lower layer pattern second low Dielectric layer trench - 66·

Claims (1)

94. 〇 3 I25S635 一一Jl, /•r A 拾、申請專利範圍 第92133232號專利申請案 中文申請專利範圍修正本 民國94年10月3 日修卫 1 · 一種微影用下層膜形成材料,係於半導體基板上死 成電路形成圖型化用之光阻前,用以於上述基板上設下層 膜之材料,其特徵爲: 3有至少具施加特定能量而末端脫離產生磺酸殘基之 取代基的樹脂成分及溶劑。 2 · —種含矽二層光阻製程用下層膜形成材料,係榍 成用以於基板上高精度形成電路層的微影用含矽二層光随 的下層膜之形成材料,其特徵爲: 含有至少具施加特定能量而末端基脫離產生磺酸殘基 之取代基的樹脂成分及溶劑。 3 ·如申請專利範圍第2項之含矽二層光阻製程用下層 膜形成材料,其中上述樹脂成分至少具有下述一般式(1)94. 〇3 I25S635 一一Jl, /•r A pick up, patent application scope 92133232 Patent application Chinese patent application scope amendments October 3, 1994, the defender 1 · A lithography underlayer film forming material, A material for providing an underlayer film on the substrate before the die is formed on the semiconductor substrate, and is characterized in that: 3 has at least a specific energy applied and the terminal is detached to generate a sulfonic acid residue. The resin component and solvent of the substituent. 2) - an underlayer film forming material for a germanium two-layer photoresist process, which is formed by forming a lower layer film containing a second layer of light for forming a circuit layer on a substrate with high precision. : A resin component and a solvent containing at least a substituent having a specific energy and a terminal group desorbed from a sulfonic acid residue. 3. The underlayer film forming material for a two-layer photoresist process according to claim 2, wherein the resin component has at least the following general formula (1) (式中η表1至1000之整數,χ係碳原子數1至10之直 鏈或分枝烷基鏈、芳香性或脂環式環狀烷基鏈、烷基酯鏈 ’ Υ系受特定能量之施加產生磺酸殘基之取代基) 1258635 之重複單元。 4·如申請專利範圍第2項之含矽二層光阻製程用下層 膜形成材料,其中用以產生上述磺酸殘基而施加之特定能量 係光或/及熱。 5 ·如申請專利範圍第3項之含矽二層光阻製程用下層膜 形成材料,其中上述一般式(1 )之取代基γ係—S03R!或-S〇3_R2+(式中R^R2係碳數υο之有機基)。 6 ·如申請專利範圍第5項之含矽二層光阻製程用下層膜 形成材料,其中上述有機基1係選自碳原子數1至10之烷基 ’或經基院基中之一種。 7·如申請專利範圍第5項之含矽二層光阻製程用下層膜 形成材料,其中上述有機基r2係選自碳數1〜10之烷醇胺,及 太兀基fee中之至少一種。 8 .如申請專利範圍第2項之含矽二層光阻製程用下層膜 形成材料,其中上述至少具經施加特定能量而末端基脫離產 生磺酸殘基之取代基的樹脂成分,係如申請專利範圍第4項 之樹脂成分,與丙烯酸或甲基丙烯酸或該等之衍生物的共聚 物或混合樹脂。 9 ·如申請專利範圍第2項之含矽二層光阻製程用下層膜 形成材料,其中上述至少具施加特定能量而末端基脫離產生 磺酸殘基之取代基的樹脂成分係, 對如申請專利範圍第4項之樹脂成分與丙烯酸或甲基丙 烯酸或該等之衍生物的共聚物或混合樹脂,以下述一般式( 2) -2- 1258635(wherein n is an integer of 1 to 1000, a linear or branched alkyl chain having 1 to 10 carbon atoms, an aromatic or alicyclic cyclic alkyl chain, an alkyl ester chain' is specifically The application of energy produces a repeating unit of the substituent of the sulfonic acid residue) 1258635. 4. The underlayer film forming material for a bismuth-containing two-layer photoresist process according to claim 2, wherein the specific energy applied to generate the sulfonic acid residue is light or/and heat. 5. The underlayer film forming material for the second-layer photoresist process according to item 3 of the patent application, wherein the substituent γ of the above general formula (1) is -S03R! or -S〇3_R2+ (wherein R^R2 is Carbon number υο organic basis). 6. The underlayer film forming material for a ruthenium-containing two-layer photoresist process according to claim 5, wherein the organic group 1 is selected from the group consisting of an alkyl group having 1 to 10 carbon atoms or a base group. 7. The underlayer film forming material for a bismuth-containing two-layer photoresist process according to claim 5, wherein the organic group r2 is selected from the group consisting of alkanolamines having a carbon number of 1 to 10, and at least one of the terpene-based fee . 8. The underlayer film forming material for a bismuth-containing two-layer photoresist process according to claim 2, wherein the resin component having at least a specific energy and the terminal group is detached from a substituent which generates a sulfonic acid residue is applied for A resin component of the fourth aspect of the patent, a copolymer or a mixed resin with acrylic acid or methacrylic acid or such derivatives. 9. The underlayer film forming material for a bismuth-containing two-layer photoresist process according to claim 2, wherein the resin component having at least a specific energy and the terminal group is detached from a substituent which generates a sulfonic acid residue is applied for a copolymer or mixed resin of a resin component of the fourth aspect of the patent with acrylic acid or methacrylic acid or such derivatives, as defined in the following general formula (2) -2- 1258635 (式中η表1至1000之整數,R3係氫原子、氟原子、羥 基、羧基、碳原子數1至5之羥基烷基、碳原子數1至5之烷 基氧基烷基之中選出的至少一種,Z係碳原子數1至10之直 鏈或分枝烷基鏈,芳香性或脂環式環狀烷基鏈,烷基酯鏈 )之重複單元共聚之共聚物或以具上述一般式(2)之重複 單元的樹脂化合物混合的混合樹脂所成之樹脂成分。 1 〇.如申請專利範圍第2項之含矽二層光阻製程用下層 膜形成材料,其中更含有交聯劑。 1 1. 一種電路形成方法,其特徵爲:含 於基板上,使用如申請專利範圍第2項之含矽二層光阻 下層膜形成材料,形成光阻下層膜之下層膜形成過程, 於上述下層膜上使用含矽光阻材料形成光阻上層膜,於 該光阻上層膜施以曝光及顯像處理,形成特定光阻圖型之上 層光阻圖型形成過程, 上述上層光阻圖型未覆蓋之上述下層膜的露出部份以乾 式蝕刻去除之下層圖型形成過程, 以上述上層光阻圖型及下層圖型爲遮罩,蝕刻上述基板 形成特定電路圖型之電路圖型形成過程,以及 殘留於形成上述電路圖型後之基板上的上述下層圖型及 上層光阻圖型以光阻剝離液同時去除之光阻圖型去除過程。 -3- 1258635 1 2 ·如申請專利範圍第11項之電路形成方法,其中用於 上述下層光阻圖型形成過程之上述光阻剝離液至少含有選自 水溶性胺,及四級銨氫氧化物中之至少一種。 1 3 ·如申請專利範圍第1 2項之電路形成方法,其中上述 水溶性胺係選自烷醇胺,及烷基胺之至少一種。 14. 一種多層光阻製程用下層膜形成材料,係構成用以 於基板上高精度形成電路層之成爲最終光阻圖型的至少具下 層膜、中間層膜及光阻上層膜而成的多層光阻製程之上述下 層膜形成材料,其特徵爲: 含有至少具施加特定能量而末端基脫離產生磺酸殘基之 取代基的樹脂成分及溶劑。 1 5 .如申請專利範圍第1 4項之多層光阻製程用下層膜形 成材料,其中上述樹脂成分至少具有下述一般式(1)(wherein n is an integer of 1 to 1000, and R3 is a hydrogen atom, a fluorine atom, a hydroxyl group, a carboxyl group, a hydroxyalkyl group having 1 to 5 carbon atoms, and an alkyloxyalkyl group having 1 to 5 carbon atoms; a copolymer of at least one of a Z-based linear or branched alkyl chain having 1 to 10 carbon atoms, an aromatic or alicyclic cyclic alkyl chain, an alkyl ester chain, or the like A resin component obtained by mixing a resin compound of a repeating unit of the general formula (2). 1 〇. The underlayer film forming material for the bismuth-containing two-layer photoresist process of claim 2, which further contains a crosslinking agent. 1 1. A circuit forming method, comprising: forming on a substrate, using a bismuth-containing two-layer photoresist underlayer film forming material as in claim 2, forming a film forming process under the photoresist underlayer film, A photoresist upper layer film is formed on the underlayer film by using a ruthenium-containing photoresist material, and the photoresist upper layer film is subjected to exposure and development processing to form a photoresist pattern formation process of the specific photoresist pattern type, and the upper layer photoresist pattern is formed. The exposed portion of the underlying film that is not covered is subjected to dry etching to remove the underlying pattern forming process, and the upper layer photoresist pattern and the lower layer pattern are used as masks, and the circuit pattern forming process for etching the substrate to form a specific circuit pattern is performed, and The above-mentioned lower layer pattern and the upper photoresist pattern remaining on the substrate on which the circuit pattern is formed are removed by the photoresist stripping liquid while removing the photoresist pattern. -3- 1258635 1 2, the circuit forming method of claim 11, wherein the photoresist stripping solution used in the forming process of the lower photoresist pattern contains at least a water-soluble amine and a quaternary ammonium hydroxide At least one of them. The circuit forming method of claim 12, wherein the water-soluble amine is at least one selected from the group consisting of an alkanolamine and an alkylamine. 14. An underlayer film forming material for a multilayer photoresist process, comprising a plurality of layers of an underlayer film, an interlayer film, and a photoresist upper film which are formed into a final photoresist pattern on a substrate with high precision on a substrate. The underlayer film forming material of the photoresist process is characterized by comprising a resin component and a solvent having at least a specific energy and a terminal group desorbing a substituent which generates a sulfonic acid residue. 1 . The underlayer film forming material for a multilayer photoresist process according to claim 14 wherein the resin component has at least the following general formula (1); …⑴ (式中η表1至1000之整數,X係碳原子數1至10之直 鏈或分枝烷基鏈、芳香性或脂環式環狀烷基鏈、烷基酯鏈 ,Υ系受特定能量之施加而產生磺酸殘基之取代基)之重 複單元。 16.如申請專利範圍第14項之多層光阻製程用下層膜 -4- 1258635 形成材料,其中上述用以產生磺酸殘基而施加之特定能量係 8(TC以上之熱。 17·如申請專利範圍第15項之多層光阻製程用下層膜形 成材料,上述一般式(1 )之取代基Y係—SChRi或—SCh_ R2 + (式中1及1^係碳數1〜10之有機基)。(1) (wherein n is an integer of 1 to 1000, X is a linear or branched alkyl chain having 1 to 10 carbon atoms, an aromatic or alicyclic cyclic alkyl chain, an alkyl ester chain, an anthracene system A repeating unit that produces a substituent of a sulfonic acid residue by the application of a specific energy. 16. The underlayer film -4- 1258635 forming material for a multilayer photoresist process according to claim 14 of the invention, wherein the specific energy system 8 (the heat of TC or more is applied to generate a sulfonic acid residue. 17) The underlayer film forming material for the multilayer photoresist process of the fifteenth aspect of the patent, wherein the substituent Y of the above general formula (1) is -SChRi or -SCh_R2 + (wherein 1 and 1 are an organic group having 1 to 10 carbon atoms) ). 18.如申請專利範圍第π項之多層光阻製程用下層膜形 成材料,其中上述有機基^係選自碳原子數丨至…之烷基, 或羥基烷基中的一種。 19·如申請專利範圍第17項之多層光阻製程用下層膜形 成材料,其中上述有機基R2係選自碳數^10之烷醇胺,及烷 基胺之中的至少一種。18. The underlayer film forming material for a multilayer photoresist process according to the πth aspect of the invention, wherein the organic group is selected from the group consisting of an alkyl group having a carbon number of 丨 to ... or a hydroxyalkyl group. The underlayer film forming material for a multilayer photoresist process according to claim 17, wherein the organic group R2 is at least one selected from the group consisting of an alkanolamine having a carbon number of 10 and an alkylamine. 20. 如申請專利範圍第14項之多層光阻製程用下層膜形 成材料,其中上述至少具施加特定能量而末端基脫離產生磺 酸殘基的取代基之樹脂成分係,如申請專利範圍第1 7項之樹 脂成分,與丙烯酸或甲基丙烯酸或該等的衍生物之共聚物或 混合樹脂。 21. 如申請專利範圍第14項之多層光阻製程用下層膜形 成材料,其中上述至少具有施加特定能量而末端基脫離產生 礦酸殘基之取代基的樹脂成分係, 對如申請專利範圍第丨7項之樹脂成分與丙烯酸或甲基丙 烯酸或該等之衍生物的共聚物或混合樹脂,以下述一般式( •5- 2 ) · 125863520. The underlayer film forming material for a multilayer photoresist process according to claim 14, wherein the resin component having at least a specific energy and the terminal group is detached from a substituent which generates a sulfonic acid residue is as claimed in claim 1 A resin component of item 7 and a copolymer or mixed resin of acrylic acid or methacrylic acid or the like. 21. The underlayer film forming material for a multilayer photoresist process according to claim 14, wherein the resin component having at least a specific energy and the terminal group is desorbed to generate a mineral acid residue is as claimed in the patent application. Copolymer or mixed resin of 树脂7 item of resin component with acrylic acid or methacrylic acid or such derivatives, in the following general formula (•5-2) · 1258635 R3 ... (2) (式中n表1至1000之整數,R3係選自氫原子、氟原子 、羥基、羧基、碳原子數1至5之羥基烷基、碳原子數1至5 之烷基氧基烷基中之至少一種,Z係碳原子數1至10之直鏈 或分枝烷基鏈,芳香性或脂環式環狀烷基鏈,烷基酯鏈) 之重複單元共聚之共聚物,或以具上述一般式(2)之重複 單元的樹脂化合物混合的混合樹脂所成之樹脂成分。 22·如申請專利範圍第14項之多層光阻製程用下層膜 形成材料,其中更含交聯劑。 23. —種電路形成方法,其特徵爲:含 於基板上,使用如申請專利範圍第1 4項之多層光阻製程 用下層膜形成材料,形成光阻下層膜之下層膜形成過程, 於上述下層膜上用矽氧化膜材料形成光阻中間層膜之中 間層膜形成過程, 於上述中間層膜上形成光阻上層膜,於該光阻上層膜施 以曝光及顯像處理,形成特定光阻圖型之上層光阻圖型形成 過程5 上述上層光阻圖型未覆蓋之上述中間層膜的露出部份以 乾式蝕刻去除之中間層圖型形成過程, 以上述中間層圖型作爲遮罩將該遮罩未覆蓋部份之上述 下層膜的露出部份以乾式蝕刻去除之下層光阻圖型形成過程 1258635 以上述下層圖型爲遮罩,蝕刻上述基板上之層間絕緣層 形成特定電路圖型之電路圖型形成過程,以及 形成上述電路圖型後之基板上殘留的上述下層圖型以光 阻剝離液去除之下層圖型去除過程。 24. 如申請專利範圍第23項之電路形成方法,其中用於 上述下層圖型形成過程之上述光阻剝離液至少含有選自水溶 性胺,及四級銨氫氧化物之中的至少一種。 25. 如申請專利範圍第24項之電路形成方法,其中上述 水溶性胺係選自烷醇胺,及烷基胺的至少一種。 26. 如申請專利範圍第23項之電路形成方法,其中用以 形成上述中間層之矽氧化膜材料,係使用選自 (A ) Si ( OR1 ) a ( OR2 ) b ( 〇R3 ) c ( OR4 ) d (式中R1,R2,R3及R4各自獨立,係碳原子數1至4之 烷基或苯基,a,b,c及 d係 0SaS4,0SbS4,0Sc$4, 〇SdS4,且滿足a + b + c + d = 4之條件的整數)之化合物, (B ) R5Si ( OR6 ) c ( OR7 ) f ( OR5 ), (式中R5係氫原子或碳原子數1至4之烷基,R6,R7及 R8各係碳原子數1至3之烷基或苯基’ e,f及g係OS eg 3, 〇 $ f S 3,〇$ g S 3,且滿足e + f+g = 3之條件的整數)之化合 1258635 物,以及 (c) R9R10Si ( OR11 ) h ( OR12 )R3 (2) (wherein n is an integer of 1 to 1000, and R3 is selected from the group consisting of a hydrogen atom, a fluorine atom, a hydroxyl group, a carboxyl group, a hydroxyalkyl group having 1 to 5 carbon atoms, and a carbon number of 1 to 5 Repetitive unit copolymerization of at least one of alkyloxyalkyl groups, Z-based linear or branched alkyl chains having 1 to 10 carbon atoms, aromatic or alicyclic cyclic alkyl chains, alkyl ester chains) A resin component obtained by mixing a copolymer or a mixed resin of a resin compound having a repeating unit of the above general formula (2). 22. The underlayer film forming material for a multilayer photoresist process according to claim 14 of the patent application, which further comprises a crosslinking agent. 23. A method of forming a circuit, comprising: forming a material on a substrate using a lower layer film forming material for a multilayer photoresist process as disclosed in claim 14 of the patent application, forming a film formation process under the photoresist underlayer film, Forming an intermediate layer film of the photoresist intermediate layer film on the underlying film, forming a photoresist upper layer film on the intermediate layer film, and applying an exposure and development process to the photoresist upper layer film to form a specific light Blocking pattern upper layer photoresist pattern forming process 5: The exposed portion of the intermediate layer film not covered by the upper photoresist pattern is formed by dry etching to remove the intermediate layer pattern forming process, and the intermediate layer pattern is used as a mask The exposed portion of the underlying film of the uncovered portion of the mask is removed by dry etching to remove the underlying photoresist pattern forming process 1258635. The underlying pattern is used as a mask to etch the interlayer insulating layer on the substrate to form a specific circuit pattern. The circuit pattern forming process and the above-mentioned lower layer pattern remaining on the substrate after forming the circuit pattern are removed by the photoresist stripping liquid to remove the underlying pattern . 24. The circuit forming method according to claim 23, wherein the photoresist stripping liquid used in the forming process of the lower layer pattern contains at least one selected from the group consisting of a water-soluble amine and a quaternary ammonium hydroxide. 25. The circuit forming method according to claim 24, wherein the water-soluble amine is at least one selected from the group consisting of an alkanolamine and an alkylamine. 26. The circuit forming method of claim 23, wherein the tantalum oxide film material for forming the intermediate layer is selected from (A) Si (OR1) a ( OR2 ) b ( 〇R3 ) c ( OR4 d (wherein R1, R2, R3 and R4 are each independently, an alkyl group having 1 to 4 carbon atoms or a phenyl group, a, b, c and d are 0SaS4, 0SbS4, 0Sc$4, 〇SdS4, and satisfy a + b + c + d = an integer of the condition of 4), (B) R5Si ( OR6 ) c ( OR7 ) f ( OR5 ), (wherein R 5 is a hydrogen atom or an alkyl group having 1 to 4 carbon atoms, R6, R7 and R8 are each an alkyl group having 1 to 3 carbon atoms or a phenyl 'e,f and g system OS eg 3, 〇$ f S 3, 〇$ g S 3 and satisfying e + f+g = a combination of the conditions of 3) 1258635, and (c) R9R10Si (OR11) h (OR12) (式中R9及R1()係氫原子或碳原子數1至4之烷基,Rii 及R12各係碳原子數1至3之烷基或苯基,h及i係〇sh^2, 〇 S i S 2,且滿足h + i = 2之條件的整數)之旋塗玻璃材料的至 少一種化合物之水解產物。 27· —種雙大馬士革構造形成用包埋材料,係用以形成 至少由形成於基板上之低介電體層的第一蝕刻空間及連通該 第一蝕刻空間同時與該第一鈾刻空間形狀及尺寸不同的第二 蝕刻空間構成之雙大馬士革構造的蝕刻空間包埋材料,其特 徵爲:(wherein R9 and R1() are a hydrogen atom or an alkyl group having 1 to 4 carbon atoms, and Rii and R12 each are an alkyl group having 1 to 3 carbon atoms or a phenyl group; h and i are 〇sh^2, 〇 A hydrolyzate of at least one compound of a spin-on glass material of S i S 2 and an integer satisfying the condition of h + i = 2. 27. The double damascene structure forming embedding material for forming a first etching space formed by at least a low dielectric layer formed on the substrate and communicating the first etching space and the first uranium engraving space shape and An etching space embedding material of a double damascene structure composed of a second etching space of different sizes, characterized by: 含有至少具施加特定能量而末端基脫離產生磺酸殘基之 取代基的樹脂成分及溶劑。 28.如申請專利範圍第27項之雙大馬士革構造形成用包 埋材料,其中上述樹脂成分至少具有下述一般式(1)A resin component and a solvent containing at least a substituent having a specific energy and a terminal group derived from a sulfonic acid residue. 28. The embedding material for forming a double damascene structure according to claim 27, wherein the resin component has at least the following general formula (1) -8 - 1258635 (式中η表1至1000之整數,X係碳原子數1至l〇之直 鏈或分枝烷基鏈、芳香性或脂環式環狀烷基鏈、烷基酯鏈 ,γ系受特定能量之施加而產生磺酸殘基之取代基)之重 複單元。 29. 如申請專利範圍第27項之雙大馬士革構造形成用包 埋材料,其中上述用以產生磺酸殘基而施加之特定能量係80 °C以上之熱。-8 - 1258635 (wherein η is an integer from 1 to 1000, X is a linear or branched alkyl chain having 1 to 10 carbon atoms, an aromatic or alicyclic cyclic alkyl chain, an alkyl ester chain , γ is a repeating unit that is subjected to the application of a specific energy to produce a substituent of a sulfonic acid residue. 29. The embedding material for forming a double damascene structure according to claim 27, wherein the specific energy applied to generate the sulfonic acid residue is heat of 80 ° C or higher. 30. 如申請專利範圍第28項之雙大馬士革構造形成用包 埋材料,其中上述一般式(1 )之取代基係一 SChR!- — SCV R,(式中Ri及R2係碳數1〜10之有機基)。 3 1.如申請專利範圍第30項之雙大馬士革構造形成用包 埋材料,其中上述有機基1^係選自碳原子數1至10之烷基, 或羥基烷基之中的一種。30. The embedding material for forming a double damascene structure according to claim 28, wherein the substituent of the above general formula (1) is a SchrR!--SCV R, (wherein Ri and R2 are carbon numbers 1 to 10) Organic base). 3. The embedding material for forming a double damascene structure according to claim 30, wherein the organic group is selected from the group consisting of an alkyl group having 1 to 10 carbon atoms or a hydroxyalkyl group. 32. 如申請專利範圍第30項之雙大馬士革構造形成用包 埋材料,其中上述有機基r2係選自碳數1〜1〇之烷醇胺,及烷 基胺之中的至少一種。 33. 如申請專利範圍第27項之雙大馬士革構造形成用包 埋材料,其中上述至少具經施加特定能量而末端基脫離產生 磺酸殘基之取代基的樹脂成分係,如申請專利範圍第30項之 樹脂成分,與丙烯酸或甲基丙烯酸或該等之衍生物的共聚物 或混合樹脂。 34. 如申請專利範圍第27項之雙大馬士革構造形成用包 埋材料,其中上述至少具施加特定能量而末端基脫離產生磺 酸殘基之取代基的樹脂成分係, -9- 1258635 對如申請專利範圍第3 0項之樹脂成分與丙丨希酸或甲基丙 稀酸或該等衍生物的共聚物或混合樹脂’以下述一般式(2The embedding material for forming a double damascene structure according to claim 30, wherein the organic group r2 is at least one selected from the group consisting of an alkanolamine having 1 to 1 carbon atoms and an alkylamine. 33. The embedding material for forming a double damascene structure according to claim 27, wherein the resin component having at least a specific energy and the terminal group is separated from a substituent which generates a sulfonic acid residue is as claimed in claim 30 a resin component of the article, a copolymer or a mixed resin with acrylic acid or methacrylic acid or such derivatives. 34. The embedding material for forming a double damascene structure according to claim 27, wherein the above-mentioned resin component having at least a specific energy and the terminal group is separated from a substituent which generates a sulfonic acid residue, -9- 1258635 The resin component of the 30th item of the patent scope and the copolymer or mixed resin of propyl citrate or methyl acrylate or the derivatives are as follows: (式中η表1至1000之整數,R3係選自氫原子、氟原子 、羥基、羧基、碳原子數1至5之羥基烷基、碳原子數丨至5 之院基氧基院基中之至少一種,Z係碳原子數I至10之直鏈 或分枝烷基鏈,芳香性或脂環式環狀烷基鏈,院基醋鏈) 之重複單元共聚之共聚物或以具有上述一般式(2)之重複 單元的樹脂化合物混合之混合樹脂所成的樹脂成分。 3 5 .如申請專利範圍第27項之雙大馬士革構造形成用 包埋材料,其中更含有交聯劑。 3 6 · —種雙大馬士革構造形成方法’其特徵爲:具有 於具金屬層之基板上以至少由低介電體層所成之層間 絕緣層層合的層間絕緣層形成過程, 於上述層間絕緣層上形成光阻層,圖型曝光後,作顯 像處理形成光阻圖型,以該光阻圖型爲遮罩進行蝕刻於上 述層間絕緣層形成第一蝕刻空間之第一蝕刻空間形成過程 -10- 1258635 於上述層間絕緣層上,以如申請專利範圍第2 7項之包 埋材料塗布,形成包埋材層,同時充塡包埋材於上述第一鈾 刻空間之包埋過程, 於上述包埋材層上形成光阻層,照射圖型光於該光阻層 ,以2.38重量%TMAH顯像液顯像,形成光阻圖型之光阻圖型 形成過程,(wherein n is an integer of 1 to 1000, and R3 is selected from the group consisting of a hydrogen atom, a fluorine atom, a hydroxyl group, a carboxyl group, a hydroxyalkyl group having 1 to 5 carbon atoms, and a valence of 5 to 5 a copolymer of repeating unit copolymerization of at least one of a Z-based linear or branched alkyl chain having 1 to 10 carbon atoms, an aromatic or alicyclic cyclic alkyl chain, and a quaternary acetal chain; A resin component obtained by mixing a resin compound of a repeating unit of the formula (2). 3 5. An embedding material for forming a double damascene structure as claimed in claim 27, which further contains a crosslinking agent. 3 6 · a method for forming a double damascene structure, characterized by: forming an interlayer insulating layer formed by laminating an interlayer insulating layer formed of at least a low dielectric layer on a substrate having a metal layer, in the interlayer insulating layer Forming a photoresist layer on the upper surface, and performing a developing process to form a photoresist pattern, wherein the photoresist pattern is used as a mask to etch the first etching space formed by forming the first etching space in the interlayer insulating layer- 10- 1258635 is coated on the interlayer insulating layer by using an embedding material as disclosed in claim 27, forming an embedding material layer, and filling the embedding material in the embedding process of the first uranium engraving space, Forming a photoresist layer on the embedding material layer, irradiating the pattern light on the photoresist layer, and developing the image with a 2.38 wt% TMAH developing solution to form a photoresist pattern forming process of the photoresist pattern. 以上述光阻圖型爲遮罩進行蝕刻,以特定圖型去除上述 第一蝕刻空間上部之上述層間絕緣層而形成與上述第一蝕刻 空間連通之第二蝕刻空間的第二蝕刻空間形成過程,以及 以剝離液去除殘留在上述第二蝕刻空間的包埋材之包埋 材去除過程。Etching, using the photoresist pattern as a mask, removing the interlayer insulating layer on the upper portion of the first etching space by a specific pattern to form a second etching space forming process of the second etching space in communication with the first etching space, And an embedding material removing process of removing the embedded material remaining in the second etching space by using a stripping solution. 37.如申請專利範圍第36項之雙大馬士革構造形成方法 ,其中更具有,上述包埋過程後,於上述層間絕緣層上之包 埋材層上形成反射防止膜的反射防止膜形成過程,以及,在 上述光阻圖型形成過程後,以上述光阻圖型爲遮罩將上述反 射防止膜的露出部份以乾式蝕刻作加工之反射防止膜加工過 程。 3 8.如申請專利範圍第36項之雙大馬士革構造形成方法 ,其中上述包埋材去除過程用之剝離液至少含有選自水溶性 胺,及四級銨氫氧化物之中的至少一種。 39.如申請專利範圍第38項之雙大馬士革構造形成方 法,其中上述水溶性胺係選自烷醇胺,及烷基胺的至少一 種。 -11 -37. The method for forming a double damascene structure according to claim 36, further comprising: forming an antireflection film forming process of the antireflection film on the embedding material layer on the interlayer insulating layer after the embedding process; After the photoresist pattern forming process, the resistive pattern is used as a mask to process the exposed portion of the anti-reflection film by dry etching. 3. The method of forming a double damascene structure according to claim 36, wherein the stripping liquid for the above-mentioned embedding material removing process contains at least one selected from the group consisting of water-soluble amines and quaternary ammonium hydroxides. 39. The method of forming a dual damascene structure according to claim 38, wherein the water-soluble amine is selected from the group consisting of alkanolamines and at least one of alkylamines. -11 -
TW092133232A 2002-11-27 2003-11-26 Undercoating material for wiring, embedded material, and wiring formation method TWI258635B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2002343869A JP3914492B2 (en) 2002-11-27 2002-11-27 Underlayer film forming material for silicon-containing two-layer resist process and wiring forming method using the same
JP2002343867A JP3914490B2 (en) 2002-11-27 2002-11-27 Lower layer film forming material for lithography and wiring forming method using the same
JP2002343868A JP3914491B2 (en) 2002-11-27 2002-11-27 Dual damascene structure forming embedding material and dual damascene structure forming method using the same
JP2002343870A JP3914493B2 (en) 2002-11-27 2002-11-27 Underlayer film forming material for multilayer resist process and wiring forming method using the same

Publications (2)

Publication Number Publication Date
TW200416482A TW200416482A (en) 2004-09-01
TWI258635B true TWI258635B (en) 2006-07-21

Family

ID=34397118

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092133232A TWI258635B (en) 2002-11-27 2003-11-26 Undercoating material for wiring, embedded material, and wiring formation method

Country Status (3)

Country Link
US (1) US7238462B2 (en)
KR (1) KR100577040B1 (en)
TW (1) TWI258635B (en)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100586165B1 (en) * 2003-12-30 2006-06-07 동부일렉트로닉스 주식회사 Floor anti-reflective coating method
US7144828B2 (en) * 2004-01-30 2006-12-05 Chartered Semiconductor Manufacturing Ltd. He treatment to improve low-k adhesion property
US20060081965A1 (en) * 2004-10-15 2006-04-20 Ju-Ai Ruan Plasma treatment of an etch stop layer
JP2007178885A (en) * 2005-12-28 2007-07-12 Az Electronic Materials Kk Patterns and wiring patterns and methods for producing them
EP1845416A3 (en) * 2006-04-11 2009-05-20 Rohm and Haas Electronic Materials, L.L.C. Coating compositions for photolithography
US20070254476A1 (en) * 2006-04-28 2007-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Cleaning porous low-k material in the formation of an interconnect structure
KR100743653B1 (en) * 2006-06-29 2007-07-30 주식회사 하이닉스반도체 Laminated Semiconductor Package and Manufacturing Method Thereof
KR101423057B1 (en) * 2006-08-28 2014-07-25 닛산 가가쿠 고교 가부시키 가이샤 A resist lower layer film forming composition comprising a liquid additive
JP4786636B2 (en) * 2007-12-26 2011-10-05 Azエレクトロニックマテリアルズ株式会社 Antireflection film forming composition and pattern forming method using the same
TWI400575B (en) * 2008-10-28 2013-07-01 Shinetsu Chemical Co Photoresist undercoat-forming material and patterning process
JP4813537B2 (en) 2008-11-07 2011-11-09 信越化学工業株式会社 Resist underlayer material containing thermal acid generator, resist underlayer film forming substrate, and pattern forming method
EP2743770B1 (en) 2011-08-12 2015-12-30 Mitsubishi Gas Chemical Company, Inc. Underlayer film-forming material for lithography, underlayer film for lithography, and pattern formation method
KR20190133288A (en) * 2012-02-01 2019-12-02 닛산 가가쿠 가부시키가이샤 Semiconductor device manufacturing method using silicon-containing resist underlayer film forming composition for solvent development
US9245789B2 (en) 2012-10-09 2016-01-26 Nec Corporation Method for forming wiring
CN104995559B (en) 2013-02-08 2020-04-07 三菱瓦斯化学株式会社 Resist composition, resist pattern forming method, and polyphenol derivative used therefor
JP6390911B2 (en) 2013-02-08 2018-09-19 三菱瓦斯化学株式会社 COMPOUND, LITHOGRAPHIC LOWER FILM FORMING MATERIAL, LITHOGRAPHY LOWER FILM AND PATTERN FORMING METHOD
US9809601B2 (en) 2013-02-08 2017-11-07 Mitsubishi Gas Chemical Company, Inc. Compound, material for forming underlayer film for lithography, underlayer film for lithography and pattern forming method
WO2014208324A1 (en) * 2013-06-24 2014-12-31 Jsr株式会社 Composition for film formation use, resist underlayer film and method for formation thereof, pattern formation method, and compound
US9159561B2 (en) * 2013-12-26 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method for overcoming broken line and photoresist scum issues in tri-layer photoresist patterning
KR102388290B1 (en) 2014-03-24 2022-04-20 제이에스알 가부시끼가이샤 Pattern forming method
SG11201705038XA (en) 2014-12-25 2017-07-28 Mitsubishi Gas Chemical Co Compound, resin, material for forming underlayer film for lithography, underlayer film for lithography, pattern forming method, and purification method
KR101571711B1 (en) * 2015-02-06 2015-11-25 동우 화인켐 주식회사 Thinner composition
US11256170B2 (en) 2015-03-31 2022-02-22 Mitsubishi Gas Chemical Company, Inc. Compound, resist composition, and method for forming resist pattern using it
WO2016158169A1 (en) 2015-03-31 2016-10-06 三菱瓦斯化学株式会社 Resist composition, method for forming resist pattern, and polyphenol compound used therein
EP3346335A4 (en) 2015-08-31 2019-06-26 Mitsubishi Gas Chemical Company, Inc. Material for forming underlayer films for lithography, composition for forming underlayer films for lithography, underlayer film for lithography and method for producing same, pattern forming method, resin, and purification method
JP7020912B2 (en) 2015-08-31 2022-02-16 三菱瓦斯化学株式会社 Underlayer film forming material for lithography, composition for forming underlayer film for lithography, underlayer film for lithography and its manufacturing method, and resist pattern forming method.
CN108137478B (en) 2015-09-10 2021-09-28 三菱瓦斯化学株式会社 Compound, composition thereof, purification method, resist pattern formation method, and amorphous film production method
WO2017111165A1 (en) 2015-12-25 2017-06-29 三菱瓦斯化学株式会社 Compound, resin, composition, method for forming resist pattern, and method for forming circuit pattern
WO2017141612A1 (en) 2016-02-15 2017-08-24 Jsr株式会社 Composition for forming resist underlayer film, resist underlayer film and method for producing patterned substrate
WO2017208796A1 (en) 2016-06-03 2017-12-07 Jsr株式会社 Composition for forming film, film, method for forming resist underlayer film, method for manufacturing patterned substrate, and compound
TWI743143B (en) 2016-08-10 2021-10-21 日商Jsr股份有限公司 Resist underlayer film forming composition for semiconductor, resist underlayer film, method for forming resist underlayer film, and method for manufacturing patterned substrate
WO2018221575A1 (en) 2017-05-31 2018-12-06 三井化学株式会社 Material for forming underlayer film, resist underlayer film, method for producing resist underlayer film, and laminated body
KR102298165B1 (en) 2018-03-14 2021-09-06 주식회사 엘지화학 Embedded transparent electrode substrate and method for manufacturing thereof
CN111952246A (en) * 2020-08-19 2020-11-17 惠科股份有限公司 Manufacturing method of array substrate

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01217328A (en) * 1988-02-26 1989-08-30 Nippon Telegr & Teleph Corp <Ntt> Organic nonlinear optical material
US5310581A (en) * 1989-12-29 1994-05-10 The Dow Chemical Company Photocurable compositions
US5506090A (en) * 1994-09-23 1996-04-09 Minnesota Mining And Manufacturing Company Process for making shoot and run printing plates
US5759746A (en) 1996-05-24 1998-06-02 Kabushiki Kaisha Toshiba Fabrication process using a thin resist
JP3297324B2 (en) * 1996-10-30 2002-07-02 富士通株式会社 Resist composition, method for forming resist pattern, and method for manufacturing semiconductor device
KR100232187B1 (en) * 1996-12-27 1999-12-01 김영환 Anti-reflection film etching method
JP3866401B2 (en) * 1997-02-10 2007-01-10 富士フイルムホールディングス株式会社 Planographic printing plate precursor and planographic printing method
US5994430A (en) 1997-04-30 1999-11-30 Clariant Finance Bvi) Limited Antireflective coating compositions for photoresist compositions and use thereof
US5981145A (en) 1997-04-30 1999-11-09 Clariant Finance (Bvi) Limited Light absorbing polymers
JPH10319601A (en) 1997-05-22 1998-12-04 Jsr Corp Composition for forming antireflection film and method for forming resist pattern
US6127089A (en) * 1998-08-28 2000-10-03 Advanced Micro Devices, Inc. Interconnect structure with low k dielectric materials and method of making the same with single and dual damascene techniques
US6037266A (en) * 1998-09-28 2000-03-14 Taiwan Semiconductor Manufacturing Company Method for patterning a polysilicon gate with a thin gate oxide in a polysilicon etcher
US6232002B1 (en) * 1998-11-06 2001-05-15 Advanced Micro Devices, Inc. Bilayer anti-reflective coating and etch hard mask
US6329118B1 (en) 1999-06-21 2001-12-11 Intel Corporation Method for patterning dual damascene interconnects using a sacrificial light absorbing material
JP2001183849A (en) 1999-12-27 2001-07-06 Tokyo Ohka Kogyo Co Ltd Remover for photoresist and method for removing photoresist using same
KR100520186B1 (en) * 2000-06-21 2005-10-10 주식회사 하이닉스반도체 Partially crosslinked polymer for bilayer photoresist
JP2002033257A (en) 2000-07-17 2002-01-31 Fuji Photo Film Co Ltd Method for peeling off silicon-containing two-layer resist
KR100349680B1 (en) 2000-08-31 2002-08-24 주식회사 하이닉스반도체 Method for forming dual damascene interconnection
AU2001292783A1 (en) * 2000-09-19 2002-04-02 Shipley Company, L.L.C. Antireflective composition
US20020139771A1 (en) 2001-02-22 2002-10-03 Ping Jiang Gas switching during an etch process to modulate the characteristics of the etch
JP2002299441A (en) 2001-03-30 2002-10-11 Jsr Corp Method of forming dual damascene structure
JP4139575B2 (en) 2001-04-13 2008-08-27 富士フイルム株式会社 Lower layer resist composition for silicon-containing two-layer resist
US7045276B2 (en) * 2001-10-11 2006-05-16 Fuji Photo Film Co., Ltd. Hydrophilic member precursor and pattern forming material that utilizes it, support for planographic printing plate, and planographic printing plate precursor

Also Published As

Publication number Publication date
KR20040047702A (en) 2004-06-05
KR100577040B1 (en) 2006-05-08
TW200416482A (en) 2004-09-01
US20050074695A1 (en) 2005-04-07
US7238462B2 (en) 2007-07-03

Similar Documents

Publication Publication Date Title
TWI258635B (en) Undercoating material for wiring, embedded material, and wiring formation method
JP3914493B2 (en) Underlayer film forming material for multilayer resist process and wiring forming method using the same
JP4042981B2 (en) Anti-reflective hard mask composition for lithography and method for manufacturing semiconductor device using the same
JP5225606B2 (en) Resin composition, pattern forming method using the same, and capacitor forming method
US8354365B2 (en) Cleaning liquid for lithography and method for forming wiring
JP3810309B2 (en) Manufacturing method of semiconductor device
CN102084300B (en) Ultrafine patterning mask, method for producing same, and method of using same for forming ultrafine patterns
US8206509B2 (en) Cleaning liquid for lithography and method for forming wiring
KR20190024779A (en) Composition for forming organic film, substrate for manufacturing semiconductor apparatus, method for forming organic film, patterning process, and polymer
US20080044776A1 (en) Underlayer compositions containing heterocyclic aromatic structures
JP7445583B2 (en) Resist underlayer film material, pattern forming method, and resist underlayer film forming method
KR20210066740A (en) Material for forming organic film, patterning process, and polymer
WO2010032796A1 (en) Composition for forming side wall
JP3914490B2 (en) Lower layer film forming material for lithography and wiring forming method using the same
EP4339702A1 (en) Compound for forming metal-containing film, composition for forming metal-containing film, patterning process, and semiconductor photoresist material
US11276568B2 (en) Method for manufacturing a semiconductor device and a coating material
US20250357118A1 (en) Photoresist and method
KR102493736B1 (en) Resist underlayer film material, patterning process, and method for forming resist underlayer film
JP3914492B2 (en) Underlayer film forming material for silicon-containing two-layer resist process and wiring forming method using the same
US20250087495A1 (en) Compound For Forming Metal-Containing Film, Composition For Forming Metal-Containing Film, And Patterning Process
JP3914491B2 (en) Dual damascene structure forming embedding material and dual damascene structure forming method using the same
WO2004051740A1 (en) Semiconductor multilayer interconnection forming method
WO2008075860A1 (en) High etch resistant hardmask composition having antireflective properties, method for forming patterned material layer using the hardmask composition and semiconductor integrated circuit device produced using the method
CN120315249A (en) Organic film forming composition, organic film forming method, pattern forming method, and surfactant
CN120315247A (en) Organic film forming composition, organic film forming method, pattern forming method, and surfactant

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees