TW580578B - System and method for testing integrated circuit devices - Google Patents

Abstract

The invention disclosed herein is a system and method for testing integrated circuit devices, including memory chips. The devices under test are subject to behavioural testing, in which a copy of signals in an application system is directed to the device under test, or to an electronic component connected to the device under test. This permits the device under test to be tested under the operating conditions of the application system, which is preferably similar to the actual application environment in which the device under test will ultimately be used. Conventional tests, including pattern testing and/or parametric tests, may also be performed on devices under test, if desired.

Description

580578 V. Description of the Invention (l) Field of the Invention The present invention relates to a test system and method for integrated circuit components. More specifically, the present invention relates to a system and method that allows integrated circuit components to be tested in an environment that represents the application environment in which the integrated circuit components are to be used, such as a personal computer or a PC. BACKGROUND OF THE INVENTION Circuit elements are used in various product categories to test the memory crystal type and the operation and storage of each memory element to prove the use of the test, at 1 or 0) update so the method does not uniformly use the main instruction typical test compliance Manufacturers usually use the memory test to record the known test of the manufacturer. Parameter measurement, leakage current It is common to know whether the chip works mostly, such as memory crosstalk, but it is known that the memory chip is integrated in normal PC operation. For example, the specified components are in commercial memory chips. The chip type such as the on-chip practice test certification group, the voltage level test is used in its desired number (the battery is stuck in the chain), and the test system and the actual application are the special circuit element specifications. Before using the film, it is not only necessary, but also the parameter test battery to verify the parameters and take time.矣 And the function of the component is easy to fail detection. For example, it is easy to detect when the car body is faulty, etc. It will occur during storage or access. Prior to the sale or use, it is necessary to test the components strictly to determine whether the tested integrated circuit components are tested to determine whether Conformity also typically passes other exercises. The memory chip pattern test is an organized method to demonstrate its functions, such as power consumption and standby current, in an attempt to show the test under test. Although it is also said that the memory chip enters the fixed edge 1, >, the memory chip enters the hardware failure (parameter failure, 1W, failure) (for example, in the memory battery rod, there is a different degree of f failure. Behavior Failure

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Test > V. Description of Invention (2)

It is difficult to detect this kind of failure with the X 2 binary method, because the test adopted is not the behavior of the chip under its specified application. As a matter of fact, the memory chip of Messrs./Beijing Tablet has never operated the integrated circuit, especially the test system and integrated circuit memory components of the integrated circuit, in the actual application environment, which is well known in the previous case. For example, U.S. Patent No. 5,794,175 discloses a half-body device testing device that can test half-large arrays in parallel. Body S has recalled the wafer. Generate a test pattern, then write to the memory chip and read out the actual value of the data read from the memory chip, and compare it with the expected value to determine whether the memory chip is faulty. US Patent No. 5,95 9, 9 1 4 discloses a device containing a controller-type transferable test data to and from a memory element. The controller can generate data graphs and write to the memory elements, and can read data back from these memory elements. The data read back by some memory elements are compared with the data written in these memory elements, and the information about the discrepancy between the two sets of data can be saved or output. ‘And write’ instructions for what ’s different from beauty. »National Patent No. 4,965,799 discloses DRAM chip function and maximum operation test method and device. In this method, a data bit pattern is generated and stored in a memory battery of a memory element. Stored and subsequently read out the pattern comparison. If there is a choice between reading the pattern and generating the pattern, a suitable series of light emitting diodes (LEDs) can be used, for example, to provide a suitable US patent 4,379, 259 No. reveals many coincidence processes and systems of integrated circuit memory chips. More specifically, this patent is about a method

580578 V. Description of the invention (3) ----, install many individual memory chips on one of many memory boards, and then connect each board to the PC driver card. Pattern testing is performed on memory chips with chip specifications. # Although these integrated circuit technology test systems and methods can effectively detect many common problems caused by pattern testing and component specification tests, these conventional test systems and methods cannot effectively detect behavioral failures. The use environment is easy to distinguish from the actual application of a particular component when it is ultimately used. For example, the elements tested by plutonium may pass all known tests {under real-world "operating conditions (such as when Wiindows® is assembled) and may fail.

«One possible method for performing behavioral tests on, for example, a memory chip is to use the memory chip directly in the f (= PC) system. However, in the application system, the tested memory chip is directly added to conduct the behavior measurement in this way. There are four kinds of disadvantages. First, the memory chip under test generally needs to store the test cell, itself, or a part of it, which prevents the effective testing of the memory chip's memory space. Secondly, the failed memory chip under test caused the full response and failure to prevent further testing of the memory chip. When the next memory is tested, the system needs to be restarted. To test a large number of memory chips, this method is not efficient. Third, in this way, it is difficult for an application system to conduct behavior tests with the memory elements. Fourth, the sequence of operations performed on the execution of the test program "= and test memory chip, can not really represent ^ Μ ί the real world" operating conditions on the memory chip used by the PC JL ancient third fifth, in the application system Test the memory chip directly in the test mode, and change the key and standard memory parameters in the test mode operation (

D0UJ / 〇 V. Description of the invention (4) For example, equipment time, accounting So it is urgently necessary to have a broadcast: VOL, V0H, etc.). The practical application of the device in the final use ^ ^ method can be used to represent integrated circuit elements. In addition, there is an urgent need to test the internal integrated circuit elements with Γ and the elder brother. There are two kinds of components within the scope of component specifications: Method "can be used to test the ability of the integrated circuit element to operate under the conditions required by the application environment will introduce the system and methods, _ aw for example ° integrated circuit components The test system is the test) and the test; both of the conventional test methods (such as patterns can effectively test the component failure. System and method ^ 5 5 signal in the test system including memory chip integrated circuit components 2 ζ In the road test, 70 items are subject to behavioral tests. Among them, the application system sub-assembly i1 is used to test the component, or the same operation strip connected to the component under test; ΐ :; Among them, ^ 3 and s' The present invention provides a test method for integrated circuit components, which measures the signals from A to the components in the application system, and also transmits to the tested Yuanta =: 70 pieces of response to the signal, and then The response is compared. Zhilian = ί For a method of testing integrated circuit components, in which a signal from a first controller connected to a component under test is tested and transmitted to the response, and then Second control, The device measures the k of the two controllers and compares the responses. Among them, ΐ ΐ: also provides a test system and method for integrated circuit components, and 测 is measured as a conventional test and behavior test.

m I surface page 8 580578 V. Description of the invention (5) The present invention also provides a test system for integrated circuit components, including the tested components; operating elements in the application system and system wiring connecting the components to other components in the application system Internal operation; a set of test components connected to the component under test, this set of test components is used to guide the signal carried by the system wiring to the component under test; and a comparator is used to compare the component under test with the component response. The present invention also provides a test system for integrated circuit elements, which includes a tested element connected to a test controller; an operating element that operates in an application system connected to the system controller; and a system wiring that connects the system controller to an available Other components of the application system input by the system controller; test components suitable for directing a copy of the signal carried by the system wiring to the test controller; and comparators for comparing the response of the test controller and the system controller to the signal . BRIEF DESCRIPTION OF THE DRAWINGS To better understand the present invention and how to put it into practice, it will be described with reference to the accompanying drawings, in which: Figure 1 is a simplified diagram of a typical conventional test system for integrated circuit memory elements. Figure 2A is Figure 2B is a schematic diagram of some components of a memory application system; Figure 2B is a simplified diagram of the basic building of a behavior test system; Figure 2C is a simplified diagram of some components of a typical PC application system; Figure 3 is a simplified diagram of a preferred embodiment of the present invention; Figure 4A is a simplified diagram of another preferred embodiment of the present invention; Figure 4B is a simplified diagram of Figure 4A implemented using two circuit boards;

Page 9 580578 V. Description of the invention (6) Figure 5 is a simplified diagram of another preferred embodiment of the present invention; Figure 6 is a flowchart of the steps performed in the memory chip test method; Figures 7 A and 7B are Figure 8 is a flowchart of the steps of another specific example of the method for testing the behavior of a memory chip; Figure 8 is a memory bus tap configuration and device in various specific examples of the present invention; Figure 9 is a detailed summary of the present invention using parameter control elements Fig. 10 is a simplified diagram of a specific embodiment of the present invention in which a plurality of test elements are tested in parallel. Figs. 1 A, 1 1 B, 1 1 C, 1 1 D are application signals supplied to a test component and stored in Schematic diagram of a specific example of a variation of the system in the memory element of the present invention. Detailed Description of the Preferred Specific Examples For the sake of clarity, before describing the present invention in detail, reference is made to Figures 1 and 2A to illustrate a typical conventional memory element test system and application system. Referring to FIG. 1, a conventional test system for integrated circuit memory elements 10 is shown. The system 10 includes a test pattern generator 12 which can generate a test pattern for testing a test pattern used in a memory element under test 14 (hereinafter referred to as a DUT). The test pattern generator 12 may be connected to one or more drivers and / or logic elements 16 via, for example, address lines, data lines and / or control lines. The test pattern generator 12 provides an output to a group of one or more drivers and / or logic elements via a signal carried by a line connected to the test pattern generator 12 °. For example, the output of the test pattern generator 12 Corresponds to the following operations on DUT 1 4:

Page 10 580578 Memory address, memory address, memory address, memory address, device and / or logic are converted into logic elements that can be translated into DUTs and translated into relative elements to be fixed into address identities, also The available purpose is that the DUT 14 can be guided to the program plan with the generator 12, such as the number of signals, equipment time and / or logic test. Figure 5. Description of the invention (7) Sample test calculation: (1) From the initial to the Finally (2) from the first to the last (3) from the first to the last (4) from the first to the last one or more outputs, signals provided by this set of one or more drive generators 12. For example, the first linear memory address number is needed, such as the address identification number. It also needs the second logic and line identification numbers to be presented.) A series of address lines of format 1 4 carry information of 12 of the first and second logic elements, which can be translated into the output of dedicated logic elements, and the equivalent Test pattern to DUT 14. The driver can change specific operating parameters (, fall time, occupation time in a short time). The format issued by this group of driver test pattern generator 12 is applied to DUT 14. The response test pattern occurs write 0 read 0, write 1 read 1, write 0, read 0, edit the component 16, and make the DUT 14 compatible with the test pattern one of the test pattern generators 1 2 provide the group, column, and row addressing parameters of the grid address series with the same 14 addressing method ( For example, the group and column numbers can be understood by connecting to DUT DUT 14. Basically, a series of commands learned from the test pattern generator. This provides a command signal to the driver of the DUT 14 interface, and guides the signal to the DUT. 14, the same value, V0L, V0H, rise time, etc.) The function of element 16 lies in the shape, with the "read" command that can occur with DUT 14-phase container 12 from

HI II

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5. Description of the invention (8) ___ MT 14 reads the data and then outputs it to the data receiver 18. Compared with the attempted type generator to provide the expected information to be read, the toilet device compares the data read from the DUT 1 4 in the measuring machine 18 to the stored data. 〇 It can be programmed to adapt to the test pattern generator 12's instructions, and it can be programmed and driven ^ or the Chinese instrumentation element 16, DUT 14, and data receiver 18 to make two comparisons: 15 and / or logical delay. In addition, test the pattern generator 12 and the delay caused by other electronic components to ensure that the pattern occurs 3! 12 ^ a a can be inserted The data stored in the receiver 18 is synchronized in the comparison. & The connection between the data and the data = ^ The data of the test pattern generator 12 and the data receiver 18 are compared by the = = result blue output! j output module 21. I out of the module 21 and second. Guide to the error s already loaded unit 22, any errors found 圮 2 "two i U out module 2 1 can also guide the comparison results to the display and send ii information to the visual display, or through a set of poles :), —or other output components. If the data receiver is false: the expected data indicated by the test pattern generator 12 is not equivalent, that is: at: fA see Figure 2A, which shows some components of a typical memory application system 25, In FIG. 2A, a typical memory application system 25 includes application system components including a memory controller, and uses a bus A28, a bus B29, and a bus generation device. • Connected to the target memory element 27 (ie, system memory). Bus A28 Signal bus ("or more parallel lines") is used to transmit the signal from the application system component 26 of the Baoyuan strain & second controller to the target memory bus B29 represents a two-way signal bus (one or more parallel

Page 12 580578 V. Description of the invention (9) line) is used to transmit the signal from the application system component 26 including the memory controller to the target memory element 27 and the signal from the target memory element 27. Transfer to application system components 2 6 containing memory controller. The bus C30 represents a unidirectional signal bus (one or more parallel lines) for transmitting signals from the target memory element 27 to the application system component 26 including the memory controller. During the normal operation of the typical memory application system 25, the signals from the application system component 26 including the memory controller are transmitted to the target memory using the bus A2 8 and the bus B2 9 (for example, when the memory element writes data). Element 27, and the signal from the target memory element 27 is transmitted to the application system component 26 including the memory controller using bus B29 and bus C30 (for example, when reading data from the memory element). Within the scope of the description and patent application, an application refers to a system, product, device, or component that can use the component under test. If the component being tested is a memory chip, the application refers to a computer, appliance, PC video card, digital TV, MP3 projector, camera, recorder, subassembly, server, network equipment, cell phone, information appliance, or use Any other electronic product of a memory chip. The application system is hardware and software including the application, which can be "off-shelf" or customized designs. The component may be a single integrated circuit chip, or, for example, a set of integrated circuits on an assembly or a printed circuit board. In addition, the components may be a bare silicon die, a component die, a packaged integrated circuit, a stacked integrated circuit, or, for example, any of their components connected together. The present invention requires a behavior test on the integrated circuit element under test, which may be, for example, a memory element in a memory application system. In general, when a behavior test is applied to a component under test, the component under test interacts through the same system.

Page 13 孓, | Ming said ^ 7 —___ The test component for the party is finally required. For example, you can try to measure the behavior, and it will be exposed when used in% territory. Special faults occur only in special cases of detection applications. Application characteristics (such as systems, products, equipment or / and certain conditions related to the application environment, such as temperature, Tan degrees = elements that affect the electrical operation of the application, the ground, the foundation: ,, "丄 ;; Li: When working with strength, electromagnetic interference, and crosstalk, when no # expected application function) f Special hardware or software applications to operate the component only in the specified software process: Ann; p special failures. For example, software (such as special brands的 视频 # = 疋 = The peripheral hardware system failure of the card can be classified as an application-specific failure. Only application failures such as pcs are caused. Each application 糸 f 仃 is a test to detect access behavior): The access component of the method itself (such as the memory chip's fetch sequence. If the component cannot be unique here = if it works, then it is classified as an access behavior failure. Therefore " and 3 conventional tests' a will suffer from access behavior failure . For example, the failure occurs only when the same memory address is stored, and it is classified as access j 2 reference map, which represents the basic form of the behavior test system of the present invention. Tap 31 is used in the bus 28, 29, and 30 of the digraph bus. Put signals on buses 28, 29, 30 This further directed to many test assembly 32. Test assembly 32 is connected via bus 35, 36, This set of connection busbars 34, 35, a transmission 33 under test with data communication to and from the test =

Page 14 580578 The target record 33 crosses the bit 37, the comparison result of the piece 33 is the same. The error record has been tested. The function is the same as that of the flow 28, 29, and 30 for transmitting data to and from Muzen. The π buses 3 4 and 3 5 guide the target memory element 2 7 to the receiving buses 2 8 and 2 9 to the test element 33. When the standard memory element 27 is marked, the data will also be written to 27. Upon receiving the reading instruction, the target memory element 27 will be the streamline 3 0 and / or 2 9 ', and the output of the asset to the memory copy can be guided through the tap. The test component 33 receives the same reading 3 2 as the target memory element 27 to provide the test component 33 and the signals provided to it). Therefore, the test component 33 also uses the bus 36 and / of the test component 32 Or 35, and the invention description ^ glycosides 33, the signal copy used by the test component 3 2 with the sink memory element 27, respectively, the data is written across the sink to the subject test element 33. When the target memory element uses the transmitted signal to cross the sink controller. The 32 of these outputs is ordered only because the tested component (because the target memory component 27 of the test component also transmits signals across the output signal. The test component 3 2 receives the output, and the tested component 32 includes an error log. Memory element 2 7 is compared with the tested element gate), and the ratio 3 3 is the same as the target memory element 2 7. If the outputs are different, the memory element 27 is preferably the output of the memory element 27 which has passed the bus elements 29 and 30 in the test element 3 3. The test group has, for example, logic elements, and turns the target out (for example, using a series of mutual exclusion or rotation out. Therefore, if the tested component is operated in a typed manner, the output of each component should be able to detect errors. For the "good" chip in this application, the target memory element 27 is compared.

580578 V. Description of the invention (12) In this way, the target memory element 27 can be used as a reference element. The test component 32 also includes connectors, transceivers, and other logic components and / or electronic components (such as a command decoder, a bidirectional input buffer, to temporarily lock the bidirectional bus, and to give the command decoder time to determine the bus Signal direction, and redirect the signal to the tested component or error recording unit), which is convenient for redirecting the signal from the target memory element 2 7 to the application system 2 5 bus 2, 8 9, 2 and 30. Lead to the component under test 3 3, read the output signals from the target memory component 27 and the component under test 3 3, and compare these signals. Refer to Figure 2C, which shows a typical system building of a personal computer (PC). This is an example of a memory application system that can test memory components. It is assumed that the test memory original can actually operate the system type.

The memory application system 38 in this typical form includes a processor chip 40, and is connected to a memory controller / graph controller socket 42 (hereinafter referred to as a "system memory controller") using a system bus 44. The system memory controller 42 includes one or more controller chips, and controls various connection elements through a memory bus 48, including a system memory 46. The memory bus 4 8 typically includes multiple sets of parallel lines, some with only the signals transmitted to the system memory 46 (as in the bus A2 8 in Figures 2A and 2B), and some with only the signals transmitted from the system memory 46 (As in bus C30 in Figures 2A and 2B), and some with signals that can be transmitted in both directions (as in bus B 2 9 in Figures 2 A and 2 B). The memory application system 38 may also include a controller chip, which controls one or more video controllers or components 50 via one or more video component wiring 5 2 a, 52b (for example, using an AGP bus to connect to a memory controller / graphic controller AGP chart control of socket 42

Page 16 580578 V. Description of the invention (13)) Video component wiring can be unidirectional (such as video component wiring 52a) or bidirectional (such as video component wiring 52b). The port system memory controller 42 also uses a socket interface 56 to connect to the I / O controller socket 54. I / O controller socket 54 includes one or more controller chip ports through or above! The / 0 connection 60 communicates with one or more peripheral component controllers or peripheral components 58. The I / O connection 60 may be unidirectional or bidirectional. Video hardware connections 52a, 52b and I / 0 connections 60 each include a single line, a parallel line (such as a bus), or can be connected to the controller bus 42, port 50, 58 wireless communication Of known electronic components. The system memory controller 42 and the I / O controller socket 54 are sold as a package 62 (eg, Intel® 81 5 chipset). … Figures 3 to 5 show some preferred specific examples of the behavior test system of the present invention. _: Used to test the same type of memory used as the system memory 46 in a practical operating PC: cattle. As noted above, PC is a memory application system 38: to which the present invention is applicable. The tested memory element should be exposed to the interaction between the system memory 46 and other components of the memory application system 38 in the least obstructive manner (for example, the memory element not tested by the text directly replaces the system memory 46). The memory element can be operated very close to the end-use environment (ie using the class «= application system). This point can be added to the application system combination test = piece / specific and t 'combination of hardware components, circuits and software), to obtain the behavior test system. The behavior test system may include hardware (equipment, 々, 丨 u2, circuit, etc.) ... ’and is designed to analyze—or: = = =. Behavioral test systems should be designed & even if there is no test in the behavioral test system

Page 17 580578

However, it is fully functional, so the application system or test results are affected. For example, the behavioral test system used for the memory module must be installed and operated by a PC, and because of the defect, 'the defective component to be tested is best not to be made by the behavioral test system. The application system is still not functional. The PC (or motherboard) itself cannot function because of the quality of the component under test, because the module under test will cause the PC to malfunction. In addition, the behavior test system fails; instead, the cause of the failure is shown.

Reference is made to Fig. 3, which represents a preferred specific example of a behavioral test system, which illustrates the basic implementation of the present invention, and is generally represented by 118. The behavior test system ii8 is constructed on the memory application system 38 (for example, in Fig.%) To provide a signal copy from the connection in the memory application system 38 to the test component 119 of the behavior test system 118. The test component 119 can be pre-assembled into a single added test element 'and connected to the memory application system 38.

In the specific example of the present invention, the memory bus 46 connecting the system memory controller 42 and the system memory 46 is directly tapped. The connection 12 is connected to the memory bus 48 at i2i. The connection is connected! 20 The number of best lines is the same as the number of active lines including the memory bus 48 (that is, the number of memory buses that the system memory 46 does not or does not affect the operation of the system memory 46, but can be ignored), so basically 'memory The signals carried by the bus bar 48 will not be duplicated on the drop connection 丨 2. The drop connection 120 is also connected to one or more transceivers 122. A transceiver that is compatible with the signal level of the signal carried by the tapped memory bus 48, strengthens the signals carried by the tap connection 1 2 0, and transmits these signals to the control via the intermediate connection 124 Logic element 123. The transceiver 122 preferably has a high input impedance 'to minimize the degradation of the signals carried by the memory bus 48. Receive

Page 18 58〇578 V. Description of the invention (15) It is advisable that the engine 1 2 2 be unidirectional to prevent signals from the test components 丨 9 from interfering with the communication between the components of the memory application system 38. When the system memory controller 42 attempts to write data into the system memory 46 and control the logic element 1 2 3, the memory bus corresponding to the writing operation ^ 8 copy of the τ signal is guided to the drive 2 4 The memory element (DUT) that caused the same data to be written to a wide range of tests 1 2 5. Similarly, when the system memory controller 42 attempts to read data from the system memory 46, the signal corresponding to the reading operation is guided to the DUT 125 via the driver 124. Then, it reads DUT from DUT 125, and outputs it to data receiver 136. The data read from the memory bus 48 and read by the unified memory 46 are also directed to the control logic element 123, and the comparator 138 'connecting the control logic element 123 and the data receiver 136 to test the two memories Are there any differences between the two sets of data read between the components (ie, the system memory 46 and the DUT 125). The data / memory 46 functions as a reference element because it is used to provide predictions and results, compared to the data or results obtained by DUT 125. Γ25 isotype 4? Good ... excellent ", a fully qualified component, and functionally equivalent to DUT 125. The comparison result measured by the input and output unit U8 can be output to the microcontroller 139, and connected to the memory application system 38 by connecting 14 °, or to another processor, the master < column such as the error recording unit, and the separate Application system, micro-Huka test device, a group of light-emitting diodes (LEDs), one or more errors "D (such as visual indicators, auditory indicators, basin-cylinder), etc. Connected to this One or more electronic components. (1, and.)), Or refer to FIG. 4A, and summarize the behavior test system of the present invention with 168.

Page 19 580578 V. Description of the invention (16) Another preferred specific example. Constructed on the behavior measurement application system 38, based on the first one or two: built in the existing memory / s1 ^ Α Α 1 to connect one or more application systems (such as 44, 52b, 56) with one or more signals A copy is provided to the test component 169 of the following system 168. The test component 169 can be pre-assembled σ; the signal to be connected to the §Jiyi application system 38 is added to the test element. As previously mentioned, the connection of each system in the memory application system 38 can be unidirectional or bidirectional, and each system is connected. It can include single wire, a group of parallel wires, and electronic components for wireless communication between connected components.

More specifically, the 'behavior test system' is composed of a signal copy recovery mechanism provided by the system bus 44 first. This can be done by tapping the system bus 44, for example connecting a series of lines at 170, including the tap line 172. The actual number of lines in the first tap connection 1 72 is the same as the actual number of lines in the system bus 44 (unused lines can be omitted), so basically, the signals carried by the system bus 44 will be in the first minute Copy on line ι72. The first drop connection 172 is also connected to one or more transceivers 174. The transceiver 174 preferably has a high input impedance to minimize degradation of signals carried by the system bus 44. Similarly, the _ connection to the video component connection 52b (for example, AGP bus) can be connected to the second drop connection 178 at 176, including the same number of active lines as the video component connection 5 2 b ( Unused lines can be ignored), so basically-the signal carried by the video component connection 52b is duplicated on the second tap connection 178. The second drop connection 178 is also connected to one or more transceivers 174. Similarly, at 180, the third tap connection 1 8 2 is connected to the socket interface bus 56, and the signal carried by the socket interface bus 56 is connected to the third tap

Page 20 580578 V. Description of Invention (17) 182. The third tapping line 182 is also connected to one or more transceivers. 174 ° The transceivers 174 are preferably unidirectional to prevent signals from the test components 1 6 9 from interfering with the communication between the components of the memory application system 38. The transceiver 1 7 4 also strengthens the signals being transmitted to other test components 1 6 9. Basically, the structure of the behavior test system of this specific example of the present invention is to connect a series of tap connections to various connections of the memory application system 38, especially to connect any of the tap connections to the memory application system. Connect to provide the input or output of the system memory controller 42 connected to the system memory 46 (except for the memory bus 48, and if necessary, the selected unidirectional line / only with the output of the system memory controller 42 and no required Connection). Although FIG. 4A shows only two tap connections, the number of tap connections may vary depending on the actual number of components connected to the system memory controller 42. By establishing tap connections 172, 178, 182, the inputs and outputs of the system memory controller 42 can now be copied and then redirected. The signals carried by the tap lines 172, 178, 182 are directed through the transceiver 174. Transceiver 17 4 & is compatible with the logic level of the signal carried by the tapped buses 44, 52b, 56 (for example, the logic used in the system bus 44 may be GTL +, video hardware, and the logic used in the line 52b may be PCi, socket interface bus 56 =, series can be LVTTL), strengthen the letter carried by the tap lines 172, 178, 182 = 'and pass these signals through the intermediate lines 183, 184, 185 (with Copies of the signals carried for the connections 172, 178, 182) are then transmitted to the logic element 190. Logic Element 1 90 Available Field Programmable Gate Array (EpGA), discrete logic element

ΙΗ Page 21 580578 V. Description of the invention (18), specific function integrated circuit (ASIC), or any program electronic component implementation, has been known. The logic element 190 checks the inputs of the intermediate wirings 183, 184, and 185, and determines whether the signal on any of the intermediate wirings 183, 184, and 185 indicates that a command or data is being transmitted to the system memory controller 42. If so, the logic element 190 transmits the signal copies on the intermediate wires 183, 184, and 185 to the test controller 192 via the test controller wires 194, 196, and 198, respectively. The function of the test controller 1 9 2 is preferably equal to the system memory controller 42 and the components of the system memory controller 42 of the memory application system 38 are exactly the same type (ie, have the same article number and data code). Therefore, the test controller 192 behaves exactly the same as the system memory controller 42 of the memory application system 38. The system memory controller 42 and the test controller 192 are preferably "good" fully qualified components. Therefore, the test controller 19 2 can logically agree with the signals transmitted to the system memory controller 42 in the memory application system 38 through the test control wires 19 4, 19 6, and 1 98. The test controller 192 communicates with the test memory element (DUT) 200 via the DUT connection 202. Therefore, the DUT200 can receive the commands from the test controller 192 via the DUT connection 202, in the same way as the system memory 46 of the memory application system 38 receives the commands from the system memory controller 42 via the memory bus 48. The combination of the unidirectional transceiver 174 and the logic element 190 can effectively isolate the test controller 192 and the DUT 200 from the memory application system 38. As described above, the input of the system memory controller 42 can be effectively guided to the test controller 192. Therefore, in the memory "writing" cycle, the data is

Page 22 580578 V. Description of the invention (19) It is written to DUT 2 00 in the same way as it is written to system memory 46. During the memory “reading” cycle, if the DUT 200 has been performed in the same way as the system memory 46, the data read from DUT 200 should be the same as the data read from system memory 46. In other words, if the system memory controller 4 2 and the test controller 19 2 have the same function and are of the same type, the output of the system memory controller 4 2 (on the wiring other than the memory bus 48) should be the same as the test control. The output of the device 丨 9 2 (on the corresponding wiring of DUT wiring more than 202) is the same. Since the output signals of the wirings 44, 52b, and 56 of the memory application system 38 are also copied to the tapping «wirings 172 (and 183), 178 (and 184), 182 (and 185), the logic element 190 can The output of the system memory controller 4 2 (on the wiring 1 8 3, 1 8 4, 1 8 5) is compared with the output of the test controller 192 (on the corresponding wiring 194, 196, ι 98) ^. The logic element i 90 can only output the data line connected to the system memory controller 42 and compare the corresponding output with the data line connected to the test controller i 92. The logic element can be used to compare the comparison result with any other output, such as the system memory 4 which is guided to the microcontroller as the reference element through the microcontroller connection 2 06. It is also best to know the "good DUT" After completion, the grid element is either the same type as 2000, or it is functionally equal. The controller 204 provides the comparison result to the memory application system 38, and connects I08 to the input peripheral element 58, or another output element. 1, 1, 5 units, a separate application system, a display, a group of LEDs, or an error indicator (such as visual indicators, auditory indicators, group e), or connected to one or more of these components Electronic components. / ,,,,

580578 V. Description of the invention (20) The logic element 190 can also be programmed by volume + strokes such as y ^ L ^ to switch from the above behavior test mode to different test modes.你 丨 1 # Called the township Eight For example, other test modes can include the name of the conventional test on DUT 200 楹 々 β ^ @ \ 在

Test 0 logic element 190 itself can be used on the 4th and 4th days. The program plans to generate test patterns and switch between graph test and behavior test mode. _ T ^ ^ ^ ^ ^ ^ The test controller 1 92 responds to the test pattern input or the application system turns on m & Ying, corpse ^ received # said to compare the weight, I will pull the transceiver 174 to receive the bass, if necessary, the microcontroller 204 can be used to control the test of the left stab selection logic element 190. In addition, the function of the micro controller 2 0 for measuring the skirt 4 M 丄 recognition and fruit mode _% na 忒 mode can be switched manually, such as by manual control, or by using memory application q β 士 红, x, The control unit 384 uses the system 38 to control itself through the output element 58 connected to the micro-batcher 204. The test component 169 in the manufacturing behavior test system 168 includes a transceiver 17, a logic element 190, a controller chip 192, a DUT 2000, a microcontroller, and most of the wiring connecting these components, which can be installed on a test board on. 4 As previously indicated, the test component 119 may be pre-assembled to add a test component to the memory application system 38. You can then connect to the memory application as described above. In addition, the specific examples briefly shown in the above and FIG. 4 of the present invention can be implemented with two prefabricated circuit boards as shown in FIG. 4B. If a second operating application system 38 with a similar component is available, the second application system can be converted into a second test component, that is, the system memory of the second application system is replaced by the DUT 200. Wiring, connect the system memory controller from the second application system to the logic element (and provide a transceiver or other electrical components as needed), and cut off the second application system (now effective as the system memory controller for the test controller f) 'With all other components of the second application system " ^ of

580578 V. Description of the invention (21) Wiring, except for the wiring from the system memory controller to the DUT 200. The logic element 190 is connected to the transceiver 174, and the microcontroller 204, as shown in Fig. 4A. The system memory controller 42 of the second application system basically functions as the test controller 192 in Fig. 4A. The behavior test system shown in Figure 4B. Other implementations of the general behavior test system are easier than Figure 4A because the test controller and memory component mount are already mounted on the board. Referring to FIG. 5, another specific example of the present invention is generally shown at 218. This is specifically expanded by the present invention with reference to the above-mentioned specific example in FIG. 3, wherein the behavior test system 11 in FIG. 3 has been modified to not only allow dut 1 2 5 to perform behavior testing, but also DUT 1 2 5 can also be patterned. test. In Figure 5, the test component 119 can now also include an input selector 22o, which receives input from the memory application system 38 via the wiring 124. The test pattern generator 2 2 2 is also connected to the input selector 220. The microcontroller 139 can be used to guide the input selector 22 and switch between the pattern test mode and the behavior test mode. Specifically, the input selector 22 can provide tests for the DUT 125 through the control logic and the driver element 224, respectively. [Type 'or input from memory application system 38. In this regard, the microcontroller 1 39 may be controlled by a person, for example, Cennan, Tian Qiye, and M < on Lee ^ t A utilizes the memory application system 38 itself through a wheel connected to the microcontroller 139. ^ Several pieces 58 to control. In both cases: the specific length puller 138 connected to the input selector 220 can compare the output of μτ 12 receiver 136) with the expected data value set provided by the input selector 22〇. Anyone who is proficient in this way can obviously see, ^ qQ .r L t ^ J know that the behavior test system of various specific examples of the present invention must be designed with the knife # & f Mobe and 仃 as various components of the test system Between

580578 V. Description of the invention (22) Propagation delay 'to ensure proper comparison between the signal groups to be compared. This is typically necessary if all components of the behavioral test system are synchronized to a clock signal. Referring to FIG. 6 ', which shows a memory element test method step according to a preferred embodiment of the present invention. The method starts at step 250. The test method of #, 5 Jiyi component goes to step 2 5 2 and select the test mode here. In the specific example of the present invention shown in Fig. 6, only the pattern test mode or the behavior test mode can be selected, and only one mode can be selected at a specified time. However, the technical experts clearly know that in other specific examples of the present invention, other test modes can be added to the method, including modes for performing other conventional tests. In step 254, if a pattern test mode is selected (for example, using a microcontroller chart), 139 (figure 5)), the flow of the method steps proceeds to step 255, where a pattern test is performed on the memory device under test (DUT). . 2 = The test can continue for a specific period until all occurrences of the test pattern: Real: Over: or until all pre-selected test patterns have been implemented. When the process proceeds to step 257, the test of the memory element is performed. Method / step / claw If the pattern test mode is not selected in step 254, the controller determines whether the behavior test mode has been selected. # 步骤 258 进 灯 The process proceeds to step 260, where the behavior test is performed,% ^, method step The system's input is applied to the DUT. After the behavior test is completed, which is derived from the application constraints, the human control is ended, or a pre-specified event occurs (such as in a specific period), method step 580578 V. Description of the invention (23) The process proceeds to steps 2 5 6 above. Figures 々A and 7B represent two alternatives to the behavior test method. The behavior test is performed at the DUT. The behavior test can be performed at step 2 60 in Figure 6. Referring first to Figure 7A, the behavior test method can be performed with a behavior test system in a building with a behavior test system similar to Figure 4A, starting at step 3 0 0a. At step 3 10a, a copy of all the signals to be transmitted to the system memory controller connected to the system memory (the signal transmitted to the system memory controller on the memory bus is best excluded), after one or more test components Navigate to the test controller connected to the DUT.

In step 320a, the system memory controller is used to send the signal output from the system memory controller, excluding the input) 'and the signal transmitted by the test controller (preferably from ^ does not include the output to the DUT), using logic elements for comparison At step 330a, the comparison result is output, for example, directly to one or more other output elements or electronic groups. At step 340a, if the behavior test is instructed to proceed to step 350a, which indicates the end of the method, proceed to step 310a, and repeat here. Method steps. 7B, the behavior tester 300b of the present invention starts. This behavioral test is performed in a behavioral test system having a building similar to the behavioral test system 218 (118) of FIG. The image is sent to the test control number (preferably the system memory output, to the microcontroller, or the device. ’Method’ method step flow step flow a specific method specific behavior test in the step example, you can test the system

580578 V. Description of the invention (24) ---- At step 310b, deduction 1 passes one or more test copies and all signal copies of the memory, in step brain: 2nd guide: to the test memory Element ⑽ ". _Compare the read data with the copy of the read data, compared with the copy from step 310b, after step 320b, from the system continuation: =: 圮 圮 memory and DUT multiple times, then ^ ^ 〇〇nh f 圮 memory or ㈣T reading materials. 330a In steps, compare the structure, such as the step in the cardiogram in step 340b, suffering as much as a pound & go to step 350b, Table ^ 2 test 1 should end. The method steps and procedures are repeated until f> Step 3 of the method is not performed. [The method steps and procedures are performed in the application system, and the actual sequence is # ^ \ sequence, as in the system memory in Figure 3 or 5 No.1, No.3 and No.5 of the DUT 125 receiving system is easier to construct, but it must be noted that the type of controller is irrelevant. Because the second view of 4 is: the control operation to the system memory is not good (due to the control chip Out ^ ς = set ^ controller is different and cooperate with it) 'Guided to = Yi Yuan: the input team resists memory It is not exactly the same ^], because J3 has two and 5: sex-will be with the system in the launch. For example, the controller and the connection 2m and 5m connected to the controller 44- 2- ^ impedance difference between the hidden parts If the test controller 192 behavior is essentially the same as the system memory voltage control number; with: the required electricity ... and ... -.r, DUT., 4A w

580578 V. Description of the invention (25) The controller 4 2 is the same, which is about the same as the test controller 192 and the system memory controller 42 and the same type (for example, they have the same article number and data code). The above, for example, some components of a system containing test generators, data receivers, and comparators, can be executed using a microprocessor programmed to perform the required functions, or in addition to the combinations described above, or using any suitable implementation known Connected to the logic circuit of the memory element and executed on the chip by a state machine. It is obvious to any technical expert that the tested memory element may be composed of a single memory chip or a plurality of memory chips or a memory module.

In the modified example of the present invention, the comparison result between the expected data and the data obtained from the component under test (as performed in step 320a of FIG. 7A and step 320b of FIG. 7B) can also be recorded in the error recording unit. In the modified embodiment of the present invention, one or more system memory modules can be installed on the board by tapping the memory bus of Fig. 3 or Fig. 5 directly to the memory bus. Also installed on this board are the data lines connected to the controller's driver, address, and memory bus, driving the ## on these lines, and through a cable (such as an LVDS cable) to a series of transceivers and / or drives To direct the signal to the test component. The tap memory bus is one of such flexible configurations and devices, as shown in Figure 8. (In the specific examples of the present invention, the sex, accuracy, and scope can be compared with the various parameters to provide various operating parameters. In the specific example, the parameter test is performed, and the next test is included in these examples.

The test performed on the component under test can be further improved by the selected test component and the means of the test component. Testing can therefore be performed at the extremes of the range of different operating parameters. Can be used

580578 V. Description of the Invention (26) The behavior test system allows parameter testing in separate test modes. For example, referring to FIG. 9, a parameter control element 400 has been added to the behavior test system of FIG. The parameter control element 400 is connected to the DUT 125 to change a number of operating parameters' including, for example, VDD, V_, VTT, VREF. The parameter control element 400 is also connected to the driver 224 connected to the DUT 125 to change many operating parameters including, for example, ready / occupancy time, driver strength, skew rate, "number rise / fall time, VQL, VQH. The parameter control element can also be Connected to the data receiver 1 36 to change many operating parameters, including, for example, reading strobe timing, V1H, V1L. Faced with the test component in a real application system-cause the loop β 'to change the operating parameters to achieve delay In the modified embodiment of the present invention, various electrical operating conditions (such as warm sound and sound testing system to improve the test applied to the component under test) can be provided. t, the accuracy and scope of the behavioral test. The tests performed in the surrounding area, including the extreme progress of the range = f can be called the environmental test. π y test. Technical experts know this test The functions of other components do not need to use the special components specified in the manual ~ rfr? ≫ ΤΊ% special components. Second, technical experts can easily understand the components The electronic components are carried out without being subjected to the single-electronic component ownership. Also, for example a, it is obvious to the technical experts that the functions of the components in the instruction manual can be combined so as to borrow less (At least one) electron, 卞 进 卞.

Page 30 In the variation of the present invention, there are several groups of behavior test systems 580578 V. Description of the invention (27) In the present invention, the brain can also be changed, for example, video TV, MP3 projectors, microprocessors as the basic electronic components, systems Or refer to FIG. 10, where more than one test component is used in one or more multi-transceiver components. The special test of the integrated circuit elements which have been modified from the production line and which are directly eliminated from the production line does not conform to the strict general requirements and less severe requirements, and is implemented in more specific operating parameters. This can pass the behavior test, and is particularly applicable to a method and The system is used to ensure that the present invention is limited to special applications such as testing memory applications (DRAM, ED0RAM, etc.), and special-function integrated circuits in specific examples. 'Memory application systems are not limited to personal video game instruments, recorders, network servers, digital cameras , Cell phones, anything that uses memory elements' or virtually any box that uses memory elements. Shows that the system in the specific embodiment of the present invention has a tap signal that can be supplied from the application system, and can be tested in parallel by means of machines and / or logic elements. In specific examples, the tested component is the original one that has not been tested and removed. It has been classified by the manufacturer as Bad or Amoy. Although 7G parts may be phased out by manufacturers from the outset, such components are still suitable for the required component specifications and special applications. Therefore, when the test component is implemented to a range suitable for the intended use of the component, various tests such as those that were originally defective or obsolete can be changed and found to be suitable for a particular application. Therefore, the behavior test can be used to classify the good or eliminated components, and the present invention, as mentioned, can also be used to test the original bad or eliminated components, which have normal functions. In a specific example, the system and method described in the a month book are not memory elements in the system (such as SDRAM, SRAM, but the present invention can also be used to test processor IC (AS IC) chips, data communication components, components) ,

Page 31 580578 V. Inventory box, or any electronic component of the general component of the invention, to determine another application system, use the signal signal with test points or more and have the emission signal for this application. Constructed for the test. Generators, components or components can be modified and tested without the need to invent taps (28) for virtually any type of integrated circuit element in a system. In this application, the electronic components of the system are positioned and operated in a system similar to the one under test. The tap wires carry signals to the system, guide those signal copies to the tested components, and direct the signals emitted by the system to the receiver. The signal emitted by the test element is compared to whether the test element is operating properly. In the application of the present invention, the system controller, or one or more other electronic components connected to the system, is positioned to transmit to and from the system controller or one or more electronic components, and those signal copies are guided to Test controller, or one or more test components connected to it (where the test controller or a test component has the same function as the system controller or one or more electronic groups, the system controller or one or more electronic components are numbered Compared with the test controller or one or more test component emissions, to determine whether the performance of the tested component is as expected. In a specific embodiment of the invention, the behavior test system of the present invention can first test the test component and perform the conventional test only. The system is changed. For example, the test pattern of the previous case conventional test system shown in FIG. 1 can be changed to one or more pieces that can provide input from the application system to form the behavior test system of the present invention. The behavior testing system and method of the present invention enable the tested component to be tested with signals derived from the actual application system. Be in operation by the test element being tested. For example, a suitable system according to the replica and the signal wiring on the wiring guide to a subject

Page 32 580578 V. Description of the invention (29) --- The test element (or controller, or other components connected to the test component) is more or less applied to the test component (or controller, or connected to the test component) The signals on the system wiring in the application system of the test component) can be changed to ff in the memory or storage component. Basically, the test signal generated by the application system is captured or recorded in the memory or storage element for subsequent use. The stored test signal is then applied to the component under test using, for example, a drive or logic element. As a result, in these modified embodiments of the present invention, the application system may not be part of the behavior test system when the tested component is being tested. However, the device under test is still behaviorally tested, as signals from the actual application system are still used to test the device under test, thus exposing the device under test to the operating conditions required to represent the device when it is ultimately used in the intended application environment. Specific modifications of the behavior test system designed in accordance with the present invention are shown in Figures 1 A, 11β, 11C, and 11D, which are modifications of Figures 3, 4A, 5, and 9, respectively. In these variant embodiments of the present invention, the signal generated by the application system is received from the memory element 41 by the test component instead of the connected application system. However, the memory element 4 1 0 still provides test signals 1 1 9 (Fig. 1 A, 1 1 B, 1 1 D), 169 (Fig. 11B), and provides signals generated from the actual application system. Test element 125 (pictures 11A, 11C, 11D) or test controller 1 9 2 (picture 1 1 β), and compare with the test element! Compare the output of 2 5 or test controller 192. The microcontroller 139 (Figure 11A, 11C, 11D), 204 (Figure 11B) can receive input or provide output to other components via the I / O connection 411. In a modified embodiment of the present invention, the test signal 'representing the actual signal in the application system can be patterned or simulated using an analog component, and then stored in a memory or a storage component. Stored test signals can be used, for example, with a drive «

Page 33 580578 V. Description of invention (30) or logic element, applied to the component under test. It is obvious to the technical experts that other modifications and adoptions of the system and method described in this case may not violate the present invention, and the scope is as defined by the scope of the patent application. 0 1 ^ · Page 34 580578 Schematic description The first figure is a product A schematic diagram of a typical conventional test system for circuit memory components. Figure 2A is a simplified diagram of some components of a memory application system; Figure 2B is a simplified diagram of the basic building of a behavioral test system; Figure 2C is a diagram of some components of a typical PC application system Schematic diagram; Fig. 3 is a diagram of a preferred embodiment of the present invention; Fig. 4A is a diagram of another preferred embodiment of the present invention; Fig. 4B is a diagram of the implementation of two circuit boards in Fig. 4A; Figure 5 is a simplified diagram of another preferred embodiment of the present invention;-Figure 6 is a flowchart of the steps performed in the memory chip test method; Figures 7A and 7B are another specific method in the memory chip test method The flowchart of the steps of the example; Figure 8 is the memory bus tap configuration and device in various specific examples of the present invention; Figure 9 is a specific simplified diagram of the present invention using parameter control elements; Figure 10 is a plurality of tested elements Parallel testing Specific diagram of the variation of; The first 1 1 A, 1 1 B, 1 1 C, 1 1 D picture shows the test signal supplied to the application component of the system changes stored in the memory element embodiment of the invention is particularly schematic.

Page 35

Claims (1)

580578 VI. Scope of patent application1. A component under test (a) should be applied (b) sub-line (c) test (d) number plus (e) means 2. if at least 3 is received Machine, put the right, and put the other 4. such as the subject of the test component 5 · the implementation of the conventional test 6 · the implementation of the conventional test test electronic component behavior testing system, electronic component system, the system includes: using the system The test signal is generated in it. The test signal is applied to both the reference component and the component under test in the system. The reference component and the component under test are of the same type or function. The connection is connected to the system wiring in the application system. The system is connected to the reference element; the test element is connected to the tap wire to apply a test signal to the test element; compared to the element, the letter that responds to the test signal from the reference element and the response test signal from the receiving element The signal received by the test element is compared to the display; the indicator is used to indicate the comparison result. Please refer to the system of item 1 of the patent scope, in which the test component is outsourced to the tap-changer and other test components. Please use the system of item 2 of the patent, wherein the effect of using at least one receiver to carry the integrity of the signal is minimized. The test component and the component under test are isolated from the application system. Please refer to the system of item 1 of the patent scope, in which the system includes components for performing conventional tests. Please refer to the system of item 4 of the patent, in which the component to be tested for the component to be tested is the component where the test pattern occurs. Please refer to the system under item 4 of the patent, in which the component to be tested for the component under test is a parameter control component. Page 36 580578 6. Scope of Patent Application 7. —A behavior test system for testing electronic components. Electronic components are tested components. The system includes: (a) an application system that generates input signals and applies the input signals to the system. Both the controller and the test controller. The system controller is connected to the political component in the application system. The system controller generates a first test signal and applies it to the reference component in response to the input signal. The test controller is connected to the component under test. The test controller generates a second test signal and applies it to the component under test in response to the input signal. The reference component and the component under test are of the same type or function (b). ) The test component is connected to the test controller; (d) the comparison element compares the response signal with the response output; (e) indicates the mechanism for 8. if at least one transceiver is included in the scope of the patent application, Connected to this 9. If the scope of the patent application is issued, carry the wiring to the system, and other test components and receivers. Wiring system, the system is then prepared; the connection points, for the implementation of the test signal and the input signal to be indicative of the comparison result signal received from the system's controller receiving the signal from the test controller. A system of 7 items, in which the test component package includes tap wiring and other test components. An eight-item system in which the effect of using at least one of the integrity of the received signal is minimized to test the component and isolate it from the application system. System of 7 items, including the system Page 37 580578 6. Scope of patent application Those who perform the conventional test for the tested components. 11. The system as claimed in item 10 of the scope of patent application, wherein the component for performing the conventional test on the component under test is a component in which a test pattern occurs. 1 2. The system according to item 10 of the scope of patent application, wherein the component for performing the conventional test on the component under test is a parameter control component. 1 3. The system according to item 7 of the patent application scope, wherein the test controller is the system controller of the second application system. 1 4. A behavioral test system for testing electronic components, comprising: (a) an application system, which generates at least one test signal; (b) a reference component, in the application system; (c) an electronic component, a component under test (D) the test component is connected to the application system and the electronic component, and the test component is adapted to guide the plural signals of the application system to the electronic component, and the electronic system is not faulty when the electronic component fails; and (e) the comparison mechanism, The output of the political component and the electronic component are compared. 1 5. The system according to item 14 of the scope of patent application, wherein the electronic component is one of a memory chip, a special function integrated circuit chip, a processor chip, a data communication component, and an electronic component. 16. The system according to item 14 of the patent application scope, wherein the test component includes at least one transceiver. 1 7. The system according to item 15 of the scope of patent application, wherein the electronic components are used in at least one of the following memory chips, personal computers, TV game instruments, recorders, network servers, digital televisions, MP3 projectors, cameras , Page 38 580578 VI. Application scope Patent cell phone, electronic device, using at least one piece of electronic system 1 8. If applying for the tested component 1 9 • If applying for the implementation of the conventional test 2 0 • If applying for the implementation of the conventional test 2 1 -Kind test (a) First system ⑴ First two product signal 2 2 · If applying for the body circuit components of each machine chip, lean material 23. If applying for one of the following: at least one memory crystal memory chip of digital television Electronically includes at least one memory for the component under test. For the component under test method, the signal path components including digital signals are first and second = and application copies; and the second product and processing system of the second communication is a server using at least one memory chip and one memory chip of electronic components, Those who use at least one memory chip in the patent scope of the 14th system to learn the test components of the patent scope of the 18th system of the patent scope of the test chart of the patent scope of the 18th system of the parameter control element test The integrated circuit element has a second integrated circuit element with an input. The integrated circuit element responds to the input circuit element response and the signal provided by the second. The method is a memory chip, a special function communication element, and an electronic component. The method of item 22 of the patent scope is a computer, a television game instrument, an MP3 projector, a camera, a microprocessor-based element, including at least one memory chip. Electronic box person. Microprocessor-based element, electronic box using at least one memory crystal. , Where the system also includes pairs, of which the elements are, and which are the ones. To test the return of this input, provide integrated electronics. Among them, one of the integrated circuit chips. , Among which the application recorder, network cell phone, electronic components using components, electronic systems using at least one chip, packages Page 39 580578 VI. Patent application method, where the first product of plural methods, where the method includes step tester. Method, in which a test pattern method is applied to the element under test, in which the operation method of at least one test component is changed to the element under test, wherein the first integrated circuit is faulty or eliminated. The method further includes the step of putting the body circuit elements such as the item 2 of the patent application scope No. 22 into a parallel tester. 25. If step 21 of the scope of patent application is to implement the knowledge of the component under test 26. If step 25 of the scope of patent application is to implement the knowledge test, including the right person. 27. The steps of implementing a conventional test, such as those in item 25 of the scope of patent application, include those who modify parameters. 2 8. If the road component of the 21st scope of the patent application is originally classified by its manufacturer as 29. If the comparison result in step (b) of the 21st scope of the patent application is output. 30. The method according to item 29 of the scope of patent application, wherein the comparison result is presented on at least one display, one or more light emitting diodes, one or more error indicators, and output elements. Method, where the comparison result is stored. Method, one of which is comparison result guidance, microcontroller, or network 31. For example, at least one of memory element and storage element for item 29 in the scope of patent application 3 2. For item 29 in scope of patent application Logic components, processors, application systems. 3 3. —A method of testing integrated circuit components, including: (a) transmitting a first complex signal to a first integrated circuit component, the first Page 40 580578 VI. Patent application Integrated circuit components are tested components. The first complex signal is logically consistent with the second complex signal transmitted to the second integrated circuit element operating in the application system; (b) Measuring a first response of the first integrated circuit element to at least one of the first complex signals; (c) measuring a second response of the second integrated circuit element to at least one of the second complex signals; and (d ) Compare the first and second responses. 34. The method according to item 33 of the patent application, wherein the first complex signal is obtained by tapping the wiring between the second integrated circuit element and any other components in the application system, and copying the signals carried by these wirings And the winner. 3 5. The method of claim 34, wherein the first and second integrated circuit elements are each one of a memory chip, a special function integrated circuit chip, a processor chip, a data communication element, and an electronic component. 36. The method of claim 35, wherein the application system includes at least one electronic circuit, and one of the at least one electronic circuit includes or is connected to the second integrated circuit element. 37. The method according to item 36 of the scope of patent application, wherein the application system is one of the following: a personal computer, a TV game instrument, a voice recorder, a network server, a digital television, an MP3 projector, a camera, a cell phone Microprocessor-based components using at least one memory chip, electronic components using at least one memory chip, electronic systems including at least one memory chip, and electronic boxes including at least one memory chip. 38. If the method according to item 33 of the patent application scope further includes the step of, Page 41 580578 6. Scope of patent application The output of the comparison result in step (d). 39. The method according to item 38 of the scope of patent application, wherein the comparison result is presented on at least one display, one or more light-emitting diodes, one or more error indicators, and output elements. 40. The method of claim 38, wherein the comparison result is stored in at least one of a memory element and a storage element. 4 1. The method according to item 38 of the patent application, wherein the comparison result is directed to one of a logic element, a processor, an application system, a microcontroller, and a network. 42. The method of claim 35, wherein a plurality of first integrated circuit elements can be tested in parallel. 43. The method of claim 33, wherein the method further includes the step of performing a conventional test on the component under test. 44. If the method of applying for the scope of the patent No. 43, the step of performing a conventional test on the component under test includes applying a test pattern 4 to the tested component. 5. If the method of applying for the scope of the patent 43, where The step of performing the conventional test on the tested component includes modifying the operating parameters of at least one test component. 46. The method of claim 33 in the scope of patent application, wherein the first integrated circuit component was originally classified by the manufacturer as a failure or obsolete product. 4 7 · A method for testing integrated circuit components, including: (a) transmitting a first complex signal to a first controller, the first controller being connected to the first integrated circuit component, the first complex signal being logic Page 42 580578 VI. In the patent application scope, the first control (b) measures one ring (c) measures two rings (d) sets 4 8. If the controller is in function 4 9. If the controller is applied, it uses the first ring Between other components 50 0 · If you apply for the chip and data of the body circuit element 5 1 · If you apply for including at least one electron to the second integrated body 5 2 · If you apply for the following: at least one memory digital memory of digital television The electrons of the chip are consistent with the second complex signal transmitted to the second controller. The two controllers are connected to the second integrated circuit element, and the second device and the second integrated circuit operate in the application system; the first control The second controller responds to at least one of the first complex signals, the second controller responds to at least one of the second complex signals; and compares the first and second responses. The method of claim 47, wherein the first and second are equal. The method of item 47 of the patent, wherein the first complex signal two controllers are connected to at least one of the second integrated circuit elements in the application system, and are obtained by tapping. The method of item 49 of the patent, wherein the first and second products are one of a memory chip, a special function integrated circuit chip, a processing communication element, and an electronic component. The method of claim 50, wherein the application system includes a circuit, and one of the at least one electronic circuit includes or connects a circuit element. The method of the scope of patent No. 50, wherein the application system is a personal computer, a television game instrument, a voice recorder, a network server, a MP 3 projector, a camera, a cell phone, a microprocessor-based component using a tablet, Electronic system, package using at least one component, including at least one memory chip Page 43 580578 VI. Patent application scope Electronic box including at least one memory chip. 53. The method according to item 47 of the scope of patent application, further comprising the step of comparing the output of the result in step (d). 5 4. The method according to item 53 of the scope of patent application, wherein the comparison result is presented on at least one display, one or more light emitting diodes, one or more error indicators, and output elements. 5 5. The method according to item 53 of the scope of patent application, wherein the comparison result is stored in at least one of the memory element and the memory element. 5 6. The method according to item 53 of the patent application, wherein the comparison result is guided to one of a logic element, a processor, an application system, a microcontroller, and a network. 57. The method of claim 50 in which the plurality of first product-body circuit elements can be tested in parallel. 58. The method of claim 47, wherein the method further includes the step of performing a conventional test on the component under test. 59. The method according to item 58 of the scope of patent application, wherein the step of performing a conventional test on the element to be tested includes applying a test pattern to the component under test. 60. The method according to item 58 of the scope of patent application, wherein the step of performing a conventional test on the tested component includes modifying the operation of at least one test component. @ 61. The method according to item 47 of the scope of patent application, wherein the first integrated circuit component was originally classified by the manufacturer as a failure or obsolete product. 6 2. —Test system for integrated circuit components, including: Page 44 580578 VI. Scope of Patent Application (a) Section (b) Section (c) Compound System (d) Compound System Belt (e) Sound 63. For example, if you apply for a body circuit component chip, it is poor 6 4 At least one electricity to the second product 6 5 · If you apply one of the following: ， At least one memory chip of the digital TV includes at least one 6 6 · If you apply for a test component 6 7 · If you apply for an integrated circuit component, Are tested components; two integrated circuit components, operating in the application system; digital system wiring, connecting the second integrated circuit components to other components in the application system; digital testing components, connected to the integrated circuit components and the Complex number wiring, the complex test component is adapted to direct the signal of the complex system wiring station to the first integrated circuit element; and a comparator, which compares the signal of the first and second integrated circuit element to the signal. The system according to item 62 of the patent, wherein the first and second products are each one of a memory chip, a special function integrated circuit chip, a processing material communication element, and an electronic component. The system according to item 63 of the patent, wherein the application system includes a package circuit, and one of the at least one electronic circuit includes or connects circuit components. Please apply for the system of item No. 63, in which the application system is a personal computer, a TV game instrument, a recorder, a network server, a MP3 projector, a camera, a cell phone, and a microprocessor-based chip. Components, electronic systems using at least one sub-component, electronic systems including at least one memory chip, and electronic boxes containing memory chips. Please refer to the system of item 62 of the patent, in which the system includes components for performing conventional tests. Please refer to the system under the scope of patent No. 66, in which Page 45 580578 VI. Scope of patent application The components for implementing the trial trial are issued in an attempt to type 68. For example, if the scope of patent application item 66 = the case. A component for performing a conventional test is a parameter control component; For the tested component 69. If the iP optional component is given in item 66 of the scope of the patent application, the system also includes circuit components, so that the tested component can be put into the first integrated circuit. The prostitutes carried out I-tests in Guwu and provided the respondent. Show all the circuits of the integrated circuit, switch between the two specialties: the system of Fanyuan Item 62, where the system also includes the error § already loaded early, connected to the comparator, the error recording unit is suitable for directing the comparison result At least one of the microcontroller's network, display,-or more light-emitting diodes, one or more error indicators, processors, application systems, logic elements, storage elements, output elements, memory elements. 71 · —A test system for integrated circuit components, including ... (a) The first integrated circuit component is the component under test; (b) The first controller is connected to the third integrated circuit component; (c) ) The second integrated circuit element is operated in the application system; (d) The second controller is connected to the second integrated circuit element, and the second controller is operated in the application system; (e) the plural system Wiring, connecting the second controller to components other than the second integrated circuit element in the application system; (f) a plurality of test components, including at least one electronic component and wiring, the plurality of test components connected to the z-th control The plural system is connected to Α% in the signal line of the plural system wiring, and the plural test component is Article 46 580578 6. Application for patent application f ^ Entry selection = component, suitable for carrying out 1 test in the component provided from the component, and connecting the complex system to one of the first integrated circuit component and the first controller, 80 · As described in the system of item 71 of the patent scope, error record = stand, connected to the comparator, the error comparison result is guided to the microcontroller, network, display pole body, two ^ = upper error indicator , Processor, 'storage, rotation-out components, memory components to 81-= test system for body circuit components, (a) test components; signal storage components; (C this Fu 2 test module, connected to the test The yuan two test module is suitable for directing the comparison element 5 stored in the frame to the test element t =, and comparing the output of the test element. The second complex signal is compared. 82. The scope of the patent claim 81 The following /: (a) The input of the application system component from the system signal copy of the application system, and the application, the application system component and the test test element are functionally equivalent; or (b) the analog component Generated analog signal, system from application system No., page 48 of the series, in order to provide the signal carried by the test line to the intermediate switcher. The system also includes § the already loaded unit is suitable for the application system with less than one, more than one or more than two, and less One of which includes: a piece and the storage element, the first piece in the storage element; and, the same as the storage element. Wherein the test signal is that the system signal includes the same type of output element as the system component, or the same type as the output element of the system component. The analog signal of the analog source signal includes the application system 580578. 6. The input of the patent application system components and the output of the application system components. The components of the application system are the same type as the test element or functionally equivalent to the test element. 8 3. If the system according to item 82 of the scope of patent application, wherein the test element is an integrated circuit element, and the integrated circuit element is the component to be tested. 8 4. If the system is based on item 82 of the patent scope, where The test element is a controller, connected to an integrated circuit element, and the integrated circuit element is a component to be tested. Page 49