TW200603269A - Method of barrier layer surface treatment to enable direct copper plating on barrier metal - Google Patents
Method of barrier layer surface treatment to enable direct copper plating on barrier metalInfo
- Publication number
- TW200603269A TW200603269A TW094118707A TW94118707A TW200603269A TW 200603269 A TW200603269 A TW 200603269A TW 094118707 A TW094118707 A TW 094118707A TW 94118707 A TW94118707 A TW 94118707A TW 200603269 A TW200603269 A TW 200603269A
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- surface treatment
- enable direct
- copper plating
- layer surface
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/34—Pretreatment of metallic surfaces to be electroplated
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Embodiments of a method of barrier layer surface treatment to enable direct copper plating without copper seed layer. In one embodiment, a method of plating copper on a substrate with a group VIII metal layer on top comprises pre-treating the substrate surface by removing a group VIII metal surface oxide layer and/or surface contaminants and plating copper on the pre-treated group VIII metal surface. Pre-treating the substrate can be accomplished by annealing the substrate in an environment with a hydrogen-containing gas environment and/or a non-reactive gas(es) to Ru, by a cathodic treatment in an acid-containing bath, or by immersing the substrate in an acid-containing bath.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US57912904P | 2004-06-10 | 2004-06-10 | |
| US11/007,857 US20050274621A1 (en) | 2004-06-10 | 2004-12-09 | Method of barrier layer surface treatment to enable direct copper plating on barrier metal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200603269A true TW200603269A (en) | 2006-01-16 |
| TWI292925B TWI292925B (en) | 2008-01-21 |
Family
ID=35459359
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094118707A TWI292925B (en) | 2004-06-10 | 2005-06-07 | Method of barrier layer surface treatment to enable direct copper plating on barrier metal |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20050274621A1 (en) |
| EP (1) | EP1778896A1 (en) |
| JP (1) | JP2008502806A (en) |
| TW (1) | TWI292925B (en) |
| WO (1) | WO2005123988A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI462178B (en) * | 2006-08-30 | 2014-11-21 | Lam Res Corp | Self assembled monolayer for improving adhesion between copper and barrier layer |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7179736B2 (en) * | 2004-10-14 | 2007-02-20 | Lsi Logic Corporation | Method for fabricating planar semiconductor wafers |
| US7442267B1 (en) * | 2004-11-29 | 2008-10-28 | Novellus Systems, Inc. | Anneal of ruthenium seed layer to improve copper plating |
| KR100617070B1 (en) * | 2005-09-13 | 2006-08-30 | 동부일렉트로닉스 주식회사 | Method for Cleaning Electrochemical Plating Cells |
| EP1845554A3 (en) * | 2006-04-10 | 2011-07-13 | Imec | A method to create super secondary grain growth in narrow trenches |
| US8026605B2 (en) * | 2006-12-14 | 2011-09-27 | Lam Research Corporation | Interconnect structure and method of manufacturing a damascene structure |
| JP2009030167A (en) * | 2007-07-02 | 2009-02-12 | Ebara Corp | Method and apparatus for treating substrate |
| US7727890B2 (en) | 2007-12-10 | 2010-06-01 | International Business Machines Corporation | High aspect ratio electroplated metal feature and method |
| US7919409B2 (en) * | 2008-08-15 | 2011-04-05 | Air Products And Chemicals, Inc. | Materials for adhesion enhancement of copper film on diffusion barriers |
| US8076241B2 (en) * | 2009-09-30 | 2011-12-13 | Tokyo Electron Limited | Methods for multi-step copper plating on a continuous ruthenium film in recessed features |
| US20110094888A1 (en) * | 2009-10-26 | 2011-04-28 | Headway Technologies, Inc. | Rejuvenation method for ruthenium plating seed |
| JP2012092366A (en) * | 2010-10-25 | 2012-05-17 | Imec | Method of electrodepositing copper |
| US20130193575A1 (en) * | 2012-01-27 | 2013-08-01 | Skyworks Solutions, Inc. | Optimization of copper plating through wafer via |
| US9496145B2 (en) * | 2014-03-19 | 2016-11-15 | Applied Materials, Inc. | Electrochemical plating methods |
| TWI711724B (en) * | 2018-11-30 | 2020-12-01 | 台灣積體電路製造股份有限公司 | Electrochemical plating system, method for performing electrochemical plating process, and method of forming semiconductor substrate |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63216976A (en) * | 1987-03-03 | 1988-09-09 | Wakamatsu Netsuren Kk | Pretreatment by reduction under heating before plating |
| JPH01147087A (en) * | 1987-12-01 | 1989-06-08 | Nec Corp | Pretreatment of copper-tungsten alloy before plating |
| GB9107364D0 (en) * | 1991-04-08 | 1991-05-22 | Skw Metals Uk Ltd | Coated molybdenum parts and process for their production |
| JPH06248489A (en) * | 1993-02-22 | 1994-09-06 | Tanaka Kikinzoku Kogyo Kk | Pre-plating method for corrosion resistant materials |
| JP3409831B2 (en) * | 1997-02-14 | 2003-05-26 | 日本電信電話株式会社 | Method for manufacturing wiring structure of semiconductor device |
| JPH11269693A (en) * | 1998-03-24 | 1999-10-05 | Japan Energy Corp | Copper deposition method and copper plating solution |
| AU3553599A (en) * | 1998-04-13 | 1999-11-01 | Acm Research, Inc. | Method and apparatus for enhancing adhesion between barrier layer and metal layer formed by plating |
| JPH11335896A (en) * | 1998-05-25 | 1999-12-07 | Ebara Corp | Wafer plating apparatus |
| US6362099B1 (en) * | 1999-03-09 | 2002-03-26 | Applied Materials, Inc. | Method for enhancing the adhesion of copper deposited by chemical vapor deposition |
| JP4202016B2 (en) * | 2000-12-13 | 2008-12-24 | アンテルユニヴェルシテール・ミクロ−エレクトロニカ・サントリュム・ヴェー・ゼッド・ドゥブルヴェ | Method for preparing an electroplating bath and associated copper plating process |
| KR100805843B1 (en) * | 2001-12-28 | 2008-02-21 | 에이에스엠지니텍코리아 주식회사 | Copper wiring forming method, semiconductor device and copper wiring forming system manufactured accordingly |
| AU2003217197A1 (en) * | 2002-01-10 | 2003-07-30 | Semitool, Inc. | Method for applying metal features onto barrier layers using electrochemical deposition |
| US20040069651A1 (en) * | 2002-10-15 | 2004-04-15 | Applied Materials, Inc. | Oxide treatment and pressure control for electrodeposition |
| US6913791B2 (en) * | 2003-03-03 | 2005-07-05 | Com Dev Ltd. | Method of surface treating titanium-containing metals followed by plating in the same electrolyte bath and parts made in accordance therewith |
| US20070125657A1 (en) * | 2003-07-08 | 2007-06-07 | Zhi-Wen Sun | Method of direct plating of copper on a substrate structure |
| US20060283716A1 (en) * | 2003-07-08 | 2006-12-21 | Hooman Hafezi | Method of direct plating of copper on a ruthenium alloy |
| US7341946B2 (en) * | 2003-11-10 | 2008-03-11 | Novellus Systems, Inc. | Methods for the electrochemical deposition of copper onto a barrier layer of a work piece |
| US7405143B2 (en) * | 2004-03-25 | 2008-07-29 | Asm International N.V. | Method for fabricating a seed layer |
-
2004
- 2004-12-09 US US11/007,857 patent/US20050274621A1/en not_active Abandoned
-
2005
- 2005-06-07 EP EP05758773A patent/EP1778896A1/en not_active Withdrawn
- 2005-06-07 JP JP2007527630A patent/JP2008502806A/en active Pending
- 2005-06-07 WO PCT/US2005/019902 patent/WO2005123988A1/en not_active Ceased
- 2005-06-07 TW TW094118707A patent/TWI292925B/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI462178B (en) * | 2006-08-30 | 2014-11-21 | Lam Res Corp | Self assembled monolayer for improving adhesion between copper and barrier layer |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2005123988B1 (en) | 2006-04-06 |
| JP2008502806A (en) | 2008-01-31 |
| US20050274621A1 (en) | 2005-12-15 |
| WO2005123988A1 (en) | 2005-12-29 |
| TWI292925B (en) | 2008-01-21 |
| EP1778896A1 (en) | 2007-05-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW200603269A (en) | Method of barrier layer surface treatment to enable direct copper plating on barrier metal | |
| WO2009016795A1 (en) | Bonded wafer manufacturing method | |
| TW200736415A (en) | Electroform, methods of making electroforms, and products made from electroforms | |
| WO2007111676A3 (en) | Method of direct plating of copper on a substrate structure | |
| TW200737346A (en) | Sequential oxide removal using fluorine and hydrogen | |
| EP1983554A3 (en) | Hydrogen ashing enhanced with water vapor and diluent gas | |
| WO2008029060A3 (en) | Substrate for an organic light-emitting device, use and process for manufacturing this substrate, and organic light-emitting device | |
| EP1857570A3 (en) | Method for forming a nickel-based layered structure on a magnesium alloy substrate, a surface-treated magnesium alloy article made thereform, and a cleaning solution and a surface treatment solution used therefor | |
| WO2008149844A1 (en) | Film forming method and film forming apparatus | |
| WO2005022065A3 (en) | Oxidation resistant coatings for ultra high temperature transition metals and transition metal alloys | |
| TW200702498A (en) | Method for electrodeposition of bronzes | |
| TW200644048A (en) | Manufacturing method of semiconductor device | |
| WO2009152329A3 (en) | Method for surface treatment of semiconductor substrates | |
| EP2133921B8 (en) | method to prepare a stable transparent electrode | |
| GB2560291A (en) | Method for stripping flexible substrate | |
| SG142223A1 (en) | Methods for characterizing defects on silicon surfaces, etching composition for silicon surfaces and process of treating silicon surfaces with the etching composition | |
| WO2008154180A3 (en) | Method of electroplating a conversion electron emitting source on implant | |
| TW200728514A (en) | Method of coating a surface of a substrate with a metal by electroplating | |
| TW200644164A (en) | Method for forming a barrier/seed layer for copper metallization | |
| CA2652497A1 (en) | Metal member having precious metal plating and manufacturing method of that metal member | |
| WO2008070568A3 (en) | Apparatus and method for electroplating on a solar cell substrate | |
| TW200644130A (en) | A semiconductor device structure and method therefor | |
| WO2007044232A3 (en) | Pre-treatment to eliminate the defects formed during electrochemical plating | |
| SG162751A1 (en) | Process for making a metal seed layer | |
| WO2011031089A3 (en) | Cleaning solution composition |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |