SU1667270A1

SU1667270A1 - Device for simulation of signal spliting

Info

Publication number: SU1667270A1
Application number: SU884491439A
Authority: SU
Inventors: Владимир Иванович Балябин; Валерий Серафимович Сидоров
Original assignee: Предприятие П/Я Р-6120
Priority date: 1988-10-10
Filing date: 1988-10-10
Publication date: 1991-07-30

Abstract

Изобретение относитс к электросв зи. Цель изобретени - повышение достоверности имитируемых сигналов путем обеспечени случайного характера их распределени . Дл этого устройство дл имитации дроблений сигналов содержит блок 1 генераторов шума, генератор 2 импульсов, делитель 3 частоты, параллельный регистр 4, элементы ИЛИ - НЕ 5 и 7, триггер 6, переключатель 8, сумматор 9 по модулю два, элемент ИЛИ 10 и резистор 11 задани низкого уровн . Устройство позвол ет имитировать искажени типа дроблений различных видов и исследовать воздействие канальных помех на полезный сигнал. При этом полезный сигнал и любой из сигналов канальной помехи вл ютс некоррелированными, а сигнал канальной помехи подчин етс случайному закону. 2 ил.The invention relates to telecommunications. The purpose of the invention is to increase the reliability of simulated signals by ensuring the random nature of their distribution. For this, the device for simulating signal splitting contains a block 1 of noise generators, a generator of 2 pulses, a divider 3 frequencies, a parallel register 4, the elements OR - NOT 5 and 7, the trigger 6, the switch 8, the adder 9 modulo two, the element OR 10 and a resistor 11 tasks of low level. The device makes it possible to simulate the distortions of the type of crushing of various types and to investigate the effect of channel interference on the useful signal. In this case, the desired signal and any of the channel interference signals are uncorrelated, and the channel interference signal obeys a random law. 2 Il.

Description

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Claims

Claim

A device for simulating signal splitting, containing a trigger, as well as a pulse generator and a frequency divider connected in series, the output of which is connected to the input of a parallel register record, characterized in that, in order to increase the reliability of the simulated signals by ensuring the random nature of their distribution, a block is introduced into it noise generators, a switch, two OR-NOT elements and series-connected OR element and an adder modulo two, and the inputs of the OR element are connected to the first and second output a switch, the third output of which is connected to the first input of the first OR-HE element, the second input of which is connected to the trigger output, the installation input of 1 of which is connected to the input of the second OR-NOT element and to the first output of the parallel register, the second output of which is connected to another the input of the second OR-HE element, and the information inputs of the parallel register are connected to the outputs of the noise generator block 1667270, and the first, second and third information inputs of the switch are connected respectively to the third output of the parallel register, with the output of the second OR-NOT element and with the fourth output of the parallel register, and the input of the trigger setting 0 is connected to the output of the first OR-NOT element, and the second adder input modulo two is the information input of the device and is connected through the low-level resistor with a bus of zero potential, the control inputs of the switch are control inputs, and the other input of the adder modulo two inputs of the voltage level of the device.

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Figure 2