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SG11201912503WA - Device substrate with high thermal conductivity and method of manufacturing the same - Google Patents

Device substrate with high thermal conductivity and method of manufacturing the same

Info

Publication number
SG11201912503WA
SG11201912503WA SG11201912503WA SG11201912503WA SG11201912503WA SG 11201912503W A SG11201912503W A SG 11201912503WA SG 11201912503W A SG11201912503W A SG 11201912503WA SG 11201912503W A SG11201912503W A SG 11201912503WA SG 11201912503W A SG11201912503W A SG 11201912503WA
Authority
SG
Singapore
Prior art keywords
manufacturing
same
thermal conductivity
high thermal
device substrate
Prior art date
Application number
SG11201912503WA
Inventor
Yoshihiro Kubota
Shigeru Konishi
Original Assignee
Shinetsu Chemical Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinetsu Chemical Co filed Critical Shinetsu Chemical Co
Publication of SG11201912503WA publication Critical patent/SG11201912503WA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76262Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using selective deposition of single crystal silicon, i.e. SEG techniques
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/30Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/312Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier parameters being the characterizing feature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
SG11201912503WA 2017-07-14 2018-07-10 Device substrate with high thermal conductivity and method of manufacturing the same SG11201912503WA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017138026 2017-07-14
PCT/JP2018/026068 WO2019013212A1 (en) 2017-07-14 2018-07-10 Highly heat conductive device substrate and method for producing same

Publications (1)

Publication Number Publication Date
SG11201912503WA true SG11201912503WA (en) 2020-01-30

Family

ID=65002076

Family Applications (2)

Application Number Title Priority Date Filing Date
SG11201912503WA SG11201912503WA (en) 2017-07-14 2018-07-10 Device substrate with high thermal conductivity and method of manufacturing the same
SG10201913156WA SG10201913156WA (en) 2017-07-14 2018-07-10 Device substrate with high thermal conductivity and method of manufacturing the same

Family Applications After (1)

Application Number Title Priority Date Filing Date
SG10201913156WA SG10201913156WA (en) 2017-07-14 2018-07-10 Device substrate with high thermal conductivity and method of manufacturing the same

Country Status (8)

Country Link
US (1) US11361969B2 (en)
EP (1) EP3654366B1 (en)
JP (1) JP6854895B2 (en)
KR (1) KR102558905B1 (en)
CN (1) CN110892506B (en)
SG (2) SG11201912503WA (en)
TW (1) TWI798236B (en)
WO (1) WO2019013212A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6431631B1 (en) 2018-02-28 2018-11-28 株式会社フィルネックス Manufacturing method of semiconductor device
CN113454758B (en) * 2019-02-25 2024-04-26 三菱电机株式会社 Method for manufacturing semiconductor element
JP7041648B2 (en) * 2019-07-17 2022-03-24 信越化学工業株式会社 Manufacturing method of composite substrate
JP7186921B2 (en) * 2020-04-13 2022-12-09 三菱電機株式会社 Semiconductor device manufacturing method
CN112930106B (en) * 2021-01-22 2022-11-22 杭州唯灵医疗科技有限公司 Flexible electronic device and assembling method thereof
WO2023021972A1 (en) * 2021-08-17 2023-02-23 信越半導体株式会社 Provisionally bonded wafer and method for producing same

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US20020134503A1 (en) * 2001-03-20 2002-09-26 Accucorp Technical Services, Inc. Silicon wafers bonded to insulator substrates by low viscosity epoxy wicking
EP1363319B1 (en) 2002-05-17 2009-01-07 Semiconductor Energy Laboratory Co., Ltd. Method of transferring an object and method of manufacturing a semiconductor device
JP2004047975A (en) * 2002-05-17 2004-02-12 Semiconductor Energy Lab Co Ltd Transfer method of laminate and method of manufacturing semiconductor device
JP2005129825A (en) * 2003-10-27 2005-05-19 Sumitomo Chemical Co Ltd Method for manufacturing compound semiconductor substrate
WO2005065357A2 (en) * 2003-12-29 2005-07-21 Translucent, Inc. Rare earth-oxides, rare-earth-nitrides, rare earth-phosphides and ternary alloys with silicon
JP4389626B2 (en) 2004-03-29 2009-12-24 ソニー株式会社 Manufacturing method of solid-state imaging device
JP2007266044A (en) * 2006-03-27 2007-10-11 New Japan Radio Co Ltd Method of manufacturing semiconductor device
JP5368996B2 (en) * 2006-12-26 2013-12-18 ソイテック Method for manufacturing a semiconductor on insulator structure
JP2008218814A (en) * 2007-03-06 2008-09-18 Sumitomo Electric Ind Ltd Power module
KR101259484B1 (en) * 2008-02-26 2013-05-06 쿄세라 코포레이션 Wafer-supporting member, method for producing the same, and electrostatic chuck using the same
US8092628B2 (en) * 2008-10-31 2012-01-10 Brewer Science Inc. Cyclic olefin compositions for temporary wafer bonding
US8440544B2 (en) * 2010-10-06 2013-05-14 International Business Machines Corporation CMOS structure and method of manufacture
CN104094399A (en) * 2011-11-04 2014-10-08 斯兰纳私人集团有限公司 Method of producing silicon-on-insulator article
CN104040685B (en) 2011-12-22 2016-11-02 信越化学工业株式会社 Composite substrate
WO2013168707A1 (en) * 2012-05-08 2013-11-14 信越化学工業株式会社 Heat dissipation substrate and method for producing same
JP2014086665A (en) * 2012-10-26 2014-05-12 Sumitomo Electric Ind Ltd Group-iii nitride donor composite substrate and manufacturing method thereof, and group-iii nitride composite substrate and manufacturing method thereof
KR102229397B1 (en) * 2013-05-01 2021-03-17 신에쓰 가가꾸 고교 가부시끼가이샤 Method for producing hybrid substrate, and hybrid substrate
FR3012604B1 (en) * 2013-10-25 2017-03-03 Auxitrol Sa PRESSURE SENSOR COMPRISING A STRUCTURE FOR CONTROLLING AN ADHESIVE LAYER RESISTANT TO TEMPERATURE VARIATIONS
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WO2018083961A1 (en) * 2016-11-01 2018-05-11 信越化学工業株式会社 Method for transferring device layer to transfer substrate and highly heat conductive substrate

Also Published As

Publication number Publication date
KR102558905B1 (en) 2023-07-21
WO2019013212A1 (en) 2019-01-17
EP3654366A4 (en) 2021-04-14
US20200227263A1 (en) 2020-07-16
US11361969B2 (en) 2022-06-14
CN110892506A (en) 2020-03-17
EP3654366B1 (en) 2024-08-07
JPWO2019013212A1 (en) 2020-04-16
TW201908124A (en) 2019-03-01
TWI798236B (en) 2023-04-11
SG10201913156WA (en) 2020-02-27
CN110892506B (en) 2024-04-09
JP6854895B2 (en) 2021-04-07
EP3654366A1 (en) 2020-05-20
KR20200026822A (en) 2020-03-11

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