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SE9503631D0 - A method for producing a semiconductor device with an implantation step - Google Patents

A method for producing a semiconductor device with an implantation step

Info

Publication number
SE9503631D0
SE9503631D0 SE9503631A SE9503631A SE9503631D0 SE 9503631 D0 SE9503631 D0 SE 9503631D0 SE 9503631 A SE9503631 A SE 9503631A SE 9503631 A SE9503631 A SE 9503631A SE 9503631 D0 SE9503631 D0 SE 9503631D0
Authority
SE
Sweden
Prior art keywords
layer
semiconductor layer
producing
semiconductor device
implantation step
Prior art date
Application number
SE9503631A
Other languages
Swedish (sv)
Inventor
Christopher Harris
Kurt Rottner
Original Assignee
Abb Research Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Research Ltd filed Critical Abb Research Ltd
Priority to SE9503631A priority Critical patent/SE9503631D0/en
Publication of SE9503631D0 publication Critical patent/SE9503631D0/en
Priority to US08/544,979 priority patent/US5849620A/en
Priority claimed from US08/544,979 external-priority patent/US5849620A/en
Priority to PCT/SE1996/001206 priority patent/WO1997015072A1/en
Priority to EP96935659A priority patent/EP0870323A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

A method for producing a semiconductor device having a semiconductor layer (2) of SiC comprises at least the steps of applying an insulating layer (1) on said semiconductor layer, implantation of an impurity dopant into said semiconductor layer and annealing this layer at such a high temperature that the implanted impurities are activated. Said insultating layer is applied before and maintained on said semiconductor layer during said annealing step. A material having AlN as major component is applied on said semiconductor layer as said insulating layer.
SE9503631A 1995-10-18 1995-10-18 A method for producing a semiconductor device with an implantation step SE9503631D0 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SE9503631A SE9503631D0 (en) 1995-10-18 1995-10-18 A method for producing a semiconductor device with an implantation step
US08/544,979 US5849620A (en) 1995-10-18 1995-10-30 Method for producing a semiconductor device comprising an implantation step
PCT/SE1996/001206 WO1997015072A1 (en) 1995-10-18 1996-09-27 A method for producing a semiconductor device comprising an implantation step
EP96935659A EP0870323A1 (en) 1995-10-18 1996-09-27 A method for producing a semiconductor device comprising an implantation step

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9503631A SE9503631D0 (en) 1995-10-18 1995-10-18 A method for producing a semiconductor device with an implantation step
US08/544,979 US5849620A (en) 1995-10-18 1995-10-30 Method for producing a semiconductor device comprising an implantation step

Publications (1)

Publication Number Publication Date
SE9503631D0 true SE9503631D0 (en) 1995-10-18

Family

ID=26662399

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9503631A SE9503631D0 (en) 1995-10-18 1995-10-18 A method for producing a semiconductor device with an implantation step

Country Status (3)

Country Link
EP (1) EP0870323A1 (en)
SE (1) SE9503631D0 (en)
WO (1) WO1997015072A1 (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3629011A (en) * 1967-09-11 1971-12-21 Matsushita Electric Industrial Co Ltd Method for diffusing an impurity substance into silicon carbide
US3999206A (en) * 1974-11-04 1976-12-21 Vladimir Alexandrovich Babenko Semiconductor indicating device and method for production of same
US4030942A (en) * 1975-10-28 1977-06-21 International Business Machines Corporation Semiconductor masking for device fabrication utilizing ion implantation and other methods
US4058413A (en) * 1976-05-13 1977-11-15 The United States Of America As Represented By The Secretary Of The Air Force Ion implantation method for the fabrication of gallium arsenide semiconductor devices utilizing an aluminum nitride protective capping layer
DE2631873C2 (en) * 1976-07-15 1986-07-31 Siemens AG, 1000 Berlin und 8000 München Method for producing a semiconductor component with a Schottky contact on a gate region that is adjusted to another region and with a low series resistance
DD221591A1 (en) * 1983-11-30 1985-04-24 Gera Elektronik Veb FORMING METHOD FOR HIGH-VOLTAGE SURFACE FOIL
JP3146694B2 (en) * 1992-11-12 2001-03-19 富士電機株式会社 Silicon carbide MOSFET and method of manufacturing silicon carbide MOSFET
KR960009013A (en) * 1994-08-18 1996-03-22 김광호 Titanium nitride (TiN) gate electrode formation method
SE9501312D0 (en) * 1995-04-10 1995-04-10 Abb Research Ltd Method of procucing a semiconductor device

Also Published As

Publication number Publication date
WO1997015072A1 (en) 1997-04-24
EP0870323A1 (en) 1998-10-14

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