RU2521789C2 - Method of determining thermal impedance of very large scale integrated circuits - microprocessors and microcontrollers - Google Patents

Abstract

FIELD: physics; control.

SUBSTANCE: method is meant for use during outgoing and incoming quality control of very large scale integrated (VLSI) circuits - microprocessors and microcontrollers and evaluating temperature margins thereof. A special "warm up" test and a control program are loaded into the inspected VLSI circuit which is mounted on a heatsink and is connected to a power supply. A periodic heating mode is turned on by switching the inspected VLSI circuit from a mode of executing the special test to a standby mode with frequency Ω and duty ratio 2. The method includes, at modulation frequency Ω, selecting and measuring the amplitude $$I_{m1}^{\text{cons}}\left(\Omega \right)$$

of the first harmonic of current consumed by the inspected VLSI circuit, the amplitude $$U_{m1}^{TP}\left(\Omega \right)$$

of the first harmonic of a temperature-sensitive parameter with a known negative temperature coefficient K_T, e.g. voltage across a p-n junction built into the kernel of the VLSI circuit or high-level voltage across one of the leads of the VLSI circuit loaded with a resistive load, the logic state of which does not change when the VLSI circuit is switched from one mode to the other, and the phase shift φ(Ω) between the first harmonic of current consumed by the inspected VLSI circuit and the first harmonic of the temperature-sensitive parameter. The magnitude of thermal impedance of the inspected VLSI circuit at frequency Ω is determined using the formula: $$\left|Z_T\left(\Omega \right)\right|=\frac{U_{m1}^{TP}\left(\Omega \right)}{K_T{U}_{\sup }{I}_{m1}^{\text{cons}}\left(\Omega \right)},$$

where U_sup is supply voltage of the inspected LSI circuit, and the phase φT(Ω) of thermal impedance of the inspected VLSI is defined as the phase difference between the first harmonic of the temperature-sensitive parameter and the first harmonic of current consumed by the inspected VLSI circuit minus 180°.

EFFECT: high efficiency of the method.

2 dwg

Description

The invention relates to a technique for measuring the thermal parameters of integrated circuits and can be used to control the quality of ultra-large integrated circuits (VLSI) - microprocessors and microcontrollers and determine their temperature reserves.

There is a method of measuring the thermal resistance of the transition-case of microprocessors (see, for example, Krinitsin V. Thermal mode of Pentium 4 and Athlon XP // processors or Temperature of processors. - Access mode: Intel //), which consists in the fact that VLSI is controlled (microprocessor or a microcontroller) located on the circuit board, turn on the heating mode by running a special “warm-up” test, during which the electric current and, accordingly, the electric power consumed by the VLSI significantly increase, after some The burden required for output ULSI stationary thermal mode, measure the current consumed by the VLSI circuit from the power source, and a temperature-setting (TCHP), which is used as the forward voltage drop across a specially formed in the core of modern microprocessors and microcontrollers p-n junction with a low forward current. Multiplying the value of the VLSI consumption current by the supply voltage, the power consumed by the VLSI is calculated in the special "warming up" test mode, and by the change in the PMT, the temperature gradient of the VLSI crystal is found, and the thermal resistance of the VLSI is determined as the ratio of the temperature increment to the dissipated VLSI power. In modern microprocessors and microcontrollers, the constant voltage at the temperature sensor (pn junction) is converted by the built-in analog-to-digital converter (ADC) into a digital code that can be displayed on an LCD display or computer.

The disadvantage of this method is the large measurement error due to the relatively small change in the heating power of the VLSI and the small useful change in the PST at the level of a large quasistatic value of this parameter (usually the voltage change at the pn junction as a result of heating the VLSI chip is tens of millivolts, and the voltage drop, for example , on a silicon rn junction of the order of 700 mV, on a gallium arsenide pn junction of the order of 3.0 V), as well as a small (not more than 8 bits) resolution Wow ADC. In addition, the measurement of the thermal resistance of the transition-case does not allow us to determine the contribution to the heat sink of individual layers of the VLSI design and evaluate the quality of their assembly.

A more adequate thermal parameter of VLSI, like other classes of integrated circuits, is the thermal impedance or total complex thermal resistance, the module of which at a given frequency Q is defined as the ratio of the amplitude of the temperature change of the active region of the integrated circuit to the amplitude of the variable component consumed by the integrated power circuit when changing power consumption according to a harmonic law with a frequency of Ω, and the phase as a phase shift between the variable component of temperature and variable oh component of power consumption. The frequency dependence of this parameter allows us to evaluate the contribution of each layer of the integrated circuit design to the total thermal resistance and evaluate the dynamic thermal properties of the integrated circuit.

и ТЧП $$I_{m1}^{ТП}$$

и сдвиг фазы между ними, по которым и определяют модуль и фазу теплового импеданса контролируемой микросхемы на частоте модуляции Ω.Closest to the claimed invention is a method for determining the thermal impedance of CMOS digital integrated circuits (see Sergeev V.A., Lamzin V.A., Yudin V.V. Method for determining the thermal impedance of CMOS digital integrated circuits. - Application No. 20111114924/28 ( 020765) from 04/08/2011), consisting in the fact that the controlled microcircuit is switched on in the periodic heating mode, in which the logical state of one or more logical elements (LEs) of the controlled microcircuit is changed by supplying a sequence of high-frequency signals to their inputs switching pulses and measure the change in the PMT of the LE whose state does not change, while the frequency of the switching pulses is changed (modulated) by a periodic sequence of rectangular pulses with a given frequency Ω and duty cycle equal to 2 at a modulation frequency Ω, the amplitude of the variable component of the current consumption is measured $$I_{m\mathrm{one}}^{P\mathrm{about}t}$$

and PPP $$I_{m\mathrm{one}}^{TP}$$

and a phase shift between them, by which they determine the modulus and phase of the thermal impedance of the controlled microcircuit at a modulation frequency Ω.

The disadvantage of this method is that it requires two pulse generators and cannot be used for VLSI, since access to individual LEs in VLSI is impossible.

The technical result is a reduction in hardware costs and an increase in the accuracy of measuring the thermal impedance of VLSI - microprocessors and microcontrollers.

и переменной составляющей температурочувствительного параметра

, в качестве которого используют либо прямое падения напряжения на встроенном в ядро контролируемой СБИС р-n переходе либо напряжение логической единицы

на одном из нагруженных резистивной нагрузкой выходов контролируемой СБИС, логическое состояние которого остается неизменным при переключении контролируемой СБИС из режима выполнения специального теста в режим паузы; модуль теплового импеданса контролируемой БИС на частоте переключения Ω определяют по формулеThe technical result is achieved by the fact that a special (“warming up”) test and a program for controlling the operating mode of the VLSI are loaded into a controlled VLSI installed on the heat sink and connected to a power source; by the start command, the controlled VLSI is switched on to the appropriate input in the periodic heating mode by switching it with a given frequency Q from the execution mode of the special test to the pause mode, while the execution time of the special test is set equal to the duration of the pause, i.e. equal to half T = 1 / 27πΩ switching after a time required to output ULSI steady thermal state, measured at the switching frequency the amplitude of the AC component controlled consumed VLSI

and the variable component of the temperature-sensitive parameter

, which is used either as a direct voltage drop at the junction integrated in the core of the VLSI-controlled junction or voltage of a logical unit

on one of the outputs of the controlled VLSI loaded with a resistive load, the logical state of which remains unchanged when the controlled VLSI switches from the special test to pause mode; the thermal impedance module of a controlled LSI at a switching frequency Ω is determined by the formula

$$|\; |\; |Z_T\left(\Omega \right)|\; |\; |=\frac{U_{m\mathrm{one}}^{TP}\left(\Omega \right)}{K_T{U}_{P\mathrm{and}t}{I}_{m\mathrm{one}}^{P\mathrm{about}t}\left(\Omega \right)},\left(\mathrm{one}\right)$$

where K _T is the known negative temperature coefficient of the temperature-sensitive parameter, U _num is the supply voltage of the controlled VLSI, and the phase φ _T (Ω) of the thermal impedance of the controlled VLSI at the modulation frequency is defined as the phase difference shifted by 180 ° between the first harmonic of the current consumed by the controlled VLSI, and the first harmonic of the temperature-sensitive parameter.

тока, потребляемого контролируемой СБИС:The essence of the invention is illustrated by the diagrams in figure 1 and consists in the following. When the VLSI-controlled VLSI switches from the special test mode to the pause mode, the power consumed by the VLSI-controlled VLSI will change, and therefore the power consumed by the VLSI-controlled will be relatively small during the VLSI pause, and significantly (many times) during the execution of the special test more (figure 1, a); that is, the controlled VLSI will be heated by a pulse power periodically changing with duty cycle 2. The amplitude of the first harmonic of the heating power (Fig. 1, b) at the switching frequency can be determined by measuring the first harmonic $$I_{m\mathrm{one}}^{P\mathrm{about}t}$$

current consumed by controlled VLSI:

$$P_{m\mathrm{one}}=U_{P\mathrm{and}t}{I}_{m\mathrm{one}}^{P\mathrm{about}t}.\left(2\right)$$

If the controlled VLSI is placed on a massive heat sink, then after some time exceeding the three thermal time constants, the transition-case τ _{Tn-to the} controlled VLSI (t> 3τ _Tp-k ), after the onset of periodic heating, the regular thermal regime and temperature θ will be established in the controlled VLSI (t) the active region of the VLSI will pulse relative to the average value (Fig.

на одном из выходов контролируемой СБИС, логическое состояние которого остается неизменным, то напряжение ТЧП будет пульсировать в противофазе с температурой θ(t), поскольку и напряжение на р-n переходе, и напряжение логической единицы имеют отрицательный температурный коэффициент. При этом амплитуда переменной составляющей ТЧП на частоте Ω будет пропорциональна амплитуде первой гармоники переменной составляющей температуры $$U_{m1}^{ТП}\left(\Omega \right)=K_T{\theta }_{m1}\left(\Omega \right)$$

(фиг.1, г). Соответственно амплитуда первой гармоники ТЧП с учетом (2) будет равна:The PMT of the controlled chip U ^{TP is} linearly related to the temperature θ (t) of the VLSI active region: U ^TP (t) = K _T θ (t), where K _T is the known temperature coefficient of the PMT. If you use the voltage at the VLSI core pn junction or the logical unit voltage $$U_{\mathrm{at}sx}^{\mathrm{one}}(t)$$

at one of the outputs of the VLSI controlled, the logical state of which remains unchanged, the voltage of the PST will ripple in antiphase with the temperature θ (t), since both the voltage at the pn junction and the voltage of the logical unit have a negative temperature coefficient. In this case, the amplitude of the variable component of the PMT at the frequency Ω will be proportional to the amplitude of the first harmonic of the variable temperature component $$U_{m\mathrm{one}}^{TP}\left(\Omega \right)=K_T{\theta }_{m\mathrm{one}}\left(\Omega \right)$$

(figure 1, g). Accordingly, the amplitude of the first harmonic of the PMT taking into account (2) will be equal to:

$$U_{m\mathrm{one}}^{TP}\left(\Omega \right)=K_T{U}_{P\mathrm{and}t}{I}_{m\mathrm{one}}^{P\mathrm{about}t}\left(\Omega \right)|\; |\; |Z_T\left(\Omega \right)e^{j{\varphi }_T\left(\Omega \right)}|\; |\; |.\left(3\right)$$

From where we get the expression for thermal impedance:

$$Z\left(\Omega \right)=|\; |\; |Z_T\left(\Omega \right)|\; |\; |e^{j{\varphi }_{{}_T}\left(\Omega \right)}=\frac{U_{m\mathrm{one}}^{TP}\left(\Omega \right)}{K_T{U}_{P\mathrm{and}t}{I}_{m\mathrm{one}}^{P\mathrm{about}t}\left(\Omega \right)}{e}^{j{\varphi }_{{}_T}\left(\Omega \right)},\left(\mathrm{four}\right)$$

where φ _T (Ω) is the phase difference between the first harmonic of the temperature of the working surface of the crystal controlled VLSI (Fig. 1, e) and the first harmonic of the heating power (Fig. 1, b).

Figure 2 presents the structural diagram of one of the variants of the device that implements the proposed method. The device contains a power source 1, controlled by VLSI 2, located on the heat sink (circuit board), a collector resistor 3 with a resistance R _I ; load resistor 4 with resistance R _H , two selective voltmeters 5 and 6, and a phase difference meter 7. In this case, the positive pole of the power supply 1 is connected to the corresponding contact terminal of the monitored VLSI 2, and the negative pole of the power source is connected to the common bus of the device, while a current collector resistor is connected between the common bus and the contact terminal of the monitored VLSI 2 3 with resistance R _I , to the output of one of the terminals of the controlled VLSI, the logical state of which does not change when the controlled VLSI switches from the heating mode to p pause mode, a load resistor 4 and a first selective voltmeter 5 are connected, and the input of the second selective voltmeter 6 is connected to the contact terminal of a controlled VLSI, designed to connect the negative pole of the power source, while the linear outputs of the selective voltmeters are connected to the inputs of the phase difference meter.

, и показание U_CB2 второго селективного вольтметра 6, которое пропорционально первой гармонике тока, потребляемого контролируемой СБИС $$U_{CB1}=R_I{I}_{m1}^{пот}$$

и по показаниям селективных вольтметров вычисляют модуль теплового импеданса:The method is as follows. By the “Start” signal, the controlled VLSI starts working in the mode of periodic switching from the special test to the pause mode; the input of the first selective voltmeter 5, tuned to the switching frequency Ω, is supplied with the voltage of a logical unit with a resistive load of the output of the controlled VLSI, the logical state of which remains unchanged, and the voltage from the collector resistor 3, proportional to the current consumed by the controlled VLSI, is fed to the input of the second selective voltmeter 6, also tuned to the switching frequency; signals from the linear outputs of the first selective voltmeter 5 and the second selective voltmeter 6 are fed to the first and second inputs of the phase difference meter, respectively; some time after the beginning of the periodic switching of the monitored VLSI from the special test mode to the pause mode, the reading U _{CB1 of the} first selective voltmeter 5 is recorded, which is equal to the amplitude of the first harmonic of the PMT $$U_{CB\mathrm{one}}=U_{m\mathrm{one}}^{TP}\left(\Omega \right)$$

, and the indication U _{CB2 of the} second selective voltmeter 6, which is proportional to the first harmonic of the current consumed by the controlled VLSI $$U_{CB\mathrm{one}}=R_I{I}_{m\mathrm{one}}^{P\mathrm{about}t}$$

and according to the indications of selective voltmeters, the thermal impedance module is calculated:

$$|\; |\; |Z_T\left(\Omega \right)|\; |\; |=\frac{R_I{U}_{CB2}}{K_T{U}_{P\mathrm{and}t}{U}_{CB\mathrm{one}}};\left(5a\right)$$

and the readings of the phase difference meter Δφ after subtracting 180 are equal to the phase of thermal impedance:

$${\varphi }_T\left(\Omega \right)=\Delta \varphi -{180}^{\circ }.\left(5b\right)$$

To exclude the influence of the collector resistor on the result of measuring the PMT, the resistance of the collector resistor must be selected as low as possible, based on the sensitivity threshold of the selective voltmeter, or measure the PMT with a shortened collector resistor.

To increase the sensitivity of the method, the controlled VLSI can be loaded with various peripheral devices, access to which in the special test mode increases the current consumed by the VLSI.

Claims (1)

A method for determining the thermal impedance of super-large integrated circuits (VLSI) - microprocessors and microcontrollers, which consists in loading a "warming up" test and control program into a controlled VLSI installed on the heat sink and connected to a power source, then the controlled VLSI is put into periodic heating mode by switching from the “warm-up” test to the pause mode with a frequency of Ω and a duty cycle of 2, the amplitude is measured at a switching frequency of Ω $$I_{m\mathrm{one}}^{P\mathrm{about}t}\left(\Omega \right)$$

the first harmonic of the consumed VLSI-controlled current, amplitude $$U_{m\mathrm{one}}^{TP}\left(\Omega \right)$$

the first harmonic of a temperature-sensitive parameter with a known negative temperature coefficient K _T , for example, the voltage at the integrated VLSI-controlled junction pn junction or the voltage of a logic unit at one of the terminals loaded with resistive load of the controlled VLSI, whose logical state does not change when the controlled VLSI is switched from one mode to another, and the phase difference φ (Ω) between the first harmonic of the current consumed by the controlled VLSI and the first harmonic of the temperature-sensitive arameter; the thermal impedance module of a controlled VLSI at a frequency Ω is determined by the formula:
$$|\; |\; |Z_T\left(\Omega \right)|\; |\; |=\frac{U_{m\mathrm{one}}^{TP}\left(\Omega \right)}{K_T{U}_{P\mathrm{and}t}{I}_{m\mathrm{one}}^{P\mathrm{about}t}\left(\Omega \right)}$$

,
where U _pit is the supply voltage of the controlled VLSI, and the phase φ _T (Ω) of the thermal impedance of the controlled VLSI is defined as a 180 ° phase difference between the first harmonic of the temperature-sensitive parameter and the first harmonic of the current consumed by the controlled VLSI.

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