RU2422897C2 - Discrete-analogue device - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: discrete-analogue device has a first, a second, a third, a fourth, a fifth, a sixth, a seventh, an eighth, a ninth and an extra data input, a first, a second, a third, a fourth, a fifth, a sixth, a seventh, an eighth, a ninth, a tenth, an eleventh, a twelfth and a thirteenth analogue subtracter, as well as a first, a second, a third and a fourth analogue multiplier, the extra data input of the device "1" is the first data input of the first-thirteenth analogue substracter.

EFFECT: higher estimation accuracy.

1 dwg, 7 tbl

Description

The invention relates to computer technology and can be used to implement both logical and arithmetic operations with discrete and analog values of zeros and ones.

Known logic devices that implement various functions of converting discrete values: "Multifunctional logic module" (SU 1621164 A1), "Exclusive OR logic with three inputs" (JP 2867253 B2, 10098374 A), "Arithmetic and logic optimized for the data transfer path topology functional circuits "(US 5982194 A).

Each of the listed analogue devices has three or more information inputs, to which signals with logical zero or one levels, one or two information outputs, and common devices — various logical elements — are received. The devices under consideration are built on the principle of cascade connection of logic elements and form signal values with logical zero or unity levels on one or more information outputs, depending on the values of the signals supplied to their information inputs.

The disadvantages include the ability to operate these devices only with discrete signal values, that is, with levels of logical zero or one.

As a prototype, we choose the logical device closest in technical essence to the claimed one, made as a logic circuit based on a Boolean function (B. Kalabekov. Digital devices and microprocessor systems: Textbook for technical schools of communication. - M .: Hot line-Telecom, 2005. - 336 p., On page 112 fig. 3.15, b).

The logical device under consideration consists of OR-NOT logical elements. Information inputs of the first logical element "OR NOT" are the first, third, fifth, seventh and ninth information inputs of the logical device. Information inputs of the second logical element "OR NOT" are the second, third, sixth and seventh information inputs of the logical device. The information inputs of the third logical element "OR NOT" are the fourth, fifth, sixth and seventh information inputs of the logical device. Information inputs of the third logical element "OR NOT" are the eighth and ninth information inputs of the logical device. The information output of the first logical element "OR NOT" is the first information output of the logical device. The information output of the second logical element "OR NOT" is the second information output of the logical device. The information output of the third logical element "OR NOT" is the third information output of the logical device. The information output of the fourth logical element "OR NOT" is the fourth information output of the logical device.

The disadvantage of the prototype device is the ability to operate only with discrete signal values, that is, with levels of logical zero or one.

In apparatus for transmitting discrete information, devices that implement various logical operations are widely used. However, in some cases, to improve the accuracy of the estimate, it is necessary to perform calculations using analog values. In this case, there is a need to develop a discrete-analog device that operates with both discrete and analog values.

The technical problem to which the proposed device is aimed is to expand the functionality of the device by implementing both logical and arithmetic operations with discrete and analog values of zeros and ones. Analog values from 0 (no signal) to 1 (maximum signal level) can be obtained in fractional values by discretization, for example, of a received pseudorandom sequence formed on the basis of a characteristic polynomial of the nth order, where n≥3, by non-linear transformation for a given discrete function. Its elements are discretized with a frequency k times higher than the clock frequency of the received pseudo-random sequence, where k≥2.

The problem is solved using the proposed discrete-analog device containing the first - ninth and additional information inputs, the first - thirteenth analog subtractors, the first - fourth analog multipliers. The additional information input “1” of the device is the first information input of the first to thirteenth analog subtractors. The first information input of the device is connected to the second information input of the first analog subtractor. The second information input of the device is connected to the second information input of the sixth analog subtractor. The third information input of the device is connected to the second information input of the second analog subtractor. The fourth information input of the device is connected to the second information input of the eighth analog subtractor. The fifth information input of the device is connected to the second information input of the third analog subtractor. The sixth information input of the device is connected to the second information input of the seventh analog subtractor. The seventh information input of the device is connected to the second information input of the fourth analog subtractor. The eighth information input of the device is connected to the second information input of the ninth analog subtractor. The ninth information input of the device is connected to the second information input of the fifth analog subtractor. The information output of the first analog subtractor is the first information input of the first analog multiplier. The information output of the second analog subtractor is the second information input of the first analog multiplier and the second information input of the second analog multiplier. The information output of the third analog subtractor is the third information input of the first analog multiplier and the second information input of the third analog multiplier. The information output of the fourth analog subtractor is the fourth information input of the first analog multiplier, the fourth information input of the second analog multiplier and the fourth information input of the third analog multiplier. The information output of the fifth analog subtractor is the fifth information input of the first analog multiplier and the second information input of the fourth analog multiplier. The information output of the sixth analog subtractor is the first information input of the second analog multiplier. The information output of the seventh analog subtractor is the third information input of the second analog multiplier and the third information input of the third analog multiplier. The information output of the eighth analog subtractor is the first information input of the third analog multiplier. The information output of the ninth analog subtractor is the first information input of the fourth analog multiplier. The information output of the tenth analog subtractor is the first information output of the device. The information output of the eleventh analog subtractor is the second information output of the device. The information output of the twelfth analog subtractor is the third information output of the device. The information output of the thirteenth analog subtractor is the fourth information output of the device. The information output of the first analog multiplier is the second information input of the tenth analog subtractor. The information output of the second analog multiplier is the second information input of the eleventh analog subtractor. The information output of the third analog multiplier is the second information input of the twelfth analog subtractor. The information output of the fourth analog multiplier is the second information input of the thirteenth analog subtractor.

To obtain a discrete-analog device, it is necessary to replace the logical operations with their corresponding analog ones. To simplify, we present the original logical operations through the operation "AND" and the negation:

The circuits of the analog elements used in the device are known and are given in the book: A.A.Sikarev, O.N. Lebedev "Microelectronic devices for the formation and processing of complex signals." - M .: Radio and communication. 1983, p. 200, fig. 7.11.

Table 1 presents the implemented logical and analog inversion functions, as well as the truth tables of the devices in question.

Table 1 Logical device Analog device Name Inverter ("NOT") Analog inverter Function to be implemented

Negation (inversion) y =

y = 1 Truth table x y x y 0 one 0 one one 0 one 0

Table 2 presents the realized logical and analog conjunction functions, as well as the truth tables of the devices under consideration.

table 2 Logical device Analog device Name Conjunctor ("And") Analog conjunctor Function to be implemented Conjunction y = x ₁ x ₂ y = x ₁ x ₂ Truth table x ₁ x ₂ at x ₁ x ₂ y 0 0 0 0 0 0 0 one 0 0 one 0 one 0 0 one 0 0 one one one one one one

Table 3 presents the implemented logical and analog disjunction functions, as well as the truth tables of the devices under consideration.

Table 3 Logical device Analog device Name Disjunctor ("OR") Analog disjunctor Function to be implemented Disjunction y = x ₁ + x ₂ y = x ₁ + x _2- x ₁ x ₂ Truth table x ₁ x ₂ y x ₁ x ₂ y 0 0 0 0 0 0 0 one one 0 one one one 0 one one 0 one one one one one one one

Thus, replacing the logical operations with the corresponding analog ones, we get an analog device that operates with analog values.

An analog device implements the functions:

, у₁, у₂, у₃, у₄, у₅, у₆, у₇, у₈, у₉ - аналоговые значения.В таблицах 4, 5, 6, 7 представлены таблицы истинности предлагаемого устройства.Where

, y ₁ , y ₂ , y ₃ , y ₄ , y ₅ , y ₆ , y ₇ , y ₈ , y ₉ - analog values. Tables 4, 5, 6, 7 present truth tables of the proposed device.

Table 4 at ₁ at ₃ at ₅ at ₇ at ₉

0 0 0 0 0 0 0 0 0 0 0 one one one 0 0 0 one 0 one one 0 0 0 one one one one 0 0 one 0 0 one one 0 0 one 0 one one one 0 0 one one 0 one one 0 0 one one one one one 0 one 0 0 0 one one 0 one 0 0 one one one 0 one 0 one 0 one one 0 one 0 one one one one 0 one one 0 0 one one 0 one one 0 one one one 0 one one one 0 one one 0 one one one one one one one 0 0 0 0 one one one 0 0 0 one one one one 0 0 one 0 one one one 0 0 one one one one one 0 one 0 0 one one one 0 one 0 one one one one 0 one one 0 one one one 0 one one one one one one one 0 0 0 one one one one 0 0 one one one one one 0 one 0 one one one one 0 one one one one one one one 0 0 one one one one one 0 one one one one one one one 0 one one one one one one one one one

Table 5 at ₂ at ₃ at ₆ at ₇

0 0 0 0 0 0 0 0 0 one one one 0 0 one 0 one one 0 0 one one one one 0 one 0 0 one one 0 one 0 one one one 0 one one 0 one one 0 one one one one one one 0 0 0 one one one 0 0 one one one one 0 one 0 one one one 0 one one one one one one 0 0 one one one one 0 one one one one one one 0 one one one one one one one one

Table 6 at ₄ at ₅ at ₆ at ₇

0 0 0 0 0 0 0 0 0 one one one 0 0 one 0 one one 0 0 one one one one 0 one 0 0 one one 0 one 0 one one one 0 one one 0 one one 0 one one one one one one 0 0 0 one one one 0 0 one one one one 0 one 0 one one one 0 one one one one one one 0 0 one one one one 0 one one one one one one 0 one one one one one one one one

Table 7 at ₈ at ₉

0 0 0 0 0 one one one one 0 one one one one one one

The specified new set of features of the claimed discrete-analog device by replacing the logical elements with their corresponding arithmetic allows you to expand the functionality of the device by implementing both logical and arithmetic operations with discrete and analog values of zeros and ones.

The analysis of the prior art by the applicant made it possible to establish that there are no analogues characterized by sets of features identical to all the features of the claimed device, which indicates the compliance of the claimed invention with the condition of patentability "novelty".

The search results for known solutions in this and related fields of technology in order to identify signs that match the distinctive features of the prototypes of the claimed invention showed that they do not follow explicitly from the prior art. Therefore, the claimed invention meets the condition of patentability "inventive step".

The proposed device is shown in the drawing, which shows a block diagram of a device for logical and arithmetic operations with discrete and analog values of zeros and ones.

Devices 1.1-1.13 are analog subtractors, devices 2.1-2.4 are analog multipliers.

The device of logical and arithmetic operations with discrete and analog values of zeros and ones consists of the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth, eleventh, twelfth and thirteenth analog subtractors 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 1.10, 1.11, 1.12, 1.13, from the first, second, third, fourth analog multipliers 2.1, 2.2, 2.3, 2.4.

Additional information input "1" is the first information input of the first to thirteenth analog subtractors 1.1-1.13.

. Информационный выход одиннадцатого аналогового вычитателя 1.11 является вторым информационным выходом устройства

. Информационный выход двенадцатого аналогового вычитателя 1.12 является третьим информационным выходом устройства

Информационный выход тринадцатого аналоговоговычитателя 1.13 является четвертым информационным выходом устройства

. Информационный выход первого аналогового перемножителя 2.1 является вторым информационным входом десятого аналогового вычитателя 1.10. Информационный выход второго аналогового перемножителя 2.2 является вторым информационным входом одиннадцатого аналогового вычитателя 1.11. Информационный выход третьего аналогового перемножителя 2.3 является вторым информационным входом двенадцатого аналогового вычитателя 1.12. Информационный выход четвертого аналогового перемножителя 2.4 является вторым информационным входом тринадцатого аналогового вычитателя 1.13.The first information input of the device at _{1 is} connected to the second information input of the first analog subtractor 1.1. The second information input of device _{2 is} connected to the second information input of the sixth analog subtractor 1.6. The third information input of device _{3 is} connected to the second information input of the second analog subtractor 1.1. The fourth information input of the device at _{4 is} connected to the second information input of the eighth analog subtractor 1.8. The fifth information input of device _{5 is} connected to the second information input of the third analog subtractor 1.3. The sixth information input of the device at _{6 is} connected to the second information input of the seventh analog subtractor 1.7. The seventh information input of the device at _{7 is} connected to the second information input of the fourth analog subtractor 1.4. The eighth information input of the device at _{8 is} connected to the second information input of the ninth analog subtractor 1.9. The ninth information input of the device at _{9 is} connected to the second information input of the fifth analog subtractor 1.5. The information output of the first analog subtractor 1.1 is the first information input of the first analog multiplier 2.1. The information output of the second analog subtractor 1.2 is the second information input of the first analog multiplier 2.1 and the second information input of the second analog multiplier 2.2. The information output of the third analog subtractor 1.3 is the third information input of the first analog multiplier 2.1 and the second information input of the third analog multiplier 2.3. The information output of the fourth analog subtractor 1.4 is the fourth information input of the first analog multiplier 2.1, the fourth information input of the second analog multiplier 2.2 and the fourth information input of the third analog multiplier 2.3. The information output of the fifth analog subtractor 1.5 is the fifth information input of the first analog multiplier 2.1 and the second information input of the fourth analog multiplier 2.4. The information output of the sixth analog subtractor 1.6 is the first information input of the second analog multiplier 2.1. The information output of the seventh analog subtractor 1.7 is the third information input of the second analog multiplier 2.2 and the third information input of the third analog multiplier 2.3. The information output of the eighth analog subtractor 1.8 is the first information input of the third analog multiplier 2.3. The information output of the ninth analog subtractor 1.9 is the first information input of the fourth analog multiplier 2.4. The information output of the tenth analog subtractor 1.10 is the first information output of the device

. The information output of the eleventh analog subtractor 1.11 is the second information output of the device

. The information output of the twelfth analog subtractor 1.12 is the third information output of the device

The information output of the thirteenth analogue subtractor 1.13 is the fourth information output of the device

. The information output of the first analog multiplier 2.1 is the second information input of the tenth analog subtractor 1.10. The information output of the second analog multiplier 2.2 is the second information input of the eleventh analog subtractor 1.11. The information output of the third analog multiplier 2.3 is the second information input of the twelfth analog subtractor 1.12. The information output of the fourth analog multiplier 2.4 is the second information input of the thirteenth analog subtractor 1.13.

The claimed discrete-analog device operates as follows. Analog values (one or zero) or discrete values (with a logic one or zero level) are sent in parallel to the first y ₁ , second to ₂ , third to ₃ , fourth to ₄ , fifth to ₅ , sixth to ₆ , seventh to ₇ , eighth at ₈ and ninth at ₉ information inputs of a discrete-analog device. An additional information input "1" of the discrete-analog device receives a signal with the level of a logical unit. In the first analog subtractor 1.1, the value of the signal fed to the first information input at ₁ digital-analog device is subtracted from the signal entering the additional information input "1" _{of the} discrete-analog device. In the second analog subtractor 1.2, the value of the signal from the third information input at _{3 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the third analog subtractor 1.3, the value of the signal from the fifth information input at _{5 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the fourth analog subtractor 1.4, the value of the signal from the seventh information input at _{7 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the fifth analog subtractor 1.5, the value of the signal from the ninth information input at _{9 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the sixth analog subtractor 1.6, the value of the signal from the second information input at _{2 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the seventh analog subtractor 1.7, the value of the signal from the seventh information input at _{7 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the eighth analog subtractor 1.8, the value of the signal from the fourth information input at _{4 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the ninth analog subtractor 1.9, the value of the signal from the eighth information input at _{8 is} subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the tenth analog subtractor 1.10, the value of the signal from the first analog multiplier 2.1 is subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the eleventh analog subtractor 1.11, the value of the signal from the second analog multiplier 2.2 is subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the twelfth analog subtractor 1.12, the value of the signal from the third analog multiplier 2.3 is subtracted from the signal input to the additional information input "1" of the discrete-analog device. In the thirteenth analog subtractor 1.13, the value of the signal from the fourth analog multiplier 2.4 is subtracted from the signal input to the additional information input "1" of the discrete-analog device.

The first analog multiplier 2.1 multiplies the signals coming from the first, second, third, fourth and fifth analog subtractors 1.1, 1.2, 1.3, 1.4, 1.5. In the second analog multiplier 2.2, the signals from the second, fourth, sixth and seventh analog subtractors 1.2, 1.4, 1.6, 1.7 are multiplied. In the third analog multiplier 2.3, the signals from the third, fourth, seventh and eighth analog subtractors 1.3, 1.4, 1.7, 1.8 are multiplied. In the fourth analog multiplier 2.4, the signals from the fifth and ninth analog subtractors 1.5, 1.9 are multiplied.

Выход одиннадцатого аналогового вычитателя 1.11 является информационным выходом устройства

. Выход двенадцатого аналогового вычитателя 1.12 является информационным выходом устройства

. Выход тринадцатого аналогового вычитателя 1.13 является информационным выходом устройства

.The output of the tenth analog subtractor 1.10 is the information output of the device

The output of the eleventh analog subtractor 1.11 is the information output of the device

. The output of the twelfth analog subtractor 1.12 is the information output of the device

. The output of the thirteenth analog subtractor 1.13 is the information output of the device

.

Claims (1)

A discrete analog device containing the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth and additional information inputs, the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth, eleventh, the twelfth and thirteenth analog subtractors, as well as the first, second, third and fourth analog multipliers, characterized in that an additional information input of the device is input to which a signal with a logic level is supplied, and additional information the device input is the first information input of the first to thirteenth analog subtractors; the first information input of the device is connected to the second information input of the first analog subtractor; the second information input of the device is connected to the second information input of the sixth analog subtractor; the third information input of the device is connected to the second information input of the second analog subtractor; the fourth information input of the device is connected to the second information input of the eighth analog subtractor; the fifth information input of the device is connected to the second information input of the third analog subtractor; the sixth information input of the device is connected to the second information input of the seventh analog subtractor; the seventh information input of the device is connected to the second information input of the fourth analog subtractor; the eighth information input of the device is connected to the second information input of the ninth analog subtractor; the ninth information input of the device is connected to the second information input of the fifth analog subtractor, and the information output of the first analog subtractor is the first information input of the first analog multiplier; the information output of the second analog subtractor is the second information input of the first analog multiplier and the second information input of the second analog multiplier; the information output of the third analog subtractor is the third information input of the first analog multiplier and the second information input of the third analog multiplier; the information output of the fourth analog subtractor is the fourth information input of the first analog multiplier, the fourth information input of the second analog multiplier and the fourth information input of the third analog multiplier; the information output of the fifth analog subtractor is the fifth information input of the first analog multiplier and the second information input of the fourth analog multiplier; the information output of the sixth analog subtractor is the first information input of the second analog multiplier; the information output of the seventh analog subtractor is the third information input of the second analog multiplier and the third information input of the third analog multiplier; the information output of the eighth analog subtractor is the first information input of the third analog multiplier; the information output of the ninth analog subtractor is the first information input of the fourth analog multiplier; the information output of the tenth analog subtractor is the first information output of the device; the information output of the eleventh analog subtractor is the second information output of the device; the information output of the twelfth analog subtractor is the third information output of the device; the information output of the thirteenth analog subtractor is the fourth information output of the device; the information output of the first analog multiplier is the second information input of the tenth analog subtractor; the information output of the second analog multiplier is the second information input of the eleventh analog subtractor; the information output of the third analog multiplier is the second information input of the twelfth analog subtractor; the information output of the fourth analog multiplier is the second information input of the thirteenth analog subtractor.